Analog Frequency Multiplier PL560-XX VCXO Family PRODUCT DESCRIPTION The Analog Frequency Multiplier (AFM) is the industry’s first ‘Balanced Oscillator’ utilizing analog multiplication of the fundamental frequency (at double or quadruple frequency), combined with an attenuation of the fundamental of the reference crystal, without the use of a phase-locked loop (PLL), in CMOS technology. Micrel’s world’s best performing AFM products can achieve up to 800 MHz output frequency with little jitter or phase noise deterioration. In addition, the low frequency input crystal requirement makes the AFMs the most affordable high-performance timingsource in the market. PL560/5-xx family of products utilize low-power CMOS technology and are housed in Green / RoHS compliant 16-pin TSSOP, and 16-pin 3x3 QFN packages. Non-PLL frequency multiplication Input frequency from 30-200 MHz Output frequency from 60-800 MHz Low phase noise and jitter (equivalent to fundamental crystal at the output frequency) Ultra-low jitter o RMS phase jitter < 0.25 ps (12kHz-20MHz) o RMS period jitter < 2.5 ps Low phase noise o -142 dBc/Hz @100kHz offset from 155.52 MHz o -150 dBc/Hz @10MHz offset from 155.52 MHz High linearity pull range (typ. 5%) +/- 120 PPM pullability VCXO Low input frequency eliminates the need for expensive crystals Differential output levels (PECL, LVDS), or single ended CMOS Single 3.3V, ±10% power supply Optional industrial temperature range (-40C to +85C) Available in 16-pin Green/RoHS compliant TSSOP, and 3x3 QFN packages FEATURES Figure 1: 2x AFM Phase Noise at 311.04MHz Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 1 Analog Frequency Multiplier PL56X-XX VCXO Family L2X VCON OE XIN Oscillator Amplifier XOUT QBAR Frequency X2 Frequency X4 Q Only required in x4 designs L4X Figure 2: Block Diagram of VCXO AFM Figure 3 shows the period jitter histogram of the 2x Analog Frequency Multiplier at 311.04 MHz, while F igure 4 shows the very low rejection levels of sub-harmonics that correspond to the exceptionally low jitter performance. Figure 3: Period Jitter Histogram at 311.04 MHz Analog Frequency Multiplier (2x) with 155.52MHz crystal Figure 4: Spectrum Analysis at 311.04 MHz Analog Frequency Multiplier (2x) with sub-harmonics below –72 dBc OE LOGIC SELECTION OUTPUT OESEL 0 (Default) LVPECL 1 0 (Default) LVDS or LVCMOS 1 OE Output State 0 (Default) Enabled 1 Tri-state 0 Tri-state 1 (Default) Enabled 0 Tri-state 1 (Default) Enabled 0 (Default) Enabled 1 Tri-state OESEL and OE: Connect to VDD or leave floating to set to “1”, connect to GND to set to “0”. Internally set to default through pull-down / -up. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 2 Analog Frequency Multiplier PL56X-XX VCXO Family PRODUCT SELECTION GUIDE FREQUENCY VERSUS PHASE NOISE PERFORMANCE Phase Noise at Frequency Offset From Carrier (dBc/Hz) Part Number Input Frequency Range (MHz) Analog Frequency Multiplication Factor Output Frequency Range (MHz) Output Type PL560-37 30 - 80 4 120 - 320 PL560-38 30 - 80 4 PL560-39 30 - 80 PL560-47 Carrier Freq. (MHz) 10Hz 100Hz 1kHz 10kHz 100kHz 1MHz 10MHz LVCMOS 155.52 -50 -82 -110 -128 -142 -148 -150 120 - 320 LVPECL 155.52 -50 -82 -110 -128 -142 -148 -150 4 120 - 320 LVDS 155.52 -50 -82 -110 -128 -142 -148 -150 30 - 80 2 60 - 160 LVCMOS 155.52 -65 -95 -122 -138 -142 -148 -149 PL560-48 30 - 80 2 60 - 160 LVPECL 155.52 -65 -95 -122 -138 -142 -148 -149 PL560-49 30 - 80 2 60 - 160 LVDS 155.52 -65 -95 -122 -138 -142 -148 -149 PL560-68 75 - 200 2 150 - 400 LVPECL 311.04 -60 -85 -112 -135 -142 -150 -151 PL560-69 75 - 200 2 150 - 400 LVDS 311.04 -60 -85 -112 -135 -142 -150 -151 Phase noise was measured using Agilent E5500. FREQUENCY VERSUS JITTER, AND SUB-HARMONIC PERFORMANCE Part Number RMS Period Jitter (ps) Peak to Peak RMS RMS Phase Jitter Period Jitter Accumulated 12kHz to 20MHz Spectral Specifications / Sub-harmonic Content (dBc), Output (ps) (L.T.) Jitter (ps) (ps) Frequency (MHz) Freq. Carrier @ @ @ @ @ @ (MHz) Min Typ Max Min Typ Max Min Typ Max Min Typ Max Freq. -75% -50% -25% +25% +50% +75% (Fc) (Fc) (Fc) (Fc) (Fc) (Fc) (Fc) PL560-37 155 2.5 3 18 20 3 0.25 155.52 -75 -62 -65 -75 PL560-38 155 2.5 3 18 20 3 0.25 155.52 -75 -62 -65 -75 PL560-39 155 2.5 3 18 20 3 0.25 155.52 -75 -62 -65 -75 PL560-47 155 2.5 3 18 20 3 0.25 155.52 -68 -68 PL560-48 155 2.5 3 18 20 3 0.25 155.52 -68 -68 PL560-49 155 2.5 3 18 20 3 0.27 155.52 -68 -68 PL560-68 311 2.5 3 18 20 3 0.18 311.04 -72 -85 PL560-69 311 2.5 3 18 20 3 0.18 311.04 -72 -85 Note: Wavecrest data 10,000 hits. No filtering was used in jitter calculations. Agilent 5500 was used for phase jitter measurements. Spectral specifications were obtained using Agilent E7401A. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 3 Analog Frequency Multiplier PL56X-XX VCXO Family CRYSTAL SPECIFICATIONS AND BOARD LAYOUT CONSIDERATIONS BOARD LAYOUT CONSIDERATIONS AFM IC AFM IC XTAL XIN (Pin # 4 ) XIN (Pin # 4 ) XTAL XOUT (Pin # 5) XOUT (Pin # 5) Ceramic SMD To minimize parasitic effects, and improve performanc e: Place the crystal as close as possible to the IC. Make the board traces that are connected to the crystal pins symmetrical. The board trace symmetry is important, as it reduces the negative parasitic effects to produce a clean frequency multiplication with low jitter. Parasitic effects reduce frequency pulling of the VCXO and increase jitter. CRYSTAL SPECIFICATIONS & TUNING PERFORMANCE CRYSTAL SPECIFICATIONS PART NUMBER CRYSTAL CL (xtal) RESONATOR MODE FREQUENCY CONDITYP (FXIN) TIONS PL565-08 At FundaPL560-09 75 to 200MHz VCON = mental PL560-68/69 1.65V PL56037/38/39 PL56047/48/49 TUNING PERFORMANCE 30 to 80MHz At FundaVCON = mental 1.65V 5pF 5pF ESR (RE) MAX CRYSTAL TUNING (Typical) CRYSTAL FREQ (MHz) C0 C1 C0/C1 VC: 1.65V 0V VC: 1.65V 3.3V 155.52 3.0pF 12.2fF 245 -145 ppm +108 ppm 155.52 1.8pF 5.7fF 316 -134 ppm +87 ppm 30.72 2.8pF 12.4fF 228 -167ppm +176 ppm 30.72 4.5pF 19.1fF 236 -163 ppm +167 ppm 38.88 5.1pF 20.9fF 242 -131 ppm +98 ppm 38.88 5.3pF 25.6fF 207 -157 ppm +141 ppm 77.76 2.0pF 6.7fF 305 -92 ppm +110 ppm 30Ω 30Ω Note: Non specified parameters can be chosen as standard values from crystal suppliers. CL ratings larger than 5pF require a crystal frequency adjustment. Request detailed crystal specifications from Micrel. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 4 Analog Frequency Multiplier PL56X-XX VCXO Family VOLTAGE CONTROL SPECIFICATION PARAMETERS VCXO Stabilization Time SYMBOL T VCXOSTB CONDITIONS MIN. From power valid VCXO Tuning Range XTAL C0 /C 1 <300 200 CLK Output Pullability VCON= 1.65V, 1.65V XTAL C0 /C 1 <300 100 Linearity 0V < VCON < 3.3V, -3dB MAX. UNITS 10 ms ppm 120 5 VCON Input Impedance VCON Modulation BW TYP. ppm 10 % 130 kΩ 16 kHz EXTERNAL COMPONENT VALUES INDUCTOR VALUE OPTIMIZATION The required inductor value(s) for the best performance depends on the operating frequency, and the board layout specifications. The listed values in this datasheet are based on the calculated parasitic v alues from Micrel’s evaluation board design. These inductor values provide the user with a starting point to determine the optimum inductor values. Additional fine -tuning may be required to determine the optimal solution. The inductor is recommended to be a high Q small size 0402 or 0603 SMD component, and must be placed between L2X / L4X and adjacent VDDOSC pin. Place inductor as close to the IC as possible to minimize parasitic effects and to maintain inductor Q. To assist with the inductor value optimization, Micrel has developed the “AFM Tuning Assistant” software. You can download this software from Micrel’s web site (www.micrel.com). The software consists of two worksheets. The first worksheet (named L2) is used to fine -tune the ‘L2’ inductor value, and the second worksheet (named L4) is used for fine tuning of the ‘L4’ (used in 4x AFMs only) inductor value. For those designs using Micrel’s recommended board layout, you can use the “AFM Tuning Assistant” to determine the optimum values for the required inductors. This software is developed based on the parasitic information from Micrel’s board layout and can be used to determine the required inductor and parallel capacitor (see LWB1 and Cstray parameters) values. For those employing a dif ferent board layout in their design, we recommend to use the parasitic information of their board layout to calculate the optimized inductor values. Please use the following fine tuning procedure: Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 5 Analog Frequency Multiplier PL56X-XX VCXO Family Figure 5: Diagram Representation of the Related System Inductance and Capacitance DIE SIDE - Cinternal = Based on AFM device - Cpad = 2.0 pF, Bond pad and its ESD circuitry - C11 = 0.4 pF, The following amplifier stage PCB side - LWB1 = 2 nH, (2 places), Stray inductance - Cstray = 1.0 pF, Stray capacitance - L2X (L4X) = 2x or 4x inductor - C2X (C4X) = range (0.1 to 2.7 pF), Fine tune inductor if used There are two default variables that normally will not need to be modified. These are Cpad, and C11 and are found in cells B22 and B27 of ‘AFM Tuning Assistant’, respectively. LWB1 is the combined stray inductance in the layout. The DIE wire bond is ~ 0.6 nH and in the case of a leaded part an additional 1.0 nH is added. Your layout inductance must be added to these. There are 2 of these and they are assumed to be approximately symmetrical so you only need to enter this inductance once in cell B23. Enter the stray parasitic capacitance into cell B26. An additional 0.5 pF must be added to this value if a leaded part is used. Enter the appropriate value for Cinternal into B21 based on the device used (see column D). Use the ‘AFM Tuning Assistant’ software to calculate L2X (and C2X if used) for your resonance frequency. For 4X AFMs, repeat the same procedure in the L4X worksheet. See the examples in the following section. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 6 Analog Frequency Multiplier PL56X-XX VCXO Family DETERMINING STRAY L’ s AND C’s IN A LAYOUT Figure 6: Diagram Representation of the Board Layout Lets take the PL560-38 (4x VCXO) for example. This takes a crystal input in the range of 30 to 80 MHz and multiplies it to an output of 120 to 320 MHz. To determine the stray L’s and C’s of the layout we will assemble two test units. One AFM will be tuned to the lower range of the device (120 MHz), and the other to the upper range of the device (320 MHz). 120 MHz AFM Tuning: Using the “AFM Tuning Assistant” find the PL560 -3x in the L2X worksheet. Enter the Cinternal value found next to it into cell B21. In cell B24 enter the closest standard inductor value (see CoilCraft 0603CS series for example) to achieve the closest peak frequency to 60 MHz. Repeat the same procedure for L4X at 120 MHz. Results: L2X = 180 nH, L4X = 82 nH. 320 MHz AFM tuning: Repeat the previous procedure for L2X at 120 MHz and L4X at 320 MHz. Results: L2X = 24 nH, L4X = 10 nH. Proceed and assemble the test units. Measuring 120 MHz L2X: Connect the RF generator and scope probe as shown in Figure 6, above. While power is applied to the PCB, set the generator output to +12 dBm and the frequency to 30 MHz. Since this is the 2x port, the scope will show 60 MHz with ~ 3V pk-pk amplitude. Vary the generator above and below 30 MHz until the amplitude on the scope is maximum and record the generator frequency. For example , the peak is recorded at 29.8x2 or 59.6 MHz. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 7 Analog Frequency Multiplier PL56X-XX VCXO Family Measuring 320 MHz L2X: Connect the RF generator and scope probe as shown in Figure 6, above. While power is applied to the PCB, set the generator output to +12 dBm and the frequency to 80 MHz. Since this is the 2x port the scope will show 160 MHz with ~ 3V pk-pk amplitude. Vary the generator above and below 80 MHz until the amplitude on the scope is maximum and record the generator frequency. For example , the peak is recorded at 78.0 x 2 = 156 MHz In the AFM Tuning Assistant, add the scope’s probe capaci tance to the Cstray cell. For our example 0.5 pF + 1.0 pF = 1.5 pF. With L2X at 24 nH adjust LWB1 (cell B23) until the peak frequency reads 156 MHz. Next replace the L2X value with 180 nH and see if it peaks at 59.6 MHz. If it does not, adjust Cstray until 59.4 MHz is achieved. Again enter 24 nH for L2X and fine tune LWB1 for 156 MHz. Results: LWB1 = 1.6 nH, Cstray = 2.9 pF -0.5 pF = 2.4 pF (subtract scope probe stray capacitance) Repeat the same steps for the L4X: Set the generator to 80 MHz. The 82 nH peaks at 118 MHz and the 10 nH peaks at 304 MHz. Results: LWB1 = 1.8 nH, Cstray = 2.5 pF -0.5 pF = 2.0 pF (subtract scope probe stray capacitance) Internal Capacitor Selection by Device Device Number Cinternal (pF) 2X 4X P565-08 7.625 6.250 P560-09 7.625 6.250 P560-3x 34.125 16.500 P560-4x 34.125 P560-6x 7.625 Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 8 Analog Frequency Multiplier PL56X-XX VCXO Family ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PARAMETERS SYMBOL Supply Voltage MIN. V DD MAX. UNITS 4.6 V Input Voltage, DC VI GND-0.5 V DD+0.5 V Output Voltage, DC VO GND-0.5 V DD+0.5 V Storage Temperature TS -65 150 C Ambient Operating Temperature, Industrial T A_ I -40 +85 C Ambient Operating Temperature, Commercial T A_ C 0 +70 C 125 C 260 C 2 kV Junction Temperature TJ Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permane nt damage to the device and affect product reliability. These conditions represent a stres s rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied . LVPECL ELECTRICAL CHARACTERISTICS PARAMETERS SYMBOL CONDITIONS MIN. Supply Current, loaded outputs I DD Fout = 622.08MHz, 15pF Load Operating Voltage* V DD TYP. MAX. UNITS 75 80 mA 3.63 V 55 % 2.97 Output Clock Duty Cycle @ V DD – 1.3V 45 50 50 Short Circuit Current Output High Voltage V OH Output Low Voltage V OL PECL Levels Test Circuit RL = 50Ω to (V DD – 2V) OUT Clock Rise Time tr @ 20/80% Clock Fall Time tf @ 80/20% V DD -1.025 VDD 50? 2.0V mA PECL Output Skew OUT 0.25 50% 0.25 V DD -1.620 V 0.45 ns 0.45 ns 50? *Contact Micrel for lower operating voltages OUT tSKEW OUT PECL Levels Test CircuitLevels Test Circuit LVPECL OUT VDD OUT LVPECL Transition Time Waveform LVPECL Output PECL Skew Output Skew VDD DUTY CYCLE OUT OUT 45 - 55% 50? 50 2.0V V 55 - 45% 2.0V 50% OUT 50% 80% 50? 50 OUT OUT OUT tSKEW OUT tSKEW 20% OUT PECL Transistion Time WaveformTime Waveform PECL Transistion DUTY CYCLE tR tF DUTY CYCLE Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 9 45 - 55% OUT OUT 45 - 55% 55 - 45% 55 - 45% Analog Frequency Multiplier PL56X-XX VCXO Family LVDS ELECTRICAL CHARACTERISTICS PARAMETERS SYMBOL Supply Current, loaded outputs I DD Operating Voltage* V DD CONDITIONS MIN. Fout = 622.08MHz, 15pF Load TYP. MAX. UNITS 55 60 mA 3.63 V 55 % 2.97 Output Clock Duty Cycle @ 1.25V (LVDS) 45 50 50 Short Circuit Current Output Differential Voltage VDD Magnitude Change V OD 247 V OD -50 Output High Voltage V OH Output Low Voltage V OL Offset Voltage mA 355 1.4 RL = 100 Ω (see figure) 454 mV 50 mV 1.6 V 0.9 1.1 V OS 1.125 1.2 1.375 V Offset Magnitude Change V OS 0 3 25 mV Power-off Leakage I OXD V ou t = V DDLVDS or Levels GNDTest Circuit V DD = 0V V 1 LVDS Switching µA Test Circuit 10 OUT Output Short Circuit Current OUT I OSD Differential Clock Rise Time RL = 100 Ω CL = 10 pF (see figure) tr Differential Clock Fall Time tf 50? 0.2 VOD -5.7 -8 mA 0.5 0.7 ns 0.5 0.7 ns CL = 10pF VOS VDIFF 0.2 50? CL = 10pF *Contact Micrel for lower operating voltages OUT OUT LVDS Levels Test LVDS Circuit Levels Test Circuit LVDS SwitchingLVDS Test Circuit Switching Test Circuit OUT OUT OUT 50 OUT OUT CL = 10pF 50 LVDS Transition Time Waveform CL = 10pF 0V (Differential) OUT VO D VO V D OS VO S 50 VDIF F RLV=DIF100 F RL = 100 80% 50 CL = 10pF VDIFF OUT OUT OUT 80% CL = 10pF 0V OUT 20% LVDS Transistion LVDS TimeTransistion Waveform Time Waveform OUT OUT OUT OUT VDIF F V0V DIF F 0V (Differential) 20% tR tF 0V (Differential) 80% 80% 80% 80% 0V 20% 20% tR 20% tR tF 20% tF Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 10 RL = Analog Frequency Multiplier PL56X-XX VCXO Family LVCMOS ELECTRICAL CHARACTERISTICS PARAMETERS SYMBOL CONDITIONS Supply Current, loaded outputs I DD At 100MHz, 15pF load Operating Voltage* V DD TYP. MAX. UNITS 16 20 mA 3.63 V 2.97 Output High Voltage (LVTTL) V OH3 .3 I OH = -8.5mA, 3.3V Output Low Voltage (LVTTL) V OL3 .3 I OL = 8.5mA, 3.3V Output High Voltage (LVCMOS) V OHC3 .3 I OH = -4mA, 3.3V Output Drive Current I OSD3 .3 Output Clock Rise/Fall Time T r ,T f Output Clock Duty Cycle MIN. 2.4 0.4 V DD – 0.4 V OL = 0.4V, V OH = 2.4V (per output), 3.3V 10% / 90% V DD, 10 pF load Measured @ 50% V DD V V 8.5 45 V mA 1.2 1.6 ns 50 55 % *Contact Micrel for lower operating voltages Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 11 Analog Frequency Multiplier PL56X-XX VCXO Family BOARD DESIGN AND LAYOUT CONSIDERATIONS L2X and L4X: Try to reduce the PCB trace inductance to a minimum by placing L2X and L4X as physically close to their respective pins as possible. Also be sure to bypass each Vdd connection especially taking care to place a 0.01 uF bypass at the Vdd side of L2X and L4X (see recommended layout). Crystal connections: Be sure to keep the ground plane under the crystal connections continuous so that the stray capacitance is consistent on both crystal connections. Also be sure to keep the crystal connections symmetrical with respect to one another and the crystal connection pins of the IC. If you chose to use a series capacitance and or inductor to fine tune the crystal frequency be sure to put symmetrical pads for this cap on both crystal pins (see Cadj in recommended layout), even if one of the capacitors will be a 0.01 uF and the other is used to tune the frequency. To further maintain a symmetrical balance on a crystal that may have more internal Cstray on one pin or the other, place capacitor pads (Cbal) on eac h crystal lead to ground (see recommended layout). R3rd is only required if a 3 rd overtone crystal is used. 2X Layout (TSSOP) V DD and GND: Bypass VDDANA and VDDBUF with separate bypass capacitors and if a V DD plane is used, feed each bypass cap with its own via. Be sure to connect any ground pin including the bypass caps with short via connections to the ground plane. OESEL: J1 is recommended so the same PCB layout can be used for both OESEL settings. 4X Layout (TSSOP) Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 12 Analog Frequency Multiplier PL56X-XX VCXO Family 6 DNC GNDANA 8 OESEL VDDANA VDDBUF 11 QBAR 7 10 Q 8 9 GNDBUF OESEL 14 7 DNC VDDOSC 15 6 OE L2X 16 5 P560-4X 1 2 3 4 14 OESEL XOUT XIN XOUT 4 5 OE 6 L4X VDDOSC 2X AFM Package Pin Out 13 12 VDDANA VDDBUF 11 QBAR 7 10 Q 8 9 GNDBUF 12 VDDANA 13 GNDBUF 3 QBAR VDDOSC VCON GNDANA Q 9 L2X 15 VDDBUF 10 GNDBUF Q QBAR 11 16 2 11 10 9 8 VDDOSC 7 L4X OESEL 14 VDDOSC 15 6 OE L2X 16 5 XOUT P560/5-0X 1 2 3 4 XIN OE 12 13 1 GNDOSC VCON 5 13 12 VDDANA OSCOFFSEL OSCOFF SEL GNDOSC 4 14 VDDOSC XIN XOUT 3 15 L2X VCON XIN 2 PLL560-4X VCON 16 PLL560/5-0X GNDOSC 1 OSCOFF SEL GNDOSC OSCOFFSEL VDDBUF PACKAGE PIN DESCRIPTION AND ASSIGNMENT 4X AFM Package Pin Out PIN ASSIGNMENTS Name Pin# Type Product Description OSCOFFSEL 1 I 2X & 4X Set to “0” (GND) to choose to turn off the oscillator when outputs are disabled (OE). Default (no connect) is OSC always on. GNDOSC 2 P 2X & 4X GND connection for oscillator circuitry. VCON 3 I 2X & 4X Control Voltage input. Use this pin to change the output frequency by varying the applied Control Voltage. XIN 4 I 2X & 4X Input from crystal oscillator circuitry. XOUT 5 O 2X & 4X Output from crystal oscillator circuitry. OE 6 I 2X & 4X Output Enable input (see "OE LOGIC SELECTION TABLE"). DNC 2X Do Not Connect. 4X External inductor connection. See INDUCTOR VALUE OPTIMIZATION on page 5. This inductor is used with 4X AFMs. 2X GND connection. 4X V DD connection for oscillator circuitry. 7 I 8 P GNDBUF 9 P 2X & 4X GND connection for output buffer circui try. Q 10 O 2X & 4X PECL/LVDS or CMOS output. QBAR 11 O 2X & 4X Complementary PECL/LVDS output or in phase CMOS. VDDBUF* 12 P 2X & 4X V DD connection for output buffer circuitry. VDDANA* 13 P 2X & 4X V DD connection for analog circuitry. OESEL 14 I 2X & 4X Selector input to choose the OE control logic (see “OE SELECTION TABLE”). Internal pull-down. VDDOSC* 15 P 2X & 4X V DD connection for oscillator circuitry. L2X 16 I 2X & 4X External inductor connection. See INDUCTOR VALUE OPTIMIZATION on page 5. L4X GNDANA VDDOSC* * All V D D pins should be separately decoupled whenever possible. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 13 Analog Frequency Multiplier PL56X-XX VCXO Family PACKAGE INFORMATION 16 PIN TSSOP ( mm ) Min. Max. 1.20 0.05 0.15 0.19 0.30 0.09 0.20 4.90 5.10 4.30 4.50 6.40 BSC 0.45 0.75 0.65 BSC E D A A1 C e QFN-16L e Nom Max A 0.70 0.75 0.80 A1 0.00 - 0.05 DDD L Dimension (mm) Min D1 0.20 A3 b 0.20 0.25 0.30 D 2.95 3.00 3.05 E 2.95 3.00 3.05 D1 1.65 1.70 1.75 E1 1.65 1.70 1.75 L 0.250 0.300 0.350 e L B E1 Symbol H DED Symbol A A1 B C D E H L e Pin1 Dot b A A3 0.50BSC SEATING PLANE A1 Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 14 Analog Frequency Multiplier PL56X-XX VCXO Family ORDERING INFORM ATION For part ordering, please contact our Sales Department: 2180 Fortune Drive, San Jose, CA 95131, USA Tel: (408) 944-0800 Fax: (408) 474-1000 PART NUMBER The order number for this device is a combination of the following: Part number, Package type and Operating temperature range PL56X-XX X X X NONE= TUBE R= TAPE AND REEL PART NUMBER TEMPERATURE C=COMMERCI AL I=INDUSTRIAL PACKAGE TYPE O=TSSOP-16L Q= QFN-16L D= Die Order Number PL560-XXDC PL560/5-XXOC PL560/5-XXOC-R PL560/5-XXQC PL560/5-XXQC-R Marking P560/5-XX OC LLLLL P560/5 XX(I) LLL Package Option* Die Only TSSOP – Tube TSSOP – Tape and Reel QFN – Tube QFN – Tape and Reel Marking Notes : “LLL”, “LLLLL” represents the pro ductio n lo t number Micrel Inc., reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Micrel is believed to be accurate and reliable. However, Micrel makes no guarantee or warranty concerning the accuracy of said info rmation and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: Micrel’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of Micrel Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/04/11 Page 15