LPM9029C Preliminary Datasheet N and P-Channel Enhancement Power MOSFET General Description Features The LPM9029C integrates N-Channel and P-Channel enhancement MOSFET Transistor. It uses advanced trench technology and design to provide excellent Trench Technology NMOS: VNDS=30V, IND=12A RNDS(ON) < 40mΩ @ VGS=2.5V RDS (ON) with low gate charge. This device is suitable for using in DC-DC conversion, power switch and charging circuit. Standard Product LPM9029C is RNDS(ON) < 20mΩ @ VGS=4.5V PMOS: VPDS=-20V, IPD=-4.5A Pb-free and Halogen-free. RPDS(ON) < 95mΩ @ VGS=-2.5V RPDS(ON) < 60mΩ @ VGS=-4.5V Ordering Information LPM9029C□ □ □ F: Pb-Free 1 SPMOS 3 GPMOS 4 SOP-8 TOP VIEW Extremely Low Threshold Voltage Small package SOP-8 SO: SOP-8 Driver for Relay, Solenoid, Motor, LED etc. DC-DC converter circuit Power Switch Load Switch Charging 8 2 Applications DNMOS Marking Information LPM9029C GNMOS Super high density cell design Package Type Pin Configurations SNMOS 7 DNMOS Device 6 DPMOS 5 DPMOS Marking LPM9029C Package Shipping SOP-8 3K/REEL Pin Description LPM9029C May.-2014 Email: [email protected] Pin Number Pin Description 1 Source Of NMOS 2 Gate Of NMOS 3 Source Of PMOS 4 Gate Of PMOS 5,6 Drain Of PMOS 7,8 Drain Of NMOS www.lowpowersemi.com Page 1 of 5 LPM9029C Preliminary Datasheet Absolute Maximum Ratings Parameter Symbol NMOS PMOS Drain-Source Voltage VDS 30 -20 Gate-Source Voltage VGS ±10 ±10 12 -4.5 Continuous Drain Current TA=25°C Maximum Power Dissipation TA=25°C Unit V A 2.5 W Operating Junction Temperature TJ -40 to 85 °C Lead Temperature TL 260 °C Storage Temperature Range Tstg -55 to 150 °C Thermal resistance ratings Parameter Junction-to-Case Thermal Resistance（Note b） Steady State LPM9029C May.-2014 Symbol NMOS PMOS Unit RθJC 50 50 ℃/W Email: [email protected] www.lowpowersemi.com Page 2 of 5 LPM9029C Preliminary Datasheet Electrical Characteristics N-Channel MOSFET Electrical Characteristics： Parameter Symbol Test Condition Min Typ. Max Units OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage BVDSS VGS = 0 V, ID =250uA 30 V Zero Gate Voltage Drain Current IDSS VDS =30V, VGS = 0V 500 nA Gate-to-source Leakage Current IGSS VDS =0V, VGS =±10V ±100 nA Gate Threshold Voltage VGS(TH) VGS = VDS, ID=250uA 0.95 V Drain-to-source On-resistance RDS(on) Forward Transconductance gFS VDS =2.5V, ID=10A Input Capacitance CISS VGS = 0V, 1550 Output Capacitance COSS f =1.0MHz 300 Reverse Transfer Capacitance CRSS VDS =15V 180 Total Gate Charge QG(TOT) VGS =4.5V, 13 Gate-to-Source Charge QGS VDS =15V, 5.5 Gate-to-Drain Charge QGD ID =10A 3.5 ON CHARACTERISTICS（ Note c） 0.4 VGS = 4.5V, ID=5A 40 VGS = 5V, ID=5A 20 4 mΩ S CAPACITANCES, CHARGES（ Note d） pF nC SWITCHING CHARACTERISTICS（ Note d） Turn-On Delay Time td(ON) VGS =10V, 30 Rise Time tr VDD =25V, 20 Turn-Off Delay Time td(OFF) ID=1.0A, 100 Fall Time tf RG=6Ω 80 VSD VGS = 0 V, IS =6A 0.2 ns BODY DIODE CHARACTERISTICS Forward Voltage(Note c) LPM9029C May.-2014 Email: [email protected] www.lowpowersemi.com 1.0 V Page 3 of 5 LPM9029C Preliminary Datasheet P-Channel MOSFET Electrical Characteristics： Parameter Symbol Test Condition Min -20 Typ. Max Units OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage BVDSS VGS = 0 V, ID =-250uA V Zero Gate Voltage Drain Current IDSS VDS =-20V, VGS = 0V -500 nA Gate-to-source Leakage Current IGSS VDS =0V, VGS =±10V ±100 nA Gate Threshold Voltage VGS(TH) VGS = VDS, ID =-250uA -0.95 V Drain-to-source On-resistance RDS(on) Forward Transconductance gFS VDS =-4.5V, ID =-3A Input Capacitance CISS VGS = 0V, 1600 Output Capacitance COSS f = 1.0MHz 350 Reverse Transfer Capacitance CRSS VDS =-15V 300 Total Gate Charge QG(TOT) VGS =- 4.5V, 30 Gate-to-Source Charge QGS VDS =-15V, 5.5 Gate-to-Drain Charge QGD ID =-3A 8 ON CHARACTERISTICS（ Note c） -0.4 VGS = -2.5V, ID =-2A 95 VGS =- 4.5V, ID = -4A 60 2 mΩ S CAPACITANCES, CHARGES（ Note d） pF nC SWITCHING CHARACTERISTICS（ Note d） Turn-On Delay Time td(ON) VGS =-10V, 10 Rise Time tr VDD =-20V, 15 Turn-Off Delay Time td(OFF) ID=-1.0A, Fall Time tf RG=6Ω VSD VGS = 0 V, IS =-1A ns 110 70 BODY DIODE CHARACTERISTICS Forward Voltage(Note c) -0.2 -0.95 V Note： a. Pulse width limited by maximum junction temperature. b. Surface mounted on FR4 board, t＜10s. c. Pulse width<295μs, Duty Cycle<2%. d. Guaranteed by design, not subject to production. LPM9029C May.-2014 Email: [email protected] www.lowpowersemi.com Page 4 of 5 Preliminary Datasheet LPM9029C Packaging Information LPM9029C May.-2014 Email: [email protected] www.lowpowersemi.com Page 5 of 5