Preliminary Datasheet LPM3400 LPM3400 - 20V/4.2A N-Channel Enhancement Mode Field Effect Transistor General Description The LPM3400 is N-channel logic enhancement mode power field effect transistor, which are produced by using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suitable for low voltage applications, notebook computer power management and other battery powered circuits where high-side switching are needed. Features ■ 20V/4.2A, RDC(ON)≤50mΩ(typ.)@VGS=4.5V ■ 20V/3.9A, RDC(ON)≤63mΩ(typ.)@VGS=2.5V ■ 20V/3.0A, RDC(ON)≤87mΩ(typ.)@VGS=1.8V ■ Super high density cell design for extremely low RDC(ON) ■ SOT23 Package Applications Portable Media Players Cellular and Smart mobile phone LCD DSC Sensor Wireless Card Ordering Information LPM3400- □ □ □ F: Pb-Free Marking Information Package Type Device Marking Package Shipping B3: SOT23-3 LPM3400B3F A2XXX SOT23-3 3K/REEL XXX : The production cycle and the batch. Pin Configurations SOT23L(Top View) LPM3400 – 01 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 7 Preliminary Datasheet LPM3400 Functional Pin Description Name Description G Gate Electrode S Source D Drain Electrode Absolute Maximum Ratings Absolute Maximum Ratings TA=25℃ Unless Otherwise noted Parameter Symbol Maximum Units Drain-Source Voltage VDS 20 V Gate-Source Voltage VGS ±8 V ID 4.2 Continuous Drain Current A TA=25℃ TA=70℃ 3.2 Pulsed Drain Current E Power Dissipation TA=25℃ IDM 15 PO 1.4 TA=70℃ A W 0.9 Junction and Storage Temperature Range TJ, TSTG -55 to 150 ℃ Thermal Characteristics Parameter Symbol Maximum Junction-to-Ambient A t ≤ 10S Maximum Junction-to-Ambient A Steady-state Maximum Junction-to-Lead C Steady-state LPM3400 – 01 May.-2013 Email: marketing@lowpowersemi.com RθJA RθJL www.lowpowersemi.com Typ. Max. Units 70 90 ℃/W 100 125 ℃/W 63 80 ℃/W Page 2 of 7 Preliminary Datasheet LPM3400 Electrical Characteristics Symbol Parameter Condition Min. Typ. Max. Units STATIC PARAMETER BVDSS Drain-Source Breakdown Voltage ID=250μ A,VGS=0V 20 IDSS Zero-Gate Voltage Drain Current VDS=16V,VGS=0V 1 TJ=55℃ 5 IGSS Gate-Body Leakage Current VDS=0V,VGS=±8V VGS(th) Gate Threshold Voltage VDS=VGS,ID=250μ A 0.4 ID(ON) On State Drain Current VDS=5V,VGS=4.5V 15 RDS(ON) Static Drain-Source On-Resistance V 0.6 μ A 100 nA 1 V A VGS=4.5V, ID=4.2 A 41 50 TJ=125℃ 58 70 VGS=2.5V, ID=3.9A 52 63 mΩ VGS=1.8V, ID=3A 67 87 mΩ 11 gFS Forward Transconductance VDS=5V,ID=4.2A VSD Diode Forward Voltage IS=1A,VGS=0V IS Maximum Body-Diode Continuous Current 0.76 mΩ S 1 V 2 A DYNAMIC PARAMETERS Ciss Input Capacitance VDS=10V,VGS=0V 436 pF CDSS Output Capacitance f = 1MHz 66 pF Crss Reverse Transfer Capacitance 44 pF Rg Gate Resistance 3 Ω VDS=0V,VGS=0V f = 1MHz SWITCHING PARAMETERS Qg Total Gate Charge VDS=10V,VGS=4.5V 6.2 nC Qgs Gate Source Charge ID=4.2A 1.6 nC Qgd Gate Drain Charge 0.5 nC t D(ON) Turn-On Delay Time VDS=10V,VGS=5V 5.5 nS tr Turn-On Rise Time RL=2.7Ω,RGEN=6Ω 6.3 nS t D(OFF) Turn-Off Delay Time 40 nS tf Turn-Off Fall Time 12.7 nS trr Body-Diode Reverse Recovery Time IF=4A,d I/dt=100/μS 12.3 nS Qrr Body-Diode Reverse Recovery Charge IF=4A,d I/dt=100/μS 3.5 nC LPM3400 – 01 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 7 Preliminary Datasheet LPM3400 – 01 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com LPM3400 Page 4 of 7 Preliminary Datasheet LPM3400 – 01 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com LPM3400 Page 5 of 7 Preliminary Datasheet LPM3400 – 01 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com LPM3400 Page 6 of 7 Preliminary Datasheet LPM3400 Packaging Information LPM3400 – 01 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 7 of 7