H7N0607DL, H7N0607DS Silicon N Channel MOS FET High Speed Power Switching REJ03G0124-0300 Rev.3.00 Jan.27.2005 Features • Low on-resistance RDS(on) = 26 mΩ typ. • Low drive current. • Capable of 4.5 V gate drive Outline PRSS0004ZD-B PRSS0004ZD-C (Previous code: DPAK(L)-2) (Previous code: DPAK-(S)) D 4 4 G 1 2 3 1. Gate 2. Drain 3. Source 4. Drain H7N0607DS S 1 2 3 H7N0607DL Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω Rev.3.00, Jan.27.2005, page 1 of 8 Symbol VDSS VGSS ID ID (pulse)Note1 IDR Note3 IAP EAR Note3 PchNote2 Tch Tstg Rating 60 ±20 20 80 20 8 5.48 25 150 –55 to +150 Unit V V A A A A mj W °C °C H7N0607DL, H7N0607DS Electrical Characteristics (Ta = 25°C) Item Drain to source break down voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cut off voltage Static drain to source on state resistance RDS(on) Forward transfer admittance Input capacitance Output capacitance Reverse transfer admittance Total gate charge Gate to source charge Gate to drain charge Turn-off delay time Rise time Body-drain diode forward voltage |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) Min 60 ±20 — — 1.5 — — 11 — — — — — — — — — tf VDF trr — — — Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Notes: 4. Pulse test Rev.3.00, Jan.27.2005, page 2 of 8 Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) Typ — — — — — 26 40 18 1100 160 90 21 4 5 20 90 65 Max — — ±10 10 2.5 34 56 — — — — — — — — — — Unit V V µA µA V mΩ mΩ S pF pF pF nC nC nC ns ns ns 15 0.93 25 — — — ns V ns Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 60 V, VGS = 0 ID = 1 mA, VDS = 10 V ID = 10 A, VGS = 10 VNote4 ID = 10 A, VGS = 4.5 VNote4 ID = 10 A, VDS = 10 VNote4 VDS = 10 V VGS = 0 f = 1 MHz VDD = 10 V VGS = 10 V ID = 20 A VGS = 10 V, ID = 10 A RL = 3.0 Ω Rg = 4.7 Ω IF = 20 A, VGS = 0Note4 IF = 20 A, VGS = 0 diF / dt = 100 A / µs H7N0607DL, H7N0607DS Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 100 PW 30 40 Drain Current ID (A) Channel Dissipation Pch (W) 50 30 20 10 10 10 1m m 1 pe ra 3 = Operation in this area is limited by RDS(on) 0.3 ) (T c 1 sh ot tio n s s s( O 0µ 25 °C ) 0.1 0.03 0 50 100 Case Temperature 150 Tc (°C) 0.01 Ta = 25°C 0.1 0.3 1 200 VGS = 10 V 4.5 V 4V Drain Current ID (A) 5.0 V 20 30 100 VDS (V) Typical Transfer Characteristics Pulse Test 30 10 50 6.0 V 40 3 Drain to Source Voltage Typical Output Characteristics 50 Drain Current ID (A) = D C 10 µs 10 VDS = 10 V Pulse Test 40 Tc = –40°C 25°C 30 150°C 20 3.5 V 10 10 2V 2 4 6 8 Drain to Source Voltage VDS (V) VDS(on) (mV) Drain to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage 0.5 0.3 Pulse Test 0.4 ID = 10 A 0.2 5A 0.1 2A 0 12 4 8 Gate to Source Voltage Rev.3.00, Jan.27.2005, page 3 of 8 0 10 16 VGS 20 (V) 2 4 6 8 Gate to Source Voltage 10 VGS (V) Static Drain to Source on State Resistance vs. Drain Current 1000 Pulse Test Drain to Source On State Resistance RDS(on) (mΩ) 0 300 100 VGS = 4.5 V 30 10 V 10 3 1 0.1 1 0.3 3 Drain Current 10 ID 30 (A) 100 H7N0607DL, H7N0607DS 80 ID = 10 A 60 5A 2A 4.5 V 40 2, 5, 10 A 20 VGS = 10 V 0 –50 0 50 100 150 Case Temperature Tc 100 Tc = –40°C 10 25°C 150°C 1 VDS = 10 V Pulse Test 0.1 200 1 Capacitance C (pF) 3000 30 10 3 0.3 1 3 Reverse Drain Current 10 30 IDR 100 (A) Ciss 1000 300 Coss 100 Crss 30 VGS = 0 f = 1 MHz 10 0 10 20 30 40 50 Drain to Source Voltage VDS (V) Dynamic Input Characteristics 60 VDS 40 20 0 12 8 VDD = 50 V 25 V 10 V 10 20 30 40 Gate Charge Qg (nc) Rev.3.00, Jan.27.2005, page 4 of 8 4 0 50 (V) t (ns) VDD = 50 V 25 V 10 V 16 VGS VGS 1000 Switching Time Drain to Source Voltage VDS (V) ID = 30 A 80 Switching Characteristics 20 Gate to Source Voltage 100 (A) 10000 100 1 0.1 ID Typical Capacitance vs. Drain to Source Voltage di / dt = 100 A / µs VGS = 0, Ta = 25°C 300 100 10 Drain Current (°C) Body-Drain Diode Reverse Recovery Time 1000 Reverse Recovery Time trr (ns) Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (mΩ) Static Drain to Source on State Resistance vs. Temperature 100 Pulse Test tr 300 td(off) 100 tf 30 10 td(on) tf tr 3 1 0.1 VGS = 10 V, VDS = 30 V PW = 5 µs, duty < 1 % Rg = 4.7 Ω 0.3 3 1 Drain Current 10 30 ID (A) 100 H7N0607DL, H7N0607DS Maximum Avalanche Energy vs. Channel Temperature Derating 10 V 20 15 5V 10 VGS = 0, –5 V 5 Pulse Test 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 VSD (mJ) Reverse Drain Current IDR (A) 25 8.0 Repetitive Avalanche Energy EAR Reverse Drain Current vs. Source to Drain Voltage 6.4 IAP = 8 A VDD = 25V duty < 0.1 % Rg > 50 Ω 4.8 3.2 1.6 0 25 50 75 100 125 150 Channel Temperature Tch (°C) (V) Tc = 25°C D=1 3 0.5 1 0.2 0.1 0.3 0.05 θch - c(t) = γs (t) • θch - c θch - c = 3.125°C/ W, Tc = 25°C 0.02 0.1 0.01 ho t PDM 0.03 D= 1s Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 10 PW T PW T 0.01 10 µ 100 µ 1m 10 m 100 m Pulse Width PW (s) Avalanche Test Circuit V DS Monitor 1 10 Avalanche Waveform EAR = L 1 2 • L • I AP • 2 I AP Monitor VDSS VDSS – V DD V (BR)DSS I AP Rg D. U. T V DS VDD ID Vin 15 V 50Ω 0 Rev.3.00, Jan.27.2005, page 5 of 8 VDD H7N0607DL, H7N0607DS Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor Rg 90% D.U.T. RL Vin Vout Vin 10 V V DS = 30V 10% 90% td(on) Rev.3.00, Jan.27.2005, page 6 of 8 10% tr 10% 90% td(off) tf H7N0607DL, H7N0607DS Package Dimensions • H7N0607DL RENESAS Code Previous Code MASS[Typ.] PRSS0004ZD-B DPAK(L)-(2) / DPAK(L)-(2)V 0.42g Unit: mm 1.7 ± 0.5 JEITA Package Code 2.3 ± 0.2 0.55 ± 0.1 1.2 ± 0.3 16.2 ± 0.5 3.1 ± 0.5 1.15 ± 0.1 0.8 ± 0.1 (0.7) 4.7 ± 0.5 5.5 ± 0.5 6.5 ± 0.5 5.4 ± 0.5 0.55 ± 0.1 0.55 ± 0.1 2.29 ± 0.5 2.29 ± 0.5 • H7N0607DS RENESAS Code Previous Code MASS[Typ.] SC-63 PRSS0004ZD-C DPAK(S) / DPAK(S)V 0.28g 6.5 ± 0.5 5.4 ± 0.5 (0.1) Unit: mm 2.3 ± 0.2 0.55 ± 0.1 0 – 0.25 2.5 ± 0.5 (1.2) 1.0 Max. 2.29 ± 0.5 Rev.3.00, Jan.27.2005, page 7 of 8 (5.1) (5.1) (0.1) 1.2 Max 5.5 ± 0.5 1.5 ± 0.5 JEITA Package Code 0.8 ± 0.1 2.29 ± 0.5 0.55 ± 0.1 H7N0607DL, H7N0607DS Ordering Information Part Name H7N0607DL H7N0607DSTL H7N0607DL-E H7N0607DSTL-E Quantity 100 pcs 3000 pcs 100 pcs 3000 pcs Shipping Container Sack Taping Sack Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00, Jan.27.2005, page 8 of 8 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. http://www.renesas.com RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 © 2005. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .2.0