PI3HDMI2410-A

PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Features
Description
ÎÎ4:1 HDMI Switch Mux/DeMux
Pericom Semiconductor’s PI3HDMI series of switch circuits are
targeted for high-resolution video networks that are based on
DVI/HDMI™ standards. The PI3HDMI2410-A is a 4-to-1 HDMI
Mux/DeMux signal switch. It is designed for low bit-to-bit skew
and high channel-to-channel noise isolation. The maximum data
rate support is up to 4.6Gbps which can meet HDMI 1.3a standard and support the resolution requirement of next generation
HDTV and PC graphics of HDMI 1.4.
ÎÎNon-Blocking EQ path for ideal EQ control in main
Receiver chipset
ÎÎ-3dB bandwidth up to 4.6Gbps to support HDMI 1.3a (16-
bit color depth per channel)
ÎÎHDMI 1.4 data rate ready
ÎÎDDC active signal buffer or passive switch selectable
ÎÎI2C Register control for switch configuration
PI3HDMI2410-A is designed specifically for ATC-Sink requirements. All switch control settings are through I2C bus to provide
flexible design and reduce peripheral components. Selectable active signal buffer for DDC bus can optimize the bi-directional
data transmission for long trace or cable applications.
ÎÎAutomatic HDCP reset circuitry for quick communication
when switching from one port to another
ÎÎConnector Plug-in detection and Interrupt Flag setting
ÎÎSelectable HPD signal outputs with 5V open drain output
stage or 3.3V output buffer
ÎÎ3.3V power supply and standby power supply
All input pins are protected with Pericom’s ESD protection circuits supporting ESD damage as high as 8kV contact
per IEC61000-4-2 Level 4 specification. The ultra-low power
operation of PI3HDMI2410-A meets the demand of low power
consumption Energy Star™ designs.
ÎÎTMDS output enable control
ÎÎUltra-low power consumption to support Energy Star™
Compliance
ÎÎESD protection on all I/O pins
àà 8kV contact per IEC61000-4-2, level 4
ÎÎPackaging (Pb-free & Green available):
àà 80-contact LQFP
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PS-0.1
04/26/10
PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Block Diagram
HPD[A:D]
D[0:3] +A
D[0:3] -A
HPD_SINK
100KΩ
240KΩ
HPD
Programming
240KΩ
OE
D+[0:3]
D-[0:3]
4:1
Mux
I2C
Controller
D[0:3]+D
D[0:3]-D
240KΩ
240KΩ
Control & Status
Register
Selectable,
DDC Buffer or
Passive Switch
SCL_A
SDA_A
SCL_D
SDA_D
SCL_CTL
SDA_CTL
5V_PortA
5V_PortB
5V_PortC
5V_PortD
DDC_WP[A:D]
INT_OUT
SCL_SINK
4:1
Mux
SDA_SINK
VSEL
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PS-0.1
04/26/10
PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
LQFP-80
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
5V_PORTA
5V_PORTB
5V_PORTC
5V_PORTD
SDA_CTL
SCL_CTL
D0D0+
D1D1+
VDD
D2D2+
D3D3+
A0
A1
HPD_SINK
HPD_A
HPD_B
D2+D
D3-D
D3+D
GND
VDD
SDA_A
SDA_B
SDA_C
SDA_D
SDA_SINK
SVDD
SCL_A
SCL_B
SCL_C
SCL_D
GND
SCL_SINK
HPD_D
HPD_C
GND
D0+B
D1-B
D1+B
D2-B
D2+B
D3-B
D3+B
D0-C
D0+C
D1-C
D1+C
D2-C
D2+C
D3-C
D3+C
D0-D
D0+D
D1-D
D1+D
D2-D
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
D0-B
VDD
D3+A
D3-A
D2+A
D2-A
VDD
D1+A
D1-A
SVDD
D0+A
D0-A
/OE
VSEL
IN_OUT
GND
DDC_WPA
DDC_WPB
DDC_WPC
DDC_WPD
Pin Assignment – 80-Contact LQFP
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PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Pinout Table
Pin Name
I/O Type
Description
VDD
Power
3.3V power supply. When VDD is off, the TMDS and DDC channels will be powered
down.
SVDD
Power
3.3V or 5V standby power supply. SVDD is for all side band signals (except DCC) and the
I2C control register unit.
GND
Ground
Ground connection
HPD_SINK
I
Sink side hot plug detector input with 100kΩ pull-down resistor to ground.
HPD_A
O
Port A HPD output
HPD_B
O
Port B HPD output
HPD_C
O
Port C HPD output
HPD_D
O
Port D HPD output
I/O
Port A TMDS input / output
I/O
Port B TMDS input / output
I/O
Port C TMDS input / output
D0+A
D0-A
D1+A
D1-A
D2+A
D2-A
D3+A
D3-A
D0+B
D0-B
D1+B
D1-B
D2+B
D2-B
D3+B
D3-B
D0+C
D0-C
D1+C
D1-C
D2+C
D2-C
D3+C
D3-C
Continued >
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PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Pin Name
I/O Type
Description
I/O
Port D TMDS input / output
I/O
Sink Side TMDS input / output
SCL_A
I/O
Port A DDC Clock
SCL_B
I/O
Port B DDC Clock
SCL_C
I/O
Port C DDC Clock
SCL_D
I/O
Port D DDC Clock
SDA_A
I/O
Port A DDC Data
SDA_B
I/O
Port B DDC Data
SDA_C
I/O
Port C DDC Data
SDA_D
I/O
Port D DDC Data
SCL_SINK
I/O
Sink side DDC Clock
SDA_SINK
I/O
Sink side DDC Data
SCL_CTL
I/O
I2C Clock
SDA_CTL
I/O
I2C Data
INT_OUT
O
Interrupt pin. Logic status output pin of INT flag.
O
Open drain output. General purpose logic configured by B0b[5].
I
Output Enable control. Active low. OE only disables the high-speed TMDS channel but
not the side band signals and I2C circuitry supplied by SVDD.
D0+D
D0-D
D1+D
D1-D
D2+D
D2-D
D3+D
D3-D
D0+
D0D1+
D1D2+
D2D3+
D3-
DDC_WPA,
DDC_WPB,
DDC_WPC,
DDC_WPD,
OE
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PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Pin Name
I/O Type
Description
A1
I
I2C Address 1
A0
I
I2C Address 0
I
Connector 5V port.
5V_PortA,
5V_PortB,
5V_PortC,
5V_PortD
DDC buffer VIL selection.
VSEL
VSEL = 0V, VIL = 0.5V (Default value with 70kΩ pull-down resistor)
I
VSEL = 0.5 VDD, VIL=0.45V
VSEL = VDD, VIL=0.6V
I2C Control Register
Address Byte
b7 (MSB) b6
b5
b4
b3
b2
b1
b0 (R/W)
1
1
0
1
A1 (W)
A0 (W)
1/0 *
0
* 0:Write; 1:Read
Truth Table
If HPD Sink is used, B0b[4] = 0
Port Selection HPD Input Select
HPD Output Select
HPDA
HPDB
HPDC
HPDD
Port A
HPD Sink
Open Drain
HPD Sink
L
L
L
Port B
HPD Sink
Open Drain
L
HPD Sink
L
L
Port C
HPD Sink
Open Drain
L
L
HPD Sink
L
Port D
HPD Sink
Open Drain
L
L
L
HPD Sink
Port Selection HPD Input Select
HPD Output Select
HPDA
HPDB
HPDC
HPDD
Port A
HPD Sink
Buffer
HPD Sink
H
H
H
Port B
HPD Sink
Buffer
H
HPD Sink
H
H
Port C
HPD Sink
Buffer
H
H
HPD Sink
H
Port D
HPD Sink
Buffer
H
H
H
HPD Sink
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PS-0.1
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PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Data Byte 0: Control Register For register access, Byte 0 and Byte 1 are sequentially Read or Write together
Bit
Description
Type
Power Up
Condition
7
HDMI input port selection
W
0
6
HDMI input port selection
W
0
Logic Settings
00 = Port A
01 = Port B
10 = Port C
11 = Port D
0 = Not active.
5
DDC_WP Write Protection
Setting
W
0
DDC_WPA, DDC_WPB, DDC_WPC,
and DDC_WPD pins are all set to Hi-Z
1 = Write Protection Active
DDC_WPA, DDC_WPB, DDC_WPC, and
DDC_WPD pins are all set to logic Low.
0 = HPD_SINK
When B1b[7] = 0 (open drain mode)
HPD[A:D] logic = HPD_SINK logic
When B1b[7] = 1 (output buffer mode)
4
HPD Input Selection
W
0
HPD[A:D] logic = Inverted HPD_SINK
logic
1 = I2C Register Setting from B0b[0:3]
Under I2C register control mode, HPD[A:D]
can be individually controlled by B0b[0:3] for
HPD output.
I. Byte0 b[4] = 1
When B1b[7] = 0 (open drain mode)
B0b[3]=0, set HPD [D] to Low
B0b[3]=1, set HPD [D] to Hi-Z
3
HPD Port D Logic Setting
R/W
0
When B1b[7] = 1 (output buffer mode)
B0b[3]=0, set HPD [D] to High
B0b[3]=1, set HPD [D] to Low
II. Byte0 b[4] = 0
Test Mode
Continued >
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PS-0.1
04/26/10
PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Bit
Description
Power Up
Condition
Type
Logic Settings
I. Byte0 b[4] = 1
When B1b[7] = 0 (open drain mode)
B0b[2]=0, set HPD [C] to Low
B0b[2]=1, set HPD [C] to Hi-Z
2
HPD Port C Logic Setting
R/W
0
When B1b[7] = 1 (output buffer mode)
B0b[2]=0, set HPD [C] to High
B0b[2]=1, set HPD [C] to Low
II. Byte0 b[4] = 0
Test Mode
I. Byte0 b[4] = 1
When B1b[7] = 0 (open drain mode)
B0b[1]=0, set HPD [B] to Low
B0b[1]=1, set HPD [B] to Hi-Z
1
HPD Port B Logic Setting
R/W
0
When B1b[7] = 1 (output buffer mode)
B0b[1]=0, set HPD [B] to High
B0b[1]=1, set HPD [B] to Low
II. Byte0 b[4] = 0
Test Mode
I. Byte0 b[4] = 1
When B1b[7] = 0 (open drain mode)
b[0]=0, set HPD [A] to Low
b[0]=1, set HPD [A] to Hi-Z
0
HPD Port A Logic Setting
R/W
0
When B1b[7] = 1 (output buffer mode)
b[0]=0, set HPD [A] to High
b[0]=1, set HPD [A] to Low.
II. Byte0 b[4] = 0
Test Mode
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PS-0.1
04/26/10
PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Data Byte 1: Control Register Bit
Description
Type
Power Up
Condition
7
HPD Output Stage selection
W
0
Logic Settings
0 = Open Drain
1 = Output Buffer
0 = Output Disable
6
TMDS Output Enable
W
1
Disabled TMDS channel and enter standby
mode. Side band signals and I2C circuitry
are still alive.
1 = Output Enable
0 = Disconnected
5
5V_PortD connect
R
0
1 = Connected;
INT Flag B1b[1] is set by 5V_PortD edge
signal when logic state changes from High
to Low or from Low to High.
0 = Disconnected
4
5V_PortC connect
R
0
1 = Connected
INT Flag B1b[1] is set by 5V_PortC edge
signal when logic state changes from High
to Low or from Low to High
0 = Disconnected
3
5V_PortB connect
R
0
1 = Connected
INT Flag B1b[1] is set by 5V_PortB edge
signal when logic state changes from High
to Low or from Low to High.
0 = Disconnected
2
5V_PortA connect
R
0
1 = Connected
INT Flag B1b[1] is set by 5V_PortA edge
signal when logic state changes from High
to Low or from Low to High.
0 = INT Flag Clear
1 = INT Flag Set
1
INT Flag
RW
0
INT Flag will be set from logic Low to
High, when any 5V_Port has detected plug
or unplug transition action. INT Flag is
cleared to low after I2C bus reads the register byte 1.
0 = Passive switch
0
DDC channel selection
10-0163
W
0
9
1 = Active switch buffer
For power saving operation, passive switch
can be selected to further reduce the active
power consumption.
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PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
HPD Output Buffer
HPD
Output
Buffer
300K Ohm
Weak Pull-down
Note:
1. During normal or standby mode, the HPD block is active. HPD signal output is programmed by the control register, B0b[0:4].
2. Open drain buffer is recommended with a 1K-Ohm pull-up resistor to 5V. If HPD output buffer is selected, external buffer transistor is required to avoid 5V to
3.3V leakage.
HPD Output Logic Control
Byte 0 bit 4 selects the HPD signal input from HPD_Sink pin or from internal control register B0b[0:3]. SVDD provides power supply
to HPD block.
HPD
SVDD, 5V Standby Power
B0b[4]=1, HPD = I2C Register Setting
B0b[3:0]
B0b[4]=0, HPD = HPD_SINK
Off
LOW
(internal weak pulldown resistor to ground)
LOW
(internal weak pulldown resistor to ground)
On
Control Register Setting
HPD_Sink (Default=Low)
TMDS Channel Pull-down Resistor Control
Pull-down resistor active conditions:
1. The Data Channel is unselected
2. Output enable control OE is disable(OE=High) or B1b[6]=Low, pull down on all channels
3. Without normal operation supply VDD input (but standby voltage SVDD is still On), pull down on all channels
Output Enable Control
Output Enable or Disable can be asserted through external OE pin or through I2C.
OE
OE_I2C B1b[6]
Operation
Low
High
Enable
Low
Low
Disable
High
X
Disable
* Default value: OE = Low ; Byte 1 b[6] = High
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PS-0.1
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PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Absolute Maximum Ratings (Over operating free-air temperature range)
Item
Rating
Supply Voltage to Ground Potential
5.5V
All Inputs and Outputs
-0.5V to VDD+0.5V
Ambient Operating Temperature
-20 to +85°C
Storage Temperature
-65 to +150°C
Junction Temperature
150°C
Soldering Temperature
260°C
Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
Recommended Operation Conditions
Parameter
Min.
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Typ.
Max.
Unit
-40
+85
°C
+3.0
+3.6
V
DC Specifications VDD = 3.3V ±10%, Ambient Temperature -40 to +85°C Symbol
Parameter
VDD
Operating Voltage
IDD
Supply Current of VDD
and SVDD
IDDQ
Min
Nom
Max
Units
3.0
3.3
3.6
V
Output Enable, SVDD = 3.3V
4
5.0
Quiescent Supply Current of VDD and SVDD
Output Disable, SVDD = 3.3V
1.0
2.0
IDDsb
Standby Supply Current
SVDD = 3.3V, VDD = 0V
0.1
0.5
VOH_DDC
DDC passive switch
Output High Voltage
VOL_DDC
10-0163
DDC Buffer Output
Low Voltage
Conditions
mA
VIN = 3.3V
External pull-up to VDD from
1.5kΩ to 2kΩ.
VDD -1.0
Source side, External pull-up to
VDD from 1.5kΩ to 4.7kΩ
Sink side, IOL = 3mA
11
V
0.4
0.65
0.75
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PS-0.1
04/26/10
PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Symbol
VIH_5V_A,
VIH_5V_B,
VIH_5V_C ,
VIH_5V_D,
VIL_5V_A,
VIL_5V_B,
VIL_5V_C ,
VIL_5V_D,
Parameter
Conditions
Min
Input High Voltage of
5V ports
Max
Units
2.4
Input Low Voltage of 5V
ports
0.8
Buffer Output Low
Voltage
IOL = 4 mA
Open Drain Output
Low Voltage
IOL = 4 mA
0
VOH_HPD
Buffer Output High
Voltage
IOH = 3 mA
2.4
IOFF (HPD)
Off Leakage Current
VOL_HPD
Nom
0.4
0.4
VDD = 0V, VIN = 3.6V
12
VDD = 0V, VIN = 5.5V
20
μA
IOZ_HPD
Open Drain Output
Leakage Current
VOL_DDC_WP
Open Drain Output
Low Voltage
CIO1
Input/output capacitance (Passive Switch)
VDD = 3.6V, VIN = 3.6V
12
VDD = 3.6V, VIN = 5.5V
21
VDD = 0V or 3.0V, Frequency =
100kHz
6
0.4
V
9
pF
Note:
1. Measured at Vbias = 0V or 5V, Vrms = 0.2V; Vbias = 1.65V, Vrms = 0.2V; Vbias = 2.5V, Vrms = 1.2V
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PS-0.1
04/26/10
PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
DDC Channel Block
VDD = 3.3V ±10%, Ambient Temperature -40 to +85°C
Symbol
Parameter
Conditions
Min. Typ.
VOH Passive (Sink)
Sink Side DDC Passive Switch Output High
Voltage
VIN=3.3V.
External pull-up Rup to
VDD from 1.5kΩ to 2kΩ
VDD 0.5
V
VIH_DDC
Source Side DDC Buffer Input High Voltage
2
V
VIL_DDC
Source Side DDC Buffer Input Low Voltage
VOL_DDC1
Sink Side DDC Buffer Output Low Voltage,
VSEL = VDD
VIL_DDC1
Sink Side DDC Buffer Input Low Voltage,
VSEL = VDD
VOL_DDC2
Sink Side DDC Buffer Output Low Voltage,
VSEL = GND
VIL_DDC2
Sink Side DDC Buffer Input Low Voltage,
VSEL = GND
VOL_DDC3
Sink Side DDC Buffer Output Low Voltage,
VSEL = 0.5 VDD
VIL_DDC3
Sink Side DDC Buffer Input Low Voltage,
VSEL = 0.5 VDD
External pull-up Rup to
VDD from 1.5kΩ to 2kΩ
External pull-up Rup to
VDD from 1.5kΩ to 2kΩ
External pull-up to VDD
from 1.5kΩ to 2kΩ
0.7
0.7
0.7
Max. Unit
0.4
V
0.9
V
0.62
V
0.9
V
0.5
V
0.9
V
0.46
V
DDC Channel Application Diagram
3.3V
Rup
Selectable
DDC Buffer or
SCL_A
SDA_A
SCL_SINK
4:1
SCL_D
SDA_D
3.3V
Rup
TV
Controller
SDA_SINK
VSEL
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PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Dynamic Specifications
VDD = 3.3V ±10%, TA -40 to +85°C, GND = 0V
Parameter
Description
Conditions
XTALK
Crosstalk on High-speed
Channels
Min
Typ
f = 1.13 GHz
-34
f = 825 MHz
-36
Max
Units
dB
OFF Isolation on High-speed
Channels
OIRR
Defferential Insertion Loss on
High-speed Channels
ILOSS
BW
f = 1.13 GHz
-36
f = 825 MHz
-38
DR = 1.65Gbps
-1.5
DR = 2.0Gbps
-1.73
DR = 2.25Gbps
-1.82
DR = 3.0Gbps
-2.4
DR = 3.4Gbps
-2.7
-3dB BW for TMDS channels
dB
2.3
GHz
Capacitance Measurement Test Condition
Capacitance
SDA_CTL
3.0
SCL_CTL
2.3
HPD_Sink
1.7
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Units
pF
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PS-0.1
04/26/10
PI3HDMI2410-A
4-Port HDMI™ Signal Switch with I2C Control
Packaging Mechanical: 80-Contact LQFP (FF)
1
DATE: 03/18/09
DESCRIPTION: 80-contact, Low Profile Quad Flat Package (LQFP)
PACKAGE CODE: FF (FF80)
REVISION: A
DOCUMENT CONTROL #: PD-2064
07-0100
Note:
• For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php
Ordering Information
Ordering Code
Package Code
Package Type
PI3HDMI2410-AFFE
FF80
Pb-free & Green, 80-Contact, LQFP
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. E = Pb-free and Green
3. Adding an X suffix = Tape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336
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