BVDSS = 500 V RDS(on) typ ȍ HFS840 ID = 9.0 A 500V N-Channel MOSFET TO-220F FEATURES Originative New Design 1 Superior Avalanche Rugged Technology Robust Gate Oxide Technology 2 3 1.Gate 2. Drain 3. Source Very Low Intrinsic Capacitances Excellent Switching Characteristics Unrivalled Gate Charge : 25 nC (Typ.) Extended Safe Operating Area Lower RDS(ON) ȍ7\S#9GS=10V 100% Avalanche Tested Absolute Maximum Ratings Symbol TC=25 unless otherwise specified Parameter Value Units 500 V VDSS Drain-Source Voltage ID Drain Current – Continuous (TC = 25ఁ͚͑ 9.0* A Drain Current – Continuous (TC = 100ఁ͚͑ 5.4* A IDM Drain Current – Pulsed 36* A VGS Gate-Source Voltage ρͤ͑͡ V EAS Single Pulsed Avalanche Energy (Note 2) 360 mJ IAR Avalanche Current (Note 1) 9.0 A EAR Repetitive Avalanche Energy (Note 1) 13.5 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns PD Power Dissipation (TC = 25ఁ͚͑ ͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͞͵ΖΣΒΥΖ͑ΒΓΠΧΖ͑ͣͦఁ͑ 44 W TJ, TSTG Operating and Storage Temperature Range TL Maximum lead temperature for soldering purposes, 1/8” from case for 5 seconds (Note 1) 0.35 W/ఁ͑ -55 to +150 ఁ͑ 300 ఁ͑ * Drain current limited by maximum junction temperature Thermal Resistance Characteristics Typ. Max. RșJC Symbol Junction-to-Case Parameter -- 2.86 RșJA Junction-to-Ambient -- 62.5 Units ఁ͠Έ͑ క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝΄ΖΡ͑ͣ͑͢͢͡ HFS840 Sep 2011 Symbol Parameter unless otherwise specified Test Conditions Min Typ Max Units On Characteristics VGS RDS(ON) Gate Threshold Voltage VDS = VGS, ID = 250 Ꮃ͑ 2.5 -- 4.5 V Static Drain-Source On-Resistance VGS = 10 V, ID = 4.5 A͑ -- 0.7 0.85 ͑ש VGS = 0 V, ID = 250 Ꮃ͑ 500 -- -- V ID = 250 Ꮃ͑͝ΖΗΖΣΖΟΔΖΕ͑ΥΠͣͦఁ͑ -- 0.57 -- ·͠ఁ͑ VDS = 500 V, VGS = 0 V͑ -- -- 1 Ꮃ͑ VDS = 400 V, TC = 125ఁ͑ -- -- 10 Ꮃ͑ Off Characteristics BVDSS Drain-Source Breakdown Voltage ԩBVDSS Breakdown Voltage Temperature Coefficient /ԩTJ IDSS Zero Gate Voltage Drain Current IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 Ꮂ͑ IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 Ꮂ͑ -- 1000 1300 Ꮔ͑ -- 130 170 Ꮔ͑ -- 20 26 Ꮔ͑ -- 25 50 Ꭸ͑ -- 60 120 Ꭸ͑ -- 130 260 Ꭸ͑ -- 90 180 Ꭸ͑ -- 25 33 Οʹ͑ -- 6 -- Οʹ͑ -- 12 -- Οʹ͑ Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz͑ Switching Characteristics td(on) Turn-On Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd VDS = 250 V, ID = 9.0 A, RG = 25 ͑ש ͑ ͙͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑ͿΠΥΖ͚͑ͥͦ͑͝ VDS = 400V, ID = 9.0 A, VGS = 10 V ͙ͿΠΥΖ͚͑ͥͦ͑͝ Gate-Drain Charge Source-Drain Diode Maximum Ratings and Characteristics IS Continuous Source-Drain Diode Forward Current -- -- 9.0 ISM Pulsed Source-Drain Diode Forward Current -- -- 36 VSD Source-Drain Diode Forward Voltage IS = 9.0 A, VGS = 0 V -- -- 1.4 V trr Reverse Recovery Time -- 335 -- Ꭸ͑ Qrr Reverse Recovery Charge IS = 9.0 A, VGS = 0 V diFGW $ȝV(Note 4) -- 2.95 -- ȝ& A Notes ; 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L=8mH, IAS=9.0A, VDD=50V, RG=25:, Starting TJ =25qC 3. ISD$GLGW$ȝV9DD%9DSS , Starting TJ =25 qC 4. Pulse Test : Pulse Width ȝV'XW\&\FOH 5. Essentially Independent of Operating Temperature క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝΄ΖΡ͑ͣ͑͢͢͡ HFS840 Electrical Characteristics TC=25 qC HFS840 Typical Characteristics Figure 1. On Region Characteristics Figure 2. Transfer Characteristics Figure 3. On Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 2000 Ciss Coss 1000 500 * Note ; 1. VGS = 0 V 2. f = 1 MHz Crss VDS = 100V VGS, Gate-Source Voltage [V] 1500 Capacitances [pF] 12 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 10 VDS = 250V VDS = 400V 8 6 4 2 * Note : ID = 9.0 A 0 10-1 0 100 101 0 5 10 15 20 25 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 30 క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝΄ΖΡ͑ͣ͑͢͢͡ HFS840 Typical Characteristics (continued) Figure 8. On-Resistance Variation vs Temperature Figure 7. Breakdown Voltage Variation vs Temperature 10 Operation in This Area is Limited by R DS(on) 10 Ps 8 101 100 ID, Drain Current [A] 100 Ps 1 ms 10 ms 100 ms DC 10-1 * Notes : 1. TC = 25 oC 10-2 100 6 4 2 2. TJ = 150 oC 3. Single Pulse 101 102 0 25 103 50 75 100 125 150 TC, Case Temperature [oC] VDS, Drain-Source Voltage [V] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs Case Temperature D=0.5 ZTJC(t), Thermal Response ID, Drain Current [A] 102 100 0.2 0.1 0.05 -1 10 PDM 0.02 * Notes : 1. ZTJC(t) = 2.86 oC/W Max. 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * ZTJC(t) 0.01 t1 single pulse 10-2 -5 10 10-4 10-3 10-2 t2 10-1 100 101 t1, Square Wave Pulse Duration [sec] Figure 11. Transient Thermal Response Curve క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝΄ΖΡ͑ͣ͑͢͢͡ HFS840 Fig 12. Gate Charge Test Circuit & Waveform .ȍ 12V VGS Same Type as DUT Qg 200nF 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL VDS VDS 90% VDD RG ( 0.5 rated VDS ) Vin DUT 10V 10% tr td(on) td(off) t on tf t off Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD L VDS VDD ID BVDSS IAS RG 10V ID (t) DUT VDS (t) VDD tp Time క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝΄ΖΡ͑ͣ͑͢͢͡ HFS840 Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • IS controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝΄ΖΡ͑ͣ͑͢͢͡ HFS840 Package Dimension {vTYYWmG ±0.20 ±0.20 2.54±0.20 6.68±0.20 0.70±0.20 12.42±0.20 3.30±0.20 2.76±0.20 1.47max 9.75±0.20 15.87±0.20 ± ij 0 0.2 0.80±0.20 0.50±0.20 2.54typ 2.54typ క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝΄ΖΡ͑ͣ͑͢͢͡