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Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. “Standard”: 8. 9. 10. 11. 12. (Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics. DATA SHEET MOS FIELD EFFECT TRANSISTOR μPA2352 Dual N-CHANNEL MOSFET DESCRIPTION OUTLINE DRAWING (Unit: mm) The μPA2352 is a Dual N-channel MOSFET designed for LithiumIon battery protection circuit. Ecologically Flip chip MOSFET for Lithium-Ion battery Protection (EFLIP). TOP VIEW • • • Monolithic Dual MOSFET Connecting the Drains on the circuit board is not required because the Drains of the FET1 and the FET2 are internally connected. 2.5 V drive available and low on-state resistance RSS(on)1 = 43.0 mΩ MAX. (VGS = 4.5 V, IS = 2.0 A) RSS(on)2 = 45.0 mΩ MAX. (VGS = 4.0 V, IS = 2.0 A) RSS(on)3 = 55.0 mΩ MAX. (VGS = 3.1 V, IS = 2.0 A) RSS(on)4 = 67.0 mΩ MAX. (VGS = 2.5 V, IS = 2.0 A) Built-in G-S protection diode against ESD Pb-free bump 0.65 G2 1.40 ± 0.02 FEATURES • BOTTOM VIEW 1.40 ± 0.02 S2 0.65 G1 S1 Dot area (For in-house) 1-pin index mark S1 4 - φ 0.37 // 0.1 S 0.2 ± 0.02 S 0.28 ± 0.03 S1 : Source1 G1 : Gate1 G2 : Gate2 S2 : Source2 0.08 S ORDERING INFORMATION PART NUMBER μPA2352T1G-E4-A Note PACKAGE 4 PIN EFLIP EQUIVALENT CIRCUIT Note "-A" indicates Pb-free (This product does not contain Pb in external electrode and other parts)."-E4" indicates the unit orientation (-E4 only). FET1 FET2 Gate1 Gate2 ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Source to Source Voltage (VGS = 0 V) VSSS 24 Gate to Source Voltage (VSS = 0 V) VGSS ±12 Note1 Source Current (DC) ±4.0 IS(DC) Note2 Source Current (pulse) ±40 IS(pulse) Note1 Total Power Dissipation (2units) 0.75 PT Channel Temperature Tch 150 Storage Temperature Tstg −55 to +150 Notes 1. Mounted on BT resin board of 40.5 mm x 25 mm x 1.5 mm 2. PW ≤ 100 μs, Duty Cycle ≤ 1% <R> V V A A W °C °C Gate Protection Diode Source2 Source1 Body Diode Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G17881EJ2V0DS00 (2nd edition) Date Published October 2006 NS CP(K) Printed in Japan The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. 2006 μPA2352 ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL Zero Gate Voltage Source Current ISSS Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance Note Source to Source On-state Resistance TEST CONDITIONS Note MIN. TYP. MAX. UNIT 10 μA ±10 μA 1.5 V VSS = 24.0 V, VGS = 0 V, TEST CIRCUIT 1 IGSS VGS = ±12.0 V, VSS = 0 V, TEST CIRCUIT 2 VGS(off) VSS = 10.0 V, IS = 1.0 mA, TEST CIRCUIT 3 0.5 | yfs | VSS = 10.0 V, IS = 2.0 A, TEST CIRCUIT 4 2.5 RSS(on)1 VGS = 4.5 V, IS = 2.0 A, TEST CIRCUIT 5 24.0 35.0 43.0 mΩ RSS(on)2 VGS = 4.0 V, IS = 2.0 A, TEST CIRCUIT 5 25.0 37.0 45.0 mΩ RSS(on)3 VGS = 3.1 V, IS = 2.0 A, TEST CIRCUIT 5 31.5 42.0 55.0 mΩ VGS = 2.5 V, IS = 2.0 A, TEST CIRCUIT 5 33.5 50.0 67.0 mΩ RSS(on)4 1.0 S Input Capacitance Ciss VSS = 10.0 V, VGS = 0 V, f = 1.0 MHz 330 pF Output Capacitance Coss TEST CIRCUIT 7 80 pF Reverse Transfer Capacitance Crss 55 pF Turn-on Delay Time td(on) IS = 4.0 A, VGS = 4.0 V, VDD = 20.0 V, 22 ns RG = 6.0 Ω, TEST CIRCUIT 8 132 ns td(off) 183 ns tf 216 ns 5.7 nC 1.0 V Rise Time tr Turn-off Delay Time Fall Time Gate to Source Charge QG VG1S1 = 4.0 V, IS = 4.0 A, VDD = 20.0 V, TEST CIRCUIT 9 Body Diode Forward Voltage Note IF = 4.0 A, VGS = 0 V, TEST CIRCUIT 6 VF(S-S) Note Pulsed Both the FET1 and the FET2 are measured. Test circuits are example of measuring the FET1 side. TEST CIRCUIT 1 ISSS TEST CIRCUIT 2 IGSS S2 S2 When FET1 is G2 measured, between G2 GATE and SOURCE A of FET2 are shorted. G1 VSS A VGS S1 G1 S1 TEST CIRCUIT 3 VGS(off) TEST CIRCUIT 4 | yfs | S2 When FET1 is S2 ΔIS/ΔVGS G2 G2 measured, between A A GATE and SOURCE A A of FET2 are shorted. G1 G1 VSS VGS S1 2 VSS VGS S1 Data Sheet G17881EJ2V0DS μPA2352 TEST CIRCUIT 6 VF(S-S) When FET1 is measured, FET2 is added VGS +4.5 V. TEST CIRCUIT 5 RSS(on) S2 VSS/IS G2 S2 4.5 V IF G2 IS VSS G1 VSS G1 V VGS V VGS =0V S1 S1 TEST CIRCUIT 7 Ciss Coss Crss S2 G2 S2 S2 VSS Capacitance Bridge G1 G2 G2 VSS VSS G1 G1 Capacitance Bridge Capacitance Bridge S1 S1 S1 TEST CIRCUIT 8 td(on), tr, td(off), tf S2 VGS G2 VGS V Wave Form RL 0 VGS 10% 90% VSS G1 PG. VGS 0 VSS RG Wave Form VDD τ S1 VSS 90% 90% 10% 10% 0 td(on) tr td(off) ton tf toff τ = 1 μs Duty Cycle ≤ 1% TEST CIRCUIT 9 QG S2 G2 A IG = 2 mA RL G1 PG. 50 Ω VDD S1 Data Sheet G17881EJ2V0DS 3 μPA2352 TYPICAL CHARACTERISTICS (TA = 25°C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 1.0 120 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 0 Mounted on BT resin board of 40.5 mm x 25 mm x 1.5 mm 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 150 0 175 75 100 FORWARD BIAS SAFE OPERATING AREA 100 IS - Source Current - A 50 IS(pulse) RSS(on) Limited (VGS = 4.5 V) PW = 10 μs 10 100 μs 1 ms IS(DC) 1 10 ms 0.1 Single Pulse Mounted on BT resin board of 40.5 mm × 25 mm × 1.5 mm PD (FET1) : PD (FET2) = 1 : 1 100 ms DC 0.01 0.1 1 10 100 VSS - Source to Source Voltage - V rth(ch-A) - Transient Thermal Resistance - °C/W <R> 1000 TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH Single Pulse PD (FET1) : PD (FET2) = 1 : 1 Mounted on BT resin board of 40.5 mm × 25 mm × 1.5 mm 100 Mounted on ceramic board of 50 cm2 × 1.0 mm 10 1 1m 10 m 100 m 1 10 PW - Pulse Width - s 4 125 150 TA - Ambient Temperature - °C TA - Ambient Temperature - °C <R> 25 Data Sheet G17881EJ2V0DS 100 1000 175 μPA2352 SOURCE CURRENT vs. SOURCE TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 10 30 IS - Source Current - A IS - Source Current - A 40 VGS = 4.5 V 4.0 V 3.1 V 2.5 V 20 10 TEST CIRCUIT 5 Pulsed TA = 125°C 75°C 25°C −25°C 0.1 0.01 TEST CIRCUIT 3 V SS = 10.0 V Pulsed 0.001 0.0001 0 0 1 2 3 4 0.5 | yfs | - Forward Transfer Admittance - S 0.4 0 50 100 150 10 TEST CIRCUIT 4 VSS = 10.0 V Pulsed TA = −25°C 25°C 75°C 125°C 1 0.1 0.01 0.1 100 VGS = 2.5 V 3.1 V 4.0 V 4.5 V 40 TEST CIRCUIT 5 Pulsed 0.1 1 IS - Source Current - A 10 10 100 SOURCE TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RSS(on) - Source to Source On-state Resistance - mΩ SOURCE TO SOURCE ON-STATE RESISTANCE vs. SOURCE CURRENT 20 1 IS - Source Current - A Tch - Channel Temperature - °C RSS(on) - Source to Source On-state Resistance - mΩ 2.5 FORWARD TRANSFER ADMITTANCE vs. SOURCE CURRENT TEST CIRCUIT 3 VSS = 10.0 V IS = 1.0 mA 0 0.01 2 GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 0.6 60 1.5 VGS - Gate to Source Voltage - V 0.8 80 1 VSS - Source to Source Voltage - V 1 -50 0 5 1.2 VGS(off) - Gate Cut-off Voltage - V 1 100 TEST CIRCUIT 5 IS = 2.0 A Pulsed 80 60 40 20 0 Data Sheet G17881EJ2V0DS 0 2 4 6 8 10 12 VGS - Gate to Source Voltage - V 5 μPA2352 CAPACITANCE vs. SOURCE TO SOURCE VOLTAGE <R> 1000 100 TEST CIRCUIT 5 IS = 2.0 A Pulsed VGS = 2.5 V 3.1 V 4.0 V 4.5 V 80 60 Ciss, Coss, Crss - Capacitance - pF RSS(on) - Source to Source On-state Resistance - mΩ SOURCE TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 40 20 Ciss 100 Coss TEST CIRCUIT 7 VGS = 0 V f = 1.0 MHz 10 0 -50 0 50 100 0.1 150 Tch - Channel Temperature - °C 100 4 TEST CIRCUIT 8 VDD = 20.0 V, VGS = 4.0 V RG = 6.0 Ω VSS - Source to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns 10 DYNAMIC INPUT CHARACTERISTICS 1000 tr tf 100 td(off) td(on) 3 VDD = 5.0 V 12.0 V 20.0 V 2 1 TEST CIRCUIT 9 IS = 4.0 A 0 10 0.1 1 10 100 0 SOURCE TO SOURCE DIODE FORWARD VOLTAGE 100 10 1 0.1 TEST CIRCUIT 6 Pulsed VGS = 0 V 0.01 0.001 0.0 0.5 1.0 1.5 1 2 3 4 QG - Gate Charge - nC IS - Source Current - A IF - Diode Forward Current - A 1 VSS - Source to Source Voltage - V SWITCHING CHARACTERISTICS 2.0 2.5 VF(S-S) - Source to Source Voltage - V 6 Crss Data Sheet G17881EJ2V0DS 5 6 μPA2352 <Notes for using this device safely> When you use this device, in order to prevent a customer’s hazard and damage, use it with understanding the following contents. If used exceeding recommended conditions, there is a possibility of causing the device and characteristic degradation. 1. This device is very thin device and should be handled with caution for mechanical stress. The rate of distortion applied to the device should become below 2000 µε. If the rate of distortion exceeds 2000 με, the characteristic of a device may be degraded and it may result in failure. 2. Please do not damage the device when you handle it. The use of metallic tweezers has the possibility of giving the wound. And mounting with the nozzle with clean point is recommended. 3. When you mount the device on a substrate, carry out within our recommended soldering conditions of infrared reflow. If mounted exceeding the conditions, the characteristic of a device may be degraded and it may result failure. 4. When you wash the device mounted the board, carry out within our recommended conditions. If washed exceeding the conditions, the characteristic of a device may be degraded and it may result in failure. 5. When you use ultrasonic wave to substrate after the device mounting, prevent from touching a resonance directly. If it touches, the characteristic of a device may be degraded and it may result in failure. 6. When you coat the device after mounted on the board, please consult our company. NEC Electronics recommends the epoxy resin of the semiconductor grade as a coating material. 7. Please refer to Figure 2 as an example of the Mounting Pad. Optimize the land pattern in consideration of density, appearance of solder fillets, common difference, etc in an actual design. 8. The marking side of this device is an internal electrode. Please neither contact with terminals of other parts nor take out the electrode. Data Sheet G17881EJ2V0DS 7 μPA2352 Figure 1 Recommended soldering conditions of INFRARED REFLOW Maximum temperature (Package's surface temperature) Time at maximum temperature Time of temperature higher than 220˚C Preheating time at 160 to 180˚C Maximum number of reflow processes Maximum chlorine content of rosin flux (Mass percentage) : 260˚C or below : 10 s or less : 60 s or less : 60 to 120 s : 3 times : 0.2% or less (Main heating) to 10 s Package's surface temperature (˚C) 260˚C MAX. 220˚C 180˚C to 60 s 160˚C 60 to 120 s (Preheating) Time(s) Infrared Reflow Temperature Profile Figure 2 The example of the Mounting Pad 4 - φ 0.30 0.65 0.65 Figure 3 <== REEL SIDE The unit orientation LEADER SIDE ==> TOP VIEW 8 Data Sheet G17881EJ2V0DS S2 S2 G2 G2 S1 S1 G1 G1 μPA2352 • The information in this document is current as of October, 2006. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. • NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. • Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. • While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. 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"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application. (Note) (1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries. (2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E 02. 11-1