Single-chip Type with Built-in FET Switching Regulator Series High-efficiency Step-up/down Switching Regulator with Built-in Power MOSFET BD8301MUV No.09027ECT07 ●General Description ROHM’s highly-efficient step-up/down switching regulator BD8301MUV produces step-up/down output including 3.3 V from 1 cell of lithium battery with just one coil. This IC adopts an original step-up/down drive system and creates a higher efficient power supply than conventional Sepic-system or H-bridge system switching regulators. ●Features 1) Highly-efficient step-up/down DC/DC converter to be constructed just with one inductor. 2) Input voltage 2.5 V - 5.5 V 3) Output current 1 A at 3.3 V 800 mA at 5.0 V 4) Incorporates soft-start function. 5) Incorporates timer latch system short protecting function. 6) High heat radiation surface mounted package VQFN020V4040 ●Application General portable equipment like portable audio or DSC/DVC ●Absolute Maximum Ratings Parameter Maximum applied power voltage Maximum input current Maximum input voltage Power dissipation Operating temperature range Storage temperature range Junction temperature *1 Symbol Ratings Unit Vcc,PVCC 7.0 V Iinmax 2.0 A Lx1 7.0 V Lx2 7.0 V Pd 700 mW Topr -25 to +85 ºC Tstg -55 to +150 ºC Tjmax 150 ºC When installed on a 70.0 mm × 70.0 mm × 1.6 mm glass epoxy board. The rating is reduced by 5.6 mW/°C at Ta = 25°C or more. ●Operating Conditions (Ta = 25°C) Parameter Symbol Voltage range Unit Power supply voltage Vcc 2.5 to 5.5 V Output voltage OUT 2.8 to 5.2 V www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 1/13 2009.09 - Rev.C Technical Note BD8301MUV ●Electrical Characteristics (Unless otherwise specified, Ta = 25 °C, VCC = 3.7 V) Parameter Symbol Target Value Unit Conditions Min Typ Max VUV - 2.25 2.45 V ΔVUVhy 50 100 150 mV fosc 0.8 1.0 1.2 MHz INV threshold voltage VINV 0.790 0.800 0.810 V Input bias current IINV -50 0 50 nA Soft-start time Tss 0.6 1.00 1.4 msec Output source current IEO 10 20 30 μA VINV=0.5V , VFB =1.5V Output sink current IEI 0.7 1.5 3.0 mA VINV=1.1V , VFB =1.5V LX1 Max Duty Dmax1 - - 100 % LX2 Max Duty Dmax2 77 85 93 % LX1 PMOS ON resistance RON1p - 120 200 mΩ VGS=3.0V LX1 NMOS ON resistance RON1n - 100 160 mΩ VGS=3.0V LX2 PMOS ON resistance RON2p - 120 200 mΩ VGS=3.0V LX2 NMOS ON resistance RON2n - 100 160 mΩ VGS=3.0V LX1 leak current I leak1 -1 0 1 μA LX2 leak current I leak2 -1 0 1 μA [Low voltage input malfunction preventing circuit] Detection threshold voltage Hysteresis range Vcc monitor [Oscillator] Oscillation frequency RT=47kΩ [Error AMP] Vcc=7.0V , VINV=3.5V RT=47kΩ [PWM comparator] [Output] [STB] STB pin ontrol voltage Operation VSTBH 1.5 - 5.5 V No-operation VSTBL -0.3 - 0.3 V RSTB 250 400 700 kΩ VCC pin ISTB1 - - 1 μA PVCC pin ISTB2 - - 1 μA VOUT pin STB pin pull-down resistance [Circuit current] Standby current ISTB3 - - 1 μA Circuit current at operation VCC Icc1 - 500 750 μA VINV=1.2V Circuit current at operation Icc2 - 10 20 μA VINV=1.2V PVCC www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 2/13 2009.09 - Rev.C Technical Note BD8301MUV ●Description of Pins Lx1 PVCC Pin No. PGND 15 14 13 12 11 Ground terminal 9 7～8 Lx2 8 9～12 PGND 13～14 Lx1 15～17 PVCC 18 VCC 5 19 STB VOUT 20 RT 6 20 4 Error AMP input terminal Output voltage terminal PGND Lx2 7 3 Error AMP output terminal INV GND VCC 18 STB 19 2 FB 2 VOUT 17 1 1 5～6 10 RT Function 3～4 16 PVCC Pin Name VOUT Output side coil connecting terminal Power transistor ground terminal Input side coil connecting terminal DC/DC converter input terminal Control part power supply input terminal ON/OFF terminal GND INV FB Oscillation frequency set terminal Fig.1 Pin layout ●Block Diagram PVCC STB RT VCC Reference STBY_IO UVLO VREF GND FB H q SCP OSC STOP PRE DRIVER 16000 ｃount TIMMING CONTROL PWM CONTROL FB LX1 PRE DRIVER TIMMING CONTROL ERROR_AMP + + - PRE DRIVER VREF INV PRE DRIVER PGND Soft Start VOUT LX2 Fig.2 Block diagram www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 3/13 2009.09 - Rev.C Technical Note BD8301MUV ●Description of Blocks 1.VREF This block generates ERROR AMP reference voltage. The reference voltage is 0.8 V. 2.UVLO Circuit for preventing low voltage malfunction Prevents malfunction of the internal circuit at activation of the power supply voltage or at low power supply voltage. Monitors VCC pin voltage to turn off all output FET and DC/DC converter output when VCC voltage is lower than 2.2 V, and reset the timer latch of the internal SCP circuit and soft-start circuit. 3.SCP Timer latch system short-circuit protection circuit When the INV pin is the set 0.8 V or lower voltage, the internal SCP circuit starts counting. The internal counter is in synch with OSC; the latch circuit activates after the counter counts about 16000 oscillations to turn off DC/DC converter output (about 16 msec when RT = 47kΩ). To reset the latch circuit, turn off the STB pin once. Then, turn it on again or turn on the power supply voltage again. 4.OSC Oscillation circuit to change frequency by external resistance of the RT pin (20 pin). When RT = 47 kΩ, operation frequency is set at 1 MHz. 5.ERROR AMP Error amplifier for detecting output signals and output PWM control signals The internal reference voltage is set at 0.8 V. 6.PWM COMP Voltage-pulse width converter for controlling output voltage corresponding to input voltage Comparing the internal SLOPE waveform with the ERROR AMP output voltage, PWM COMP controls the pulse width and outputs to the driver. Max Duty and Min Duty are set at the primary side and the secondary side of the inductor respectively, which are as follows: Primary side (Lx1) Max Duty : 100 %, Min Duty : 0% Secondary side (Lx2) Max Duty : 100 %, Min Duty : About 15 % 7.SOFT START Circuit for preventing in-rush current at startup by bringing the output voltage of the DC/DC converter into a soft-start Soft-start time is in synch with the internal OSC, and the output voltage of the DC/DC converter reaches the set voltage after about 1000 oscillations (About 1 msec when RT = 47 kΩ). 8.PRE DRIVER CMOS inverter circuit for driving the built-in Pch/Nch FET Dead time is provided for preventing feedthrough during switching. The dead time is set at about 15 nsec for each individual SWs. 9. STBY_IO Voltage applied on STB pin (19 pin) to control ON/OFF of IC Turned ON when a voltage of 1.5 V or higher is applied and turned OFF when the terminal is open or 0 V is applied. Incorporates approximately 400 kΩ pull-down resistance. 10. Pch/Nch FET SW Built-in SW for switching the coil current of the DC/DC converter. Pch FET is about 120 mΩ and Nch is 100 mΩ. Since the current rating of this FET is 2 A, it should be used within 2 A in total including the DC current and ripple current of the coil. www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 4/13 2009.09 - Rev.C Technical Note BD8301MUV ●Reference Data (Unless otherwise specified, Ta = 25°C, VCC = 3.7 V) 0.810 1.20 0.810 1.15 UVLO 0.800 VCC=3.7V VCC=5.5V VCC=7.0V VCC=2.4V 0.795 1.10 0.805 FREQUENCY [MHz] INV THRESHOLD [V] INV THRESHOLD [V] 0.805 1.05 1.00 0.800 0.95 0.90 0.795 0.85 0.790 0.80 0.790 -50 0 50 100 150 0.0 2.0 Fig.3 INV threshold -50 8.0 0 1.20 2.6 1.15 2.5 1.10 2.4 50 100 150 TEMPERATURE [℃] Fig.4. INV threshold (power supply property) Fig.5 Oscillation frequency 2.0 INV=1.1V 1.8 1.6 1.05 1.00 0.95 0.90 0.85 RESET FB SINK CURRENT [mA] UVLO THRESHOLD [V] 2.3 DETECT 2.2 2.1 2.0 1.9 0.80 3 4 5 6 -50 0 VCC [℃] 50 100 0.6 0.4 0 150 ON RESISTANCE [mΩ] -15 -20 -25 -30 -35 1.5 2.0 FB VOLTAGE [V] Fig.9 FB source current www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 4 Io=500mA 250 VCC=2.0V 200 VCC=3.0V VCC=3.7V VCC=6.0V 150 100 50 0 -40 3 300 250 -10 2 Fig.8 FB sink current Io=500mA 1.0 1 FB VOLTAGE [V] 300 INV=0.5V 0.5 0.8 Fig.7 UVLO threshold 0 0.0 1.0 TEMPARATURE [℃] Fig.6 Oscillation frequency (power supply property) -5 1.2 0.0 1.8 2 1.4 0.2 ON RESISTANCE [mΩ] FREQUENCY [MHz] 6.0 VCC [V] TEMPERATURE [℃] FB SOURCE CURRENT [uA] 4.0 200 VCC=6.0V VCC=3.0V VCC=2.0V 150 VCC=3.7V 100 50 0 -60 -10 40 90 140 TEMPERATURE [℃] Fig.10 Lx1 Pch FET ON resistance 5/13 -60 -10 40 90 140 TEMPERATURE [℃] Fig.11 Lx1 Nch FET ON resistance 2009.09 - Rev.C Technical Note BD8301MUV 300 300 1000 Io=500mA Io=500mA VCC=3.0V VCC=2.0V VCC=3.7V VCC=6.0V 150 100 50 800 200 VCC CURRENT [uA] ON RESISTANCE [mΩ] ON RESISTANCE [mΩ] 200 VCC=6.0V 150 VCC=3.0V VCC=2.0V VCC=3.7V 100 50 0 0 -60 -10 40 90 -60 140 -10 40 90 Fig.12 Lx2 Pch FET ON resistance 400 200 0 1 2 3 4 5 6 VCC VOLTAGE [V] Fig.14 VCC input current Fig.13 Lx2 Nch FET ON resistance 20 600 0 140 TEMPERATURE [℃] TEMPERATURE [℃] 20 INV=1.1V INV=1.1V 15 VOUT CURRENT [uA] 15 PVCC CURRENT [uA] INV=1.1V 250 250 10 5 0 10 5 0 0 1 2 3 4 5 6 7 PVCC VOLTAGE [V] Fig.15 PVCC input current www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 0 1 2 3 4 5 6 7 VOUT VOLTAGE [V] Fig.16 VOUT input current 6/13 2009.09 - Rev.C 7 Technical Note BD8301MUV ●Example of Application Input: 2.8 to 5.5 V, output: 3.3 V / 1.0 A, frequency 600 kHz 12 11 PGND 13 PGND PVCC 14 Lx1 16 PVCC 15 2.8～5.5V Lx1 10uF(ceramic) murata GRM31CB11A106KA01 10 PGND 4.7uH TOKO DE3518C RVIN PVCC 18 19 9 VCC Lx2 8 STB Lx2 7 CVCC 1uF GND GND 82k 1 2 3 4 VOUT VOUT RT INV 20 PGND FB ON/OFF 17 10uF(ceramic) murata GRM31CB11A106KA01 6 3.3V/1.0A 5 CC 150p CFB 1500p RINV1 75k RFB 7.5k RC 5.1k RINV2 24k Fig.17 Example of Application ●Example of Board Layout GND VBAT Lx1 L CVOUT RT CFB RFB RC CC ↑ 1pin RINV1 RVCC VCC CVCC CVIN Lx2 PGND VOUT RINV2 VOUT GND Fig.18 Example of Board Layout www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 7/13 2009.09 - Rev.C Technical Note BD8301MUV ●Reference Application Data 100 3.33 90 VBAT=3.7V OUTPUT VOLTAGE [V] 70 60 VBAT=3.7V 50 40 30 VBAT=4.2V 20 3.32 OUTPUT VOLTAGE [V] 3.32 80 EFFICIENCY [%] 3.33 Io=600mA VBAT=2.8V 3.31 3.30 3.29 3.28 3.31 3.30 3.29 3.28 10 0 3.27 1 10 100 1000 3.27 2.0 3.0 OUTPUT CURRENT [mA] 4.0 5.0 6.0 1 10 INPUT VOLTAGE [V] Fig.20 Line regulation Fig.19 Power conversion efficiency 100 1000 OUTPUT CURRENT [mA] Fig.21 Load regulation ●Selection of Parts for Applications (1) Output inductor A shielded inductor that satisfies the current rating (current value, Ipeak as shown in the drawing below) and has a low DCR (direct current resistance component) is recommended. Inductor values affect output ripple current greatly. Ripple current can be reduced as the coil L value becomes larger and the switching frequency becomes higher as the equations shown below. Δ IL Ipeak =Iout ×(Vout/VIN) /η+ ∆IL/2 [A] (Vin-Vout) ⊿IL= L Vout × Vin |(Vin-Vout)| ⊿IL= ⊿IL= × L (Vout-Vin) L × 1 × f Vout×2×0.85 (Vin+Vout) Vin × Vout 1 (1) Fig. 22 Ripple current [A] (in step-down mode) 1 × f (2) [A] (in step-up/down mode) [A] (in step-up mode) (3) (4) f (η: Efficiency, ∆IL: Output ripple current, f: Switching frequency) As a guide, output ripple current should be set at about 20 to 50% of the maximum output current. * Current over the coil rating flowing in the coil brings the coil into magnetic saturation, which may lead to lower efficiency or output oscillation. Select an inductor with an adequate margin so that the peak current does not exceed the rated current of the coil. www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 8/13 2009.09 - Rev.C Technical Note BD8301MUV (2) Output capacitor A ceramic capacitor with low ESR is recommended for output in order to reduce output ripple. There must be an adequate margin between the maximum rating and output voltage of the capacitor, taking the DC bias property into consideration. Output ripple voltage when ceramic capacitor is used is obtained by the following equation. Vpp=⊿IL× 1 2π×f×Co + ⊿IL×RESR [V] ・・・ (5) Setting must be performed so that output ripple is within the allowable ripple voltage. (3) Setting of oscillation frequency Oscillation frequency can be set using a resistance value connected to the RT pin (1 pin). Oscillation frequency is set at 1 MHz when RT = 47 kΩ, and frequency is inversely proportional to RT value. See Fig. 23 for the relationship between RT and frequency. Soft-start time changes along with oscillation frequency. See Fig. 24 for the relationship between RT and soft-start time. 10 SOFT START TIME [msec] SWITCHNG FREQUENCY [kHz] 10000 1000 1 0.1 100 1 10 100 1 1000 10 100 1000 RT PIN RESISTANCE [kΩ] RT PIN RESISTANCE [kΩ] Fig. 24 Soft-start time – RT pin resistance Fig. 23 Oscillation frequency – RT pin resistance * Note that the above example of frequency setting is just a design target value, and may differ from the actual equipment. (4) Output voltage setting The internal reference voltage of the ERROR AMP is 0.8 V. (8) of Fig. 25. Output voltage should be obtained by referring to Equation VOUT ERROR AMP R1 INV Vo= R2 (R1+R2) R2 ×0.8 [V] ・・・ (8) VREF 0.8V Fig. 25 Setting of feedback resistance www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 9/13 2009.09 - Rev.C Technical Note BD8301MUV (5) Determination of phase compensation Condition for stable application The condition for feedback system stability under negative feedback is as follows: - Phase delay is 135 °or less when gain is 1 (0 dB) (Phase margin is 45° or higher) Since DC/DC converter application is sampled according to the switching frequency, the GBW of the whole system (frequency at which gain is 0 dB) must be set to be equal to or lower than 1/5 of the switching frequency. In summary, target property of applications is as follows: - Phase delay must be 135°or lower when gain is 1 (0 dB) (Phase margin is 45° or higher). - The GBW at that time (frequency when gain is 0 dB) must be equal to or lower than 1/5 of the switching frequency. For this reason, switching frequency must be increased to improve responsiveness. One of the points to secure stability by phase compensation is to cancel secondary phase delay (-180°) generated by LC resonance by the secondary phase lead (i.e. put two phase leads). Since GBW is determined by the phase compensation capacitor attached to the error amplifier, when it is necessary to reduce GBW, the capacitor should be made larger. -20dB/decade (A) A GAIN C [dB] (B) 0 R FB 0° PHASE [degree] -90° Phase margin -180° Fig.26 General integrator Error AMP is a low-pass filter because phase compensation such as (1) and (2) is performed. For DC/DC converter application, R is a parallel feedback resistance. 1 Point (A) fp= Point (B) fGBW= [Hz] 2πRCA 1 (9) [Hz] 2πRC (10) Fig.27 Frequency property of integrator Phase compensation when output capacitor with low ESR such as ceramic capacitor is used is as follows: When output capacitor with low ESR (several tens of mΩ) is used for output, secondary phase lead (two phase leads) must be put to cancel secondary phase lead caused by LC. One of the examples of phase compensation methods is as follows: VOUT 1 R1 C1 R4 Phase lead fz1 = C2 R3 FB R2 Phase lead fz2 = 2πR1C1 1 2πR4C2 [Hz] (11) [Hz] (12) 1 Phase delay fp1 = 2πR3C1 [Hz] (13) 1 LC resonance frequency = Fig.28 Example of setting of phase compensation 2π√(LC) [Hz] (14) For setting of phase-lead frequency, both of them should be put near LC resonance frequency. When GBW frequency becomes too high due to the secondary phase lead, it may get stabilized by setting the primary phase delay to a frequency slightly higher than the LC resonance frequency by R3 to compensate it. www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 10/13 2009.09 - Rev.C Technical Note BD8301MUV ●I/O Equivalence Circuit INV FB VCC VCC VCC VCC INV FB PVCC,Lx1,PGND VOUT,Lx2,PGND PVCC VOUT Lx1 Lx2 VCC VCC PGND PGND STB RT VCC VCC STB VCC RT Fig.29 I/O Equivalence Circuit www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 11/13 2009.09 - Rev.C Technical Note BD8301MUV ●Precautions for Use 1) Absolute Maximum Rating We dedicate much attention to the quality control of these products, however the possibility of deterioration or destruction exists if the impressed voltage, operating temperature range, etc., exceed the absolute maximum ratings. In addition, it is impossible to predict all destructive situations such as short-circuit modes, open circuit modes, etc. If a special mode exceeding the absolute maximum rating is expected, please review matters and provide physical safety means such as fuses, etc. 2) GND Potential Keep the potential of the GND pin below the minimum potential at all times. 3) Thermal Design Work out the thermal design with sufficient margin taking power dissipation (Pd) in the actual operation condition into account. 4) Short Circuit between Pins and Incorrect Mounting Attention to IC direction or displacement is required when installing the IC on a PCB. If the IC is installed in the wrong way, it may break. Also, the threat of destruction from short-circuits exists if foreign matter invades between outputs or the output and GND of the power supply. 5) Operation under Strong Electromagnetic Field Be careful of possible malfunctions under strong electromagnetic fields. 6) Common Impedance When providing a power supply and GND wirings, show sufficient consideration for lowering common impedance and reducing ripple (i.e., using thick short wiring, cutting ripple down by LC, etc.) as much as you can. 7) Thermal Protection Circuit (TSD Circuit) This IC contains a thermal protection circuit (TSD circuit). The TSD circuit serves to shut off the IC from thermal runaway and does not aim to protect or assure operation of the IC itself. Therefore, do not use the TSD circuit for continuous use or operation after the circuit has tripped. 8) Rush Current at the Time of Power Activation Be careful of the power supply coupling capacity and the width of the power supply and GND pattern wiring and routing since rush current flows instantaneously at the time of power activation in the case of CMOS IC or ICs with multiple power supplies. 9) IC Terminal Input This is a monolithic IC and has P+ isolation and a P substrate for element isolation between each element. P-N junctions are formed and various parasitic elements are configured using these P layers and N layers of the individual elements. For example, if a resistor and transistor are connected to a terminal as shown on Fig.30: ○The P-N junction operates as a parasitic diode when GND > (Terminal A) in the case of a resistor or when GND > (Pin B) in the case of a transistor (NPN) ○Also, a parasitic NPN transistor operates using the N layer of another element adjacent to the previous diode in the case of a transistor (NPN) when GND > (Pin B). The parasitic element consequently rises under the potential relationship because of the IC’s structure. The parasitic element pulls interference that could cause malfunctions or destruction out of the circuit. Therefore, use caution to avoid the operation of parasitic elements caused by applying voltage to an input terminal lower than the GND (P board), etc. Transistor (NPN) B E C ～ ～ Resistor N P+ N P N P Substrate P+ P+ N P N N Parasitic Element GND (Pin A) P+ ～ ～ (Pin B) (Pin A) N Parasitic Element P Substrate Parasitic Element GND GND Fig.30 Example of simple structure of Bipolar IC www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 12/13 2009.09 - Rev.C Technical Note BD8301MUV ●Ordering part number B D 8 Part No. 3 0 1 M Part No. U V - Package MUV: VQFN020V4040 E 2 Packaging and forming specification E2: Embossed tape and reel VQFN020V4040 <Tape and Reel information> 4.0±0.1 4.0±0.1 2.1±0.1 0.5 0.4±0.1 1 6 16 1.0 Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 5 20 10 15 2500pcs (0.22) S C0.2 Embossed carrier tape Quantity 11 2.1±0.1 0.08 S +0.03 0.02 -0.02 1.0MAX 1PIN MARK Tape +0.05 0.25 -0.04 1pin (Unit : mm) www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ Reel 13/13 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2009.09 - Rev.C Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. R0039A