BU9882xx-W Series : EEPROMs

Datasheet
Standard EEPROMs
Plug & Play EEPROMs
(for Display)
BU9882xx-W Series (1K×2BANK)
●General Description
BU9882F-W,BU9882FV-W are dual port EEPROMs compatible with the DDC2TM. 2 independent ports allow 2 EDID
channels to be read simultaneously.
●Packages W(Typ.) x D(Typ.) x H(Max.)
●Features
 Designed for use with DDC2TM
 2-port simultaneous read function
 Operating voltage range: 2.5V-5.5V
 Page write function: 8bytes
 Low power consumption

Active (at 5V)
: 1.5mA (typ)

Stand-by (at 5V) : 0.1µA (typ)
 Data security
 Write protection with WP
 Write protection at low power supply voltage
 Initial data=FFh
 Data retention: 10years
 Rewriting possible up to 100,000 times
●BU9882xx-W series
Capacity
Type
2Kbit
BU9882
Power source Voltage
2.5V to 5.5V
●Absolute Maximum Ratings
Parameter
Symbol
Supply Voltage
VCC
Power Dissipation
Pd
SOP14
SSOP-B14
8.70mm x 6.20mm x 1.71mm
5.00mm x 6.40mm x 1.35mm
SOP14
●
SSOP-B14
●
Ratings
Unit
-0.3 to +6.5
V
0.45 (SOP14)
W
0.35 (SSOP-B14)
Storage Temperature
Tstg
-65 to +125
℃
Operating Temperature
Topr
-40 to +85
℃
Terminal Voltage
‐
-0.3 to Vcc+1.0
*1
Remarks
Reduce by 4.5 mW/C over 25C.
Reduce by 3.5 mW/C over 25C
V
*1 6.8V (Max.)
●Memory cell characteristics
Parameter
Write/Erase Cycle
Data Retention
Min.
100,000
10
Limits
Typ.
-
-
○Product structure:Silicon monolithic integrated circuit
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
Max
-
-
Unit
Times
Years
○This product is not designed protection against radioactive rays
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BU9882xx-W Series
(1K×2BANK)
●Recommended Operating Ratings
Parameter
Symbol
Supply Voltage
VCC
Input voltage
VIN
Ratings
2.5 to 5.5
0 to Vcc+1.0
Unit
V
●Electrical characteristics
- DC (Unless otherwise specified, Ta=-40℃ to +85℃、VCC=2.5V to 5.5V)
Limits
Parameter
Symbol
Unit
Condition
Min.
Typ.
Max.
“H” Input Voltage 1
VIH1
2.0
V
VCC≧4.0V
“L” Input Voltage 1
VIL1
0.8
V
“L” Input Voltage 2
VIL2
0.2VCC
V
VCC<4.0V
SDA_PC0/1, IOL=3.0mA *1
“L” output Voltage
VOL1
0.4
V
SCL_PC0/1,DDCENA, BANKSEL,
Input Leakage Current 1
ILI1
-1
1
µA
VIN=0V to VCC+1.0
Input Leakage Current 2
ILI2
-1
-
50
µA
Output Leakage Current
ILO
-1
-
1
µA
Operating Current
ICC
-
1.5
3.0
mA
Standby Current
ISB
-
0.1
5
µA
WP
SDA_PC0/1,SCL/SDA_MON(DDCENA=GND),
VOUT=0V to VCC+1.0
fSCL=400kHz, VCC=5.5V
tWR=10ms
SCL/SDA_PC0/1=VCC
SCL/SDA_MON=H-Z
DDCENA=WP=BANKSEL=GND
DUALPCB=VCC
*1 IOL at monitor mode (DDCENA=HIGH) is the sum of current flowing from the pull up resistor at the SDA_MON side to the pull up resistance
at SDA_PC0/PC1
- AC (Unless otherwise specified, Ta=-40℃ to +85℃,VCC=2.5V to 5.5V)
Fast-mode
VCC=2.5V to 5.5V
Parameter
Symbol
Min.
Typ.
Max.
Clock Frequency
fSCL
400
Data Clock High Period
tHIGH
0.6
Data Clock Low Period
tLOW
1.3
SDA and SCL Rise Time
tR
0.3
SDA and SCL Fall Time
Standard-mode
VCC=2.5V to 5.5V
Min.
Typ.
Max.
100
4.0
4.7
1.0
Unit
Typ.
kHz
µs
µs
µs
tF
-
-
0.3
-
-
0.3
µs
Start Condition Hold Time
Start Condition Setup Time
tHD:STA
tSU:STA
0.6
0.6
-
-
4.0
4.7
-
-
µs
µs
Input Data Hold Time
tHD:DAT
0
-
-
0
-
-
ns
Input Data Setup Time
Output Data Delay Time(SCL)
Stop Condition Setup Time
Bus Free Time
Write Cycle Time
Noise Spike Width (SDA and SCL)
tSU:DAT
tPD
tSU:STO
tBUF
tWR
tI
100
0.6
1.3
-
-
0.9
10
0.1
250
4.0
4.7
-
-
3.5
10
0.1
ns
µs
µs
µs
ms
µs
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BU9882xx-W Series
(1K×2BANK)
●Block Diagram
WP
N.C.
N.C.
●Pin Configuration
(TOP VIEW)
VCC
WP
DUALPCB BANKSEL
DDCENA SCL_MON SDA_MON
BU9882F - W
BU9882FV -W
SCL_PC0 SDA_PC0
N.C.
SCL_PC1 SDA_PC1
N.C.
GND
●Pin Descriptions
Pin Name
I/O
Functions
VCC
-
Power Supply
GND
-
Ground (0V)
N.C.
-
No Connection
SCL_PC0
IN
SDA_PC0
IN/OUT
SCL_PC1
IN
SDA_PC1
IN/OUT
SCL_MON
OUT
SDA_MON
OUT
DDCENA
IN
Control of SCL_MON, SDA_MON
BANKSEL
IN
Select a SCL/SDA_MON Connected Port at DUAL PORT mode
Selected a BANK at SINGLE PORT mode
DUALPCB
IN
Control of DUAL PORT/SINGLE PORT mode
WP
IN
Write Protect Control
Serial Clock Input, Access to BANK0 at DUAL PORT mode
Access to BANK0 or to BANK1 at SINGLE PORT mode
Slave and Word Address Serial Data Input, Serial Data Output
Access to BANK0 at DUAL PORT mode, Access to BANK0 or to BANK1 at SINGLE PORT mode
Serial Clock Input
Access to BANK1 at DUAL PORT mode, Don't Care at SINGLE PORT mode
Slave and Word Address Serial Data Input, Serial Data Output
Access to BANK1 at DUAL PORT mode, Don't Care at SINGLE PORT mode
Serial Clock Output
Connected to SCL_PC0/1 at DDCENA="High", "Hi-Z" output at DDCENA="Low"
Slave and Word Address Serial Data Output
Connected to SCL_PC0/1 DDCENA="High", "Hi-Z" output at DDCENA="Low"
An open drain output requires a pull-up resistor.
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BU9882xx-W Series
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●Synchronous data timing
tR
tF
tHIGH
SCL
SCL
tHD:STA
tSU:DAT
tLOW
tHD:DAT
tSU:STA
SDA
(IN)
tHD:STA
tSU:STO
SDA
tBUF
tPD
SDA
(OUT)
START BIT
STOP BIT
Figure 1. Synchronous Data Timing
・SDA data is latched into the chip at the rising edge of the SCL clock.
・The output date toggles at the falling edge of the SCL clock.
●Write cycle timing
SCL
SDA
D0
ACK
tWR
WRITE DATA (n)
STOP CONDITION
START CONDITION
Figure 2. Write Cycle Timing
●Operation notes
○DDCENA Operation
When DDCENA is set to High, SCL_PC0/1 and SDA_PC0/1 will be connected to SCL_MON and SDA_MON, respectively.
Therefore, monitoring of the communications between the PC and EEPROM, and the communications of the MONITOR
and PC, is possible.
Selection of PC0/PC1 is determined according to the state of the DUALPCB and BANKSEL inputs.
When DDCENA is Low, the SCL/SDA_MON output is set to "Hi-Z".
SCL_MON,SDA_MON
DUALPCB
BANKSEL
(CONNECTION PORT)
Low
PC0 PORT
Low (DUAL PORT)
High
PC1 PORT
Low
High (SINGLE PORT)
PC0 PORT
High
○BANKSEL
BANKSEL serves as an input for connection port of SCL/SDA_MON during DUAL PORT mode.
It turns into the BANK selection terminal of internal memory in SINGLE PORT mode.
Only the PC0 port can access the memory in SINGLE PORT mode.
DUALPCB
Low (DUAL PORT)
High (SINGL PORT)
BANKSEL
Low
High
Low
High
CONNECTION BANK
PC0 PORT:BANK0
PC1 PORT:BANK1
BANK0
BANK1
○WP
When WP=Low, all data at all addresses are write-protected. The terminal has a built-in pull down resister. Make sure
that WP=High when writing data.
Utilize this function in order to prevent incorrect write command input from the PC, as well as incorrect input during
communication between the PC and monitor.
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BU9882xx-W Series
(1K×2BANK)
○Data Read
The data read function allows simultaneous read from SCL_PC0/1, SDA_PC0/1 in DUAL PORT mode.
○Data Write
Write operation is performed using either PC0/1 (SCL or SDA) even when accessed simultaneously in DUAL PORT mode.
Port selection is made by detecting the data D0 of the first byte of the WRITE command input.
After this, the other port is made unavailable for both READ and WRITE commands until the write operation is completed.
S
T
A
R
T
SDA_PC
W
R
I
T
E
SLAVE
ADDRESS
1 0 1 0 0 0
*:Don’t care
WORD
ADDRESS
0
*
DATA
WA
0
WA
6
R A
/ C
W K
S
T
O
P
D7
A
C
K
D0
A
C
K
D0 detected first write operation
performed through the port
During other port is write command.
this ack is no output.
Figure 3. Write Cycle Timing
○START Condition
All commands are preceeded by the START condition, which is a High to Low transition of SDA when SCL is High. This
IC continuously monitors the SDA and SCL lines for the START condition and will not respond to any commands until this
condition has been met.
○STOP Condition
All commands must be terminated by a STOP condition, which is a Low to High transition of SDA when SCL is HIGH.
(See Figure 1.)
○WRITE Command
Unless a STOP condition is executed, the data will not be written into the memory array.
○DEVICE ADDRESSING
Following a START condition, the Master outputs the device address of the slave to be accessed.
The most significant four bits of the Slave address are the "device type indentifier".
For the IC this is fixed as "1010".
The next three bits are "000".
The last bit of the stream determines the operation to be performed.
When set to "1", Read operation is selected ; when set to "0", Write operation is selected.
R/W set to "0" ・ ・ ・ ・ ・ ・ ・ ・ WRITE
R/W set to "1" ・ ・ ・ ・ ・ ・ ・ ・ READ
1010
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0
―
0
R/W
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BU9882xx-W Series
(1K×2BANK)
●Commands
○Byte Write
When the Master generates a STOP condition, the IC begins an internal write cycle to the nonvolatile array.
S
T
A
R
T
W
R
I
T
E
SLAVE
ADDRESS
SDA
LINE
1 0 1 0 0 0
0
WORD
ADDRESS
*
WA
0
WA
6
R A
/ C
W K
S
T
O
P
DATA
D7
D0
A
C
K
A
C
K
*:Don’t care
Figure 4. Byte Write Cycle Timing
○Page Write
After the receipt of each word, the three low order address bits are internally increased by one. The four higher order bits
of the address(WA6 to WA3) remain constant. This IC is capable of eight byte page write operation.
If the master transnmits more than eight words, prior to generating the STOP condition, the address counter will "roll
over", and the previous transmitted data will be overwritten.
S
T
A
R
T
SDA
LINE
SLAVE
ADDRESS
W
R
I
T
E
WA
* 6
1 0 1 0 0 0 0
0
0
WORD
ADDRESS
(n)
R
/
W
DATA(n)
WA
0
1
A
C
K0
D7
DATA(n+7)
D0
A
C
K
S
T
O
P
D0
A
C
K
A
C
K
*:Don’t care
Figure 5. Page Write Cycle Timing
○Current Read
In case the previous operation is random or current read (which includes sequential read), the internal address counter is
increased by one from the last acceseed address (n). Thus current read outputs the data of the next word address (n+1).
If the last command is byte or page write, the internal address stays at the last address(n). Thus current read outputs the
data of the word address (n).
If the master does not transfer the Acknowledge, but does generate a stop condition, the current address read operation
only provides a single byte of data.
At this point, the BU9882/F/FV-W discontinues transmission.
S
T
A
R
T
SDA
LINE
SLAVE
ADRESS
R
E
A
D
1 0 1 0 0 0 0
S
T
O
P
DATA
D7
D0
R A
/ C
W K
A
C
K
Figure 6. Current Read Cycle Timing
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BU9882xx-W Series
(1K×2BANK)
○Random Read
Random read operation allows the master to access any location. If the master does not transfer the Acknowledge but
does generate a stop condition, the current address read operation only provides a single byte of data. (At 1Kbit all
address read possible).This communication must be terminated by a stop condition, which is a Low to High transition of
SDA when SCL is High
S
T
A
R
T
SDA
LINE
W
R
I
T
E
SLAVE
ADDRESS
WORD
ADDRESS
(n)
1 0 1 0 0 0 0
WA
* 6
0
0
0
R A
/ C
W K
S
T
A
R
T
WA
0
R
E
A
D
SLAVE
ADDRESS
DATA(n)
1 0 1 0 0 0 0
0
A
C
K
0
S
T
O
P
D7
D0
A
C
K
R A
/ C
W K
*:Don’t care
carecareDA
Figure 7. Random Read Cycle Timing
○Sequential Read
During the Current read operation, if an Acknowledge is detected, and no STOP condition is generated by the
master(µ-COM), the device will continue to transmit the data. (It can transmit all data(1Kbit 128word)). If an Acknowledge
is not detected, the devive will terminate further data transmissions and await a STOP condition before returning to the
standby mode. The Sequential Read operation can be performed with both
Current Read and Random Read.
S
T
A
R
T
SDA
LINE
SLAVE
ADDRESS
R
E
A
D
1 0 1 0 0 0 0
0
0
DATA(n)
D7
R A
/ C
W K
S
T
O
P
DATA(n+x)
D0
D7
A
C
K
D0
A
C
K
A
C
K
Figure 8. Sequential Read Cycle Timing
●Peripheral Circuits
○DUAL PORT
DUAL PORTs are used to connect two PCs to one monitor. PC0 is connected to BANK0 and PC1 to BANK1. Each bank
operates as 1Kbit EEPROM.
○ To Use DUAL PORT
Start the operation of the DUAL PORT by following the instructions below:
1. Set the DUAL PCB to LOW with neither of the ports being operated by commands.
2. Input the command from PC0 or PC1.
○ Simultaneous Access
<READ OPERATION>
EEPROM data read allows simultaneous access from PC0, PC1 ports.
<WRITE OPERATION>
Write operation is performed for either of PC0/1 even when accessed simultaneously from both.
Port selection is made by detecting the data D0 of the first byte of the WRITE command input.
Write operation is performed only for the port where D0 of the first byte of the write data is detected first.
PC 0
MONITOR
VCC
SCL
SDA
VCC
SCL_PC0
SDA_PC0
BANK0
(1kbit)
DUALPCB
NC
BANKSEL
SCL_PC1
SDA_PC1
PC 1
WP
BANK1
(1kbit)
CPU
DDCENA
NC
SCL_MON
GND
SDA_MON
SCL
SDA
Figure 9. Example of Peripheral Circuit with Dual Port
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BU9882xx-W Series
S
T
A
R
T
SDA-PC0
BUS
SLAVE
ADDRESS
1
1
(1K×2BANK)
R A
/ C
W K
Output Data from BANK0
D7
D0
Write operation performed
Through the port.
S
T
A
R
T
S
A T
O
C
K P
SDA-PC0
BUS
SLAVE
ADDRESS
1
R
/
W
S
T
O
P
BANK0 WORD
ADDRESS(W)
*WA66
*WA
1
WA0
WA
0
D7
D0
S
T
O
P
Output Data from BANK1
SDA-PC1
BUS
SDA-PC1
BUS
BANK1 WORD
ADDRESS(W)
Output Data from BANK1
1
1
D7
D0
1
1
D7
D0
Fig.26 SIMULTANEOUS ACCESS
OF READ OPERATION
SDA-PC1
BUS
1
*WA6
1
WA0
D7
D0
No ACK
Fig.27 Simultaneous Access
*:Don’t care
Figure
11. Simultaneous
carecareDA
Of Write
Operation Access
TA(n)
of White Operation
Figure 10. Simultaneous Access
of Read Operation
○MONITOR OUTPUT
BU9882F-W, BU9882FV-W has a monitor output terminal. This allows communication between the PC and monitor CPU.
The monitor output for the use of DUAL PORT can be switched with BANKSEL input, as shown in the table below.
BANKSEL input
Low
High
SCL_MON,SDA_MON connection port
PC0 PORT
PC1 PORT
○SINGLE PORT
SINGLE PORT is for connecting one PC to one monitor. In this case, it is accessible only from PC0. BANK selection is
made with BANKSEL.
Switching this BANKSEL allows access to the total of 2kbit EEPROM, with BANK0 and BANK1, from PC0.
○ To use SINGLE PORT
Start the SINGLE PORT operation by following the instructions below:
1. Set the DUAL PCB to High with neither of the ports being operated by commands.
2. Select the BANK with BANKSEL.
3. Input the command from PC0.
PC 0
MONITOR
VCC
SCL
SDA
VCC
SCL_PC0
BANK0
(1kbit)
SDA_PC0
NC
WP
DUALPCB
BANKSEL
SCL_PC1
BANK1
(1kbit)
SDA_PC1
DDCENA
CPU
SCL_MON
NC
SDA_MON
GND
Figure 12. Example of Peripheral Circuit with Single Port
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BU9882xx-W Series
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●Software Reset
Execute software reset in case the device is at an unexpected state after power up and/or the command input needs to be
reset. The following figures (Figure 13-(a), Figure 13-(b), Figure 13-(c))
During dummy clock, please release SDA BUS (tied to Vcc by pull up resistor).
During that time, the device may pull the SDA line Low for acknowledge or outputting read data. If the master controls the
SDA line High, it will conflict with the device output Low then it makes a current overload. It may cause instantaneous power
down and may damage the device.
Dummy Clock×14
SCL
2
1
Start×2
13
COMMAND
14
SDA
COMMAND
Figure 13-(a) Dummy Clock×14+Start+Start
SCL
Start
Dummy Clock×9
Start
1
2
9
8
COMMAND
SDA
COMMAND
Figure 13-(b) Start+Dummy Clock×9+Start
Start×9
SCL
1
2
3
7
8
9
COMMAND
SDA
COMMAND
Figure 13-(c) Start×9
●Acknowledge Polling
Since the device ignores all input commands during the internal write cycle, no ACK will be returned. When the master sends
the next command following the write command, and the device returns the ACK, it means that the program is completed. If no
ACK is returned, it means that the device is still busy. By using Acknowledge polling, the waiting time is minimized to less than
tWR=5ms. To prevent operating Write or Current Read immediately after Write, first send the slave address (R/W is "High" or
"Low"). After the device returns the ACK, continue word address input or data output, respectively.
During the internal write cycle,
no ACK will be returned.
(ACK=High)
THE FIRST WRITE COMMAND
S
T WRITE COMMAND
A
R
T
S
T
O
P
S
T SLAVE
A
R ADDRESS
T
S
A
SLAVE
T
C
A
K
R ADDRESS H
T
A
C
K
H
…
tWR
THE SECOND WRITE COMMAND
…
S
T
SLAVE
A
R ADDRESS
T
A
C
K
H
S
T SLAVE
A
R ADDRESS
T
tWR
A
C
K
L
WORD
ADDRESS
A
C
K
L
DATA
A
C
K
L
S
T
O
P
After the internal write cycle
is completed ACK will be returned
(ACK=Low). Then input next
Word Address and data.
Figure 14. Successive Write Operation By Acknowledge Polling
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BU9882xx-W Series
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●Command Cancellation By Start And Stop Condition
During a command input, command is canceled by the successive inputs of start condition and stop condition (Figure 15.).
However, during ACK or data output, the device may output the SDA line Low. In such cases, operation of start and stop
condition is impossible, making the reset inoperable. Execute the software reset in the cases. (Figure 13.)
Operating the command cancels by starts and stop condition during the command of Random Read or Sequential Read or
Current Read, internal address counter is not confirmed. Therefore operation of Current Read after this is not valid. Operate
a Random Read in this case.
SCL
SDA
1
0
1
0
Start
Condition
Stop
Condition
Figure 15. Command Cancellation
●I/O Circuit
○SDA Pin Pull-up Resister
The pull up resister is needed because SDA is NMOS open drain. Choose the correct value of this resister(RPU), by
considering VIL, IL characteristics of a controller which control the device and VOH, IOL characteristics of the device. If
large RPU is chosen, clock frequency needs to be slow. In case of small RPU, the operating current increases.
○Maximum Rpu
Maximum value of RPU is determined by following factors:
①SDA rise time determined by RPU and the capacitance of bus line(CBUS) must be less than tR.
1)
Other timing must keep the conditions of AC spec.
A of SDA bus determined by a total input leak(IL) of the all devices connected to
②When SDA bus is High, the voltage ○
the bus. RPU must be significantly higher than the High level input of a controller and the device, including a noise
margin 0.2VCC.
VCC-ILRPU-0.2 VCC ≧ VIH
MICRO
COMPUTER
0.8Vcc-VIH
≦
RPU
∴
RPU
IL
SDA PIN
A
Examples: When VCC=3V IL=10µA VIH=0.7VCC
According to ②
0.8x3-0.7x3
≦
RPU
10x10-6
≦
300 [kΩ]
IL
IL
THE CAPACITANCE OF
BUS LINE (CBUS)
Figure 16. I/O Circuits
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○Minimum RPU
The minimum value of RPU is determined by following factors:
①Meets the condition that VOLMAX=0.4V, IOLMAX=3mA when the output is Low.
VCC -VOL
≦ IOL
RPU
VCC -VOL
IOL
② VOLMAX=0.4V must be lower than the input Low level of the microcontroller and the EEPROM
including the recommended noise margin of 0.1VCC.
VOLMAX ≦ VIL-0.1 VCC
Examples: VCC=3V, VOL=0.4V, IOL=3mA, the VIL of the controller and
According to ①
RPU
∴
RPU ≧
≧
3-0.4
3×10 -3
≧ 867 [Ω ]
the EEPROM is VIL=0.3VCC,
and
VOL=0.4[V]
VIL=0.3×3
=0.9[V]
so that condition② is met
○SCL Pin Pull-up Resister
When SCL is controlled by the CMOS output the pull-up resistor at SCL is not required.
However, should SCL be set to Hi-Z, connection of a pull-up resistor between SCL and VCC is recommended.
Several kΩ are recommended for the pull-up resistor in order to drive the output port of the microcontroller.
●Notes For Power Supply
VCC rises through the low voltage region in which the internal circuit of the IC and the controller are unstable. Therefore, the
device may not work properly due to an incomplete reset of the internal circuit. To prevent this, the device has a P.O.R. and
LVCC feature. At power up, maintain the following conditions to ensure functions of P.O.R and LV CC.
1. "SDA='H'" and "SCL='L' or 'H'".
2. Follow the recommended conditions of tR, tOFF, Vbot for the P.O.R. function during power up.
tR
VCC
Recommended conditions of tR, tOFF, Vbot
tOFF
tR
Below 10ms
Below 100ms
Vbot
tOFF
Above 10ms
Above 10ms
Vbot
Below 0.3V
Below 0.2V
0
Fig.33
Figure
17. Vcc rising wave from
3. Prevent SDA and SCL from being "Hi-Z".
In case conditions 1 and/or 2 cannot be met, take following actions:
A)If unable to keep condition 1 ( SDA is "Low" during power up):
→Control SDA, SCL to be "High" as shown in figure below.
VCC
t L O W
S C L
S D A
A f t e r
V c c
b e c o m s
s t a b l e
A f t e r
V c c
t D Ht S U : D A T
b e c o m s
s t a b l e
t S U : D A T
F i18.
g . S3 C
4 L"H"
= a n d
SDA="L"
Figure
i g . S3 C
5 L"L"
=a n d
S D A"L"
=
FigureF 19.
B)If unable to keep condition 2.
→After power becomes stable、 execute software reset. (See Figure 13.)
C) If unable to keep both conditions 1 and 2.
→Follow the instruction A first、 then the instruction B.
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●LVCC Circuit
LVCC circuit inhibits write operation at low voltage, and prevents an inadvertent write. Write operation is inhibited below the
LVCC voltage (Typ.=1.2V).
●Vcc NOISE
○Bypass Condenser
Noise and surges on power line may cause abnormal function. It is recommended that the bypass condensers (0.1µF) are
attached on the Vcc and GND line beside the device. It is also recommended to attach bypass condensers on the board
close to the connector.
●Cautions on use
1) Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2)
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3)
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4)
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5)
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6)
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7)
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
8)
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9)
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10) Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11) Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
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BU9882xx-W Series
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●Cautions on use - Continued
12) Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation
of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower
than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power
supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have
voltages within the values specified in the electrical characteristics of this IC.
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BU9882xx-W Series
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●Ordering Information
Product Code Description
B
U
9
8
8
2
x
x
-
W
x
x
Package
F
:SOP14
FV
:SSOP-B14
Double Cell
Packaging and forming specification
E2
: Embossed tape and reel
(SOP14, SSOP-B14)
●Lineup
Package
Capacity
2K
Type
SOP14
SSOP-B14
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Reel of 2500
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●Physical Dimension Tape and Reel Information
SOP14
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BU9882xx-W Series
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●Physical Dimension Tape and Reel Information - Continued
SSOP-B14
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●Marking Diagrams
SOP14 (TOP VIEW)
Part Number Marking
SSOP-B14 (TOP VIEW)
Part Number Marking
LOT Number
LOT Number
1PIN MARK
1PIN MARK
●Marking Information
Capacity
2K
Product Name
Marking
BU9882
9882
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Package
Type
SOP14
SSOP-B14
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BU9882xx-W Series
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●Revision History
Date
Revision
19.Jul.2012
21.Aug.2015
001
002
Changes
New Release
DIP14 delete
Changed Operational Note
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
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Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
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Rev.001
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
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Rev.001