SC3102 2A Synchronous Step-Down Regulator POWER MANAGEMENT Features Description VIN Range: 2.9 – 5.5V Preset VOUT Range: 1.0V to 3.3V Up to 2A Output Current Ultra-Small Footprint, <1mm Height 1.5MHz Switching Frequency Selectable Forced PSAVE or Forced PWM Operation Efficiency Up to 95% Low Output Noise Across Load Range Excellent Transient Response Start Up into Pre-Bias Output 100% Duty-Cycle Low Dropout Operation <1μA Shutdown Current Externally Programmable Soft-Start Time Power Good indicator Input Under-Voltage Lockout Output Over-Voltage, Current Limit Protection Over-Temperature Protection 3mm x 3mm x 0.6mm thermally enhanced MLPQ-UT16 package -40 to +85°C Temperature Range Pb-free, Halogen free, and RoHS/WEEE compliant Applications The SC3102 is a 2A synchronous step-down regulator designed to operate with an input voltage range of 2.9V to 5.5V. The device requires minimal external components for a complete step down regulator solution. The output voltage is factory predetermined with an available range of 1.0V to 3.3V. The SC3102 is optimized for maximum efficiency over a wide range of load currents. During full load operation, the SC3102 operates in forced PWM mode with a fixed 1.5MHz oscillator frequency, allowing the use of small surface mount external components. As the load decreases, the regulator has the option to transition, via the MODE pin, into forced Power Save mode to maximize efficiency or to stay in forced PWM mode. The SC3102 offers output short circuit and thermal protection to safe guard the device under extreme operating conditions. The enable pin provides on/off control of the regulator. When connected to logic low, the device enters shutdown and consumes less than 1μA of current. Other protection features include programmable soft-start with Power Good indicator, over voltage protection and under voltage lockout. The SC3102 is available in a thermally-enhanced, 3mm x 3mm x 0.6mm MLPQ-UT16 package and has a rated temperature range of -40 to +85°C. Office Automation Switches and Routers Network Cards LCD TV Typical Application Circuit L 1.5μH VIN PVIN LX AVIN VOUT 1Ohm CIN 10μF VOUT COUT 47μF 0.1μF SC3102 PGOOD EN MODE SS PGND AGND CSS Rev 2.2 © Semtech Corporation 1 SC3102 Pin Configuration LX LX LX PGND Ordering Information SC3102xULTRT(2)(3)(4) 16 15 14 13 SC3102xEVB(5) 12 PGND 2 11 PGND AGND 3 10 VOUT AVIN 4 PVIN 1 PVIN TOP VIEW T 5 6 7 8 MODE EN PGOOD NC 9 SS Device Package 3mm x 3mm x 0.6mm MLPQ-UT16 Evaluation Board Notes: (1) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. (2) Available in tape and reel only. A reel contains 3,000 devices. (3) Device is Pb-free, Halogen free, and RoHS/WEEE compliant. (4) “x” is the code of the output voltage. See Table 1 for the code. For example, the device number for VOUT= 1.50V is SC3102HULTRT. (5) “x” is the code of the output voltage. See Table 1 for the code. For example, the EVB with VOUT= 1.50V is SC3102HEVB. 3mm x 3mm x 0.6mm MLPQ-UT16 θJA = 40°C/W (1); θJC = 7°C/W Marking Information 102X yyww nnnn Table 1: Available Output Voltages Code VOUT(6) D 1.10 E 1.20 H 1.50 Notes: (6) Contact Semtech marketing for alternative output voltage options. Marking for 3mm x 3mm MLPQ-UT 16 Lead Package: x = Code of the output voltage (Example: H for VOUT=1.50V) yyww = Datecode (Example: 0852) nnnn = Semtech Lot number (Example: E901) 2 SC3102 Recommended Operating Conditions Absolute Maximum Ratings PVIN and AVIN Supply Voltages ………………… -0.3 to 6.0V Supply Voltage PVIN and AVIN …………………… 2.9 to 5.5V LX Voltage(9) …………………… Maximum DC Output Current ………………………… -0.3 to PVIN+0.3V, 6V Max 2.0A VOUT Voltage …………………………… -0.3 to AVIN+0.3V Maximum DC Output Current in Forced PSAVE Mode … 0.35A CTLx pins Voltages ……………………… -0.3 to AVIN+0.3V Temperature Range …………………………… -40 to +85˚C Peak IR Reflow Temperature …………………………. 260°C Input Capacitor ……………………………………… 10μF ESD Protection Level(8) …………………………………. Output Capacitor ……………………… 47μF (or 2 x 22μF) 2kV Output Inductor ……………………………………… 1.5 μH Thermal Information Thermal Resistance, Junction to Ambient(7) ………… 40 °C/W Thermal Resistance, Junction to Case …………… 7 °C/W Maximum Junction Temperature …………………… +150°C Storage Temperature Range ………………… -65 to +150 °C Exceeding the absolute maximum ratings may result in permanent damage to the device and/or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. Notes: (7) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. (8) Tested according to JEDEC standard JESD22-A114-B. (9) Due to parasitic board inductance, the transient LX pin voltage at the point of measurement may appear larger than that which exists on silicon. The device is designed to tolerate the short duration transient voltages that will appear on the LX pin due to the deadtime diode conduction, for inductor currents up to the current limit setting of the device. Electrical Characteristics Unless specified: PVIN= AVIN= 5.0V, VOUT= 1.50V, CIN= 10μF, COUT= 2 x 22μF; L= 1.5μH; -40°C≤ TJ ≤ +125 °C; Unless otherwise noted typical values are TA= +25 °C. Parameter Under-Voltage Lockout Symbol Conditions Min Typ Max Units Rising AVIN, PVIN=AVIN 2.70 2.80 2.90 V UVLO Hysteresis Output Voltage Tolerance(10) Current Limit 300 ΔVOUT PVIN= AVIN= 2.9 to 5.5V; IOUT=0A -1.25 ILIMIT Peak LX current 2.5 3.0 mV +1.25 % 3.75 A No load, MODE= High 12 mA No load, MODE= Low 60 μA ISHDN EN= AGND 1 10 High Side Switch Resistance(11) RDSON_P ILX= 100mA, TJ= 25 °C 50 85 Low Side Switch Resistance(11) RDSON_N ILX= -100mA, TJ= 25 °C 35 60 PVIN= AVIN= 5.5V; LX= 0V; EN= AGND 1 10 Supply Current Shutdown Current LX Leakage Current(11) Load Regulation IQ ILK(LX) ΔVLOAD-REG Oscillator Frequency fOSC Soft-Start Charging Current(11) ISS Foldback Holding Current ICL_HOLD μA mΩ μA PVIN= AVIN= 5.5V; LX= 5.0V; EN= AGND -20 PVIN= AVIN= 5.0V, MODE=High, IOUT=1mA to 2A ±0.3 1.275 Average LX Current -1 1.5 % 1.725 MHz +5 μA 1 A 3 SC3102 Electrical Characteristics (continued) Parameter Symbol Forced PSAVE Mode Current Impedence of PGOOD Low Maximum output current loading 350 Typ Max Units mA 10 Ω VOUT rising 90 % Asserted 2 ms PGOOD= Low 20 μs tEN_DLY From EN Input High to SS starts rising 50 μs IEN EN =AVIN or AGND VPG_TH PGOOD Delay VPG_DLY EN Input Current(11) Min RPGOOD_LO PGOOD Threshold EN Delay Conditions EN Input High Threshold VEN_HI EN Input Low Threshold VEN_LO MODE Input Current(11) IMODE -2.0 2.0 1.2 MODE= AVIN or AGND μA V -2.0 0.4 V 2.0 μA MODE Input High Threshold VMODE_HI MODE Input Low Threshold VMODE_LO VOUT Over Voltage Protection VOVP Thermal Shutdown Temperature TSD 160 °C TSD_HYS 10 °C Thermal Shutdown Hysteresis 1.2 110 V 115 0.4 V 120 % Notes: (10) The “Output Voltage Tolerance” includes output voltage accuracy, voltage drift over temperature and line regulation. (11) A negative current means the current flows into the pin and a positive current means the current flows out from the pin. 4 SC3102 Pin Descriptions Pin # Pin Name 1,2 PVIN Input supply voltage for the converter power stage. 3 AGND Ground connection for the internal circuitry. AGND needs to be connected to PGND directly. 4 AVIN Power supply for the internal circuitry. AVIN is required to be connected to PVIN through an R-C filter of 1Ω and 100nF. MODE MODE select pin. When connected to logic high, the device operates in forced PWM mode. When connected to logic low, it operates in forced PSAVE mode at light load. The MODE pin has a 500kΩ internal pulldown resistor. This resistor is switched in circuit whenever the MODE pin is “Low” or when the part is in undervoltage lockout or disabled. 6 EN Enable pin. When connected to logic high or tied to the AVIN pin, the SC3102 is on. When connected to logic low, the device enters shutdown and consumes less than 1μA current (typ.). The enable pin has a 500kΩ internal pulldown resistor. This resistor is switched in circuit whenever the EN pin is “Low” or when the part is in undervoltage lockout. 7 PGOOD Power good indicator. When the output voltage reaches the PGOOD threshold, this pin will be open-drain (after the PGOOD delay), otherwise it is pulled low internally. 8 NC No connection. 9 SS Soft-Start. Connect a soft-start capacitor to program the soft-start time. There is a 5μA charging current flowing out of the pin. 10 VOUT Output voltage sense pin. 11,12,13 PGND Ground connection for converter power stage. 14,15,16 LX T Thermal Pad 5 Pin Function Switching node - connect an inductor between this pin and the output capacitor. Thermal pad for heatsinking purposes. Connection to PGND is recommended. It is not connected internally. 5 SC3102 Block Diagram AVIN 4 UVLO PGOOD PVIN 14 15 16 LX 11 12 13 PGND 5 MODE 7 Faults Power Good Logic & Delay AGND 1 2 0.45V 3 - + PGood Comp. 0.575V - + VOUT 10 OVP Comp. - + + 5μA -PWM Error Amp. + Control Logic & MOSFET Drivers PWM Comp. SS 9 Faults 0.5V EN 6 BANDGAP Oscillator & Ramp 6 SC3102 Typical Characteristics Circuit Conditions: CIN= 10μF/6.3V, COUT= 2 x 22μF/6.3V, CSS= 2.2nF, L= 1.5μH. Efficiency and Power Loss: MODE = High Load Regulation: MODE = High 100 0.5 0.3 VIN = 5V 85 0.2 80 Output Voltage (V) 90 1.51 0.4 Power Loss (W) Efficiency (%) VIN = 3.6V VIN = 2.9V 95 1.515 0.1 0.5 1 1.5 1.5 VIN = 2.9V 1.495 1.485 0 0 VIN = 3.6V VIN = 5V 1.49 VIN = 5V 75 1.505 0 2 0.5 1 1.5 2 Output Current (A) Output Current (A) Load Regulation: MODE = Low Efficiency Comparison: MODE - High vs Low 100 1.515 1.51 VIN = 3.6V, ML 95 VIN = 2.9V, MH Output Voltage (V) VIN = 3.6V, MH Efficiency (%) VIN = 3.6V 1.505 VIN = 2.9V, ML 90 85 VIN = 5V, ML VIN = 5V, MH 1.5 VIN = 5V 1.495 1.49 VIN = 2.9V 1.485 1.48 80 MH= Mode High ML= Mode Low 1.475 75 1.47 0 0.1 0.2 0.3 0.4 0.5 Output Current (A) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Output Current (A) RDS(ON) Variation vs. Input Voltage RDS(ON) Variation vs. Temperature 35% 30% 25% Variation 20% P-Channel 15% 10% 5% 0% ILX= ±100mA TA= 25°C -5% N-Channel -10% 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Input Voltage (V) 7 SC3102 Typical Waveforms Circuit Conditions: CIN= 10μF/6.3V, COUT= 2 x 22μF/6.3V, CSS= 2.2nF, L= 1.5μH. Start Up: MODE = Low VIN = 5V, VOUT = 1.5V, IOUT = 50mA Start Up: MODE = High VIN = 5V, VOUT = 1.5V, IOUT = 50mA VOUT (5V/div) PGOOD VOUT (5V/div) PGOOD EN (0.5V/div) EN (0.5V/div) LX LX (1V/div) (1V/div) (2V/div) (2V/div) Time (500μs/div) Time (500μs/div) Pre-bias Start Up: MODE = Low Start Up and Shutdown: MODE = High VIN = 5V, VOUT = 1.5V, IOUT = 50mA VIN = 5V, VOUT = 1.5V, IOUT = 10mA VOUT PGOOD (5V/div) VOUT (5V/div) PGOOD (0.5V/div) EN EN (0.5V/div) LX LX (1V/div) (1V/div) (2V/div) (2V/div) Time (500μs/div) Time (500μs/div) 8 SC3102 Typical Waveforms (continued) Circuit Conditions: CIN= 10μF/6.3V, COUT= 2 x 22μF/6.3V, CSS= 2.2nF, L= 1.5μH. Steady State: MODE = High Steady State: MODE = Low VIN = 5V, VOUT = 1.5V, IOUT = 0A VIN = 5V, VOUT = 1.5V, IOUT = 10mA VOUT (20mV/div) VOUT (20mV/div) INDUCTOR CURRENT (0.5A/div) INDUCTOR CURRENT (0.5A/div) (2V/div) (2V/div) LX LX Time (500ns/div) Time (1μs/div) Steady State: MODE = High Steady State: MODE = Low VIN = 5V, VOUT = 1.5V, IOUT = 2A VIN = 5V, VOUT = 1.5V, IOUT = 10mA (20mV/div) (0.5A/div) VOUT VOUT (20mV/div) INDUCTOR CURRENT (2V/div) LX (0.5A/div) INDUCTOR CURRENT (2V/div) Time (500ns/div) LX Time (50μs/div) 9 SC3102 Typical Waveforms (continued) Circuit Conditions: CIN= 10μF/6.3V, COUT= 2 x 22μF/6.3V, CSS= 2.2nF, L= 1.5μH. MODE changing from Low to High Overload Recovery When MODE is Low VIN = 5V, VOUT = 1.5V, IOUT = 200mA DC (100mV/div) VIN = 5V, VOUT = 1.5V, Load Step = 0A to 800mA to 0A VOUT (1V/div) MODE (1A/div) VOUT (100mV/div) (1A/div) INDUCTOR CURRENT INDUCTOR CURRENT (1A/div) LX (5V/div) LOAD STEP (5V/div) LX Time (20μs/div) Time (5μs/div) Load Step during MODE = Low MODE Change and Load Step VIN = 5V, VOUT = 1.5V, IOUT = 200mA DC, Load Step = 800mA VIN = 5V, VOUT = 1.5V, Load Step = 0A to 350mA to 0A (100mV/div) (100mV/div) VOUT (1V/div) MODE (1A/div) (0.5A/div) VOUT INDUCTOR CURRENT INDUCTOR CURRENT (0.5A/div) LOAD STEP (0.5A/div) LOAD STEP (5V/div) Time (500μs/div) LX Time (20μs/div) 10 SC3102 Typical Waveforms (continued) Circuit Conditions: CIN= 10μF/6.3V, COUT= 2 x 22μF/6.3V, CSS= 2.2nF, L= 1.5μH. Load Transient: MODE = High Over-Current Protection: Fold Back VIN = 5V, VOUT = 1.5V, IOUT = 400mA to 1.2A VIN = 5V, VOUT = 1.5V, Load Step = 0A to 3.2A (100mV/div) VOUT (5V/div) LX (1A/div) INDUCTOR CURRENT (500mV/div) VOUT (1A/div) LOAD STEP (1A/div) INDUCTOR CURRENT (5V/div) LX (1A/div) LOAD STEP Time (10μs/div) Time (5μs/div) Load Transient: MODE = High VIN = 5V, VOUT = 1.5V, IOUT = 1.2A to 400mA (100mV/div) VOUT (5V/div) LX (1A/div) (1A/div) INDUCTOR CURRENT LOAD STEP Time (10μs/div) 11 SC3102 Applications Information (continued) Detailed Description The SC3102 is a synchronous step-down Pulse Width Modulated (PWM), DC-DC converter utilizing a 1.5MHz fixed-frequency voltage mode architecture. The device is designed to operate in fixed-frequency PWM mode and has the option to enter forced power save mode (PSAVE) at light loads to improve efficiency. The switching frequency is chosen to minimize the size of the external inductor and capacitors while maintaining high efficiency. Inductor Current Load Current 0A Upper Threshold Vout Zero-crossing Lower Threshold Operation During normal operation, the PMOS MOSFET is activated on each rising edge of the internal oscillator. The period is set by the onboard oscillator when in PWM mode. The device has an internal synchronous NMOS rectifier and does not require a Schottky diode on the LX pin. The device operates as a buck converter in PWM mode with a fixed frequency of 1.5MHz at medium to high loads. The MODE input is used to select between forced PWM and forced PSAVE modes. To improve the efficiency at light loads, the MODE pin can be set low to force PSAVE operation. When the MODE pin is held high, the device operates in forced continuous PWM mode regardless of the output load condition. Figure 1 — Operation Conditions in PSAVE Exiting from PSAVE: Figure 2 shows the case of no change in the output current and the MODE pin toggling from low to high. SC3102 enters PWM mode at the end of the PSAVE cycle, where the output voltage crosses the lower PSAVE threshold. Inductor Current Mode change request Forced PWM mode 0A Forced Power Save Mode Operation Connect the MODE pin to ground to force PSAVE mode. The maximum load current supported in forced PSAVE mode is 350mA. Vout MODE = High Operation in PSAVE: MODE = Low When the MODE pin toggles low, SC3102 operates in PSAVE mode after waiting for 64 switching cycles. Figure 1 shows the operating conditions in this mode. When the output current is less than 350mA, the switching frequency depends upon the load, and the output voltage does not fall below its regulation threshold. When the output current is higher than 350mA, the switching frequency depends upon the zero current crossing timing and the output voltage droops below its regulation threshold. The output voltage recovers when the load current is less than 350mA. Load Current 0A Figure 2 — Exiting PSAVE at Light Load Figure 3 shows the behavior when there is a step increase in output current right after the MODE pin toggles high. The output voltage decreases initially due to the output capacitor supplying the load current. SC3102 changes the operation to PWM mode at t1 and recovers the output voltage. 12 SC3102 Applications Information (continued) Soft-Start Inductor Current Load Current 0A Vout MODE = High MODE = Low t1 Figure 3 — Exiting PSAVE with Heavy Load Protection Features The SC3102 provides the following protection features: Current Limit Over-Voltage Protection Soft-Start Operation Thermal Shutdown UVLO • • • • • Current Limit & OCP The internal PMOS power device in the switching stage is protected by a current limit feature. If the inductor current is above the PMOS current limit for 8 consecutive cycles, the part enters foldback current limit mode and the output current is limited to the current limit holding current (ICL_HOLD) which is approximately 900mA. Under this condition, the output voltage will be the product of ICL_HOLD and the load resistance. When the load presented falls below the current limit holding level, the output will charge to the upper PSAVE voltage threshold and return to normal operation. The SC3102 is capable of sustaining an indefinite short circuit without damage. During soft-start, if current limit has occurred before the SS voltage has reached 400mV, the part enters foldback current limit mode. Foldback current limit mode will be disabled during soft-start after the SS voltage is higher than 400mV. Over-Voltage Protection In the event of a 15% over-voltage on the output, the PWM drive is disabled with the LX pin floating. Switching does not resume until the output voltage falls below the nominal Vout regulation voltage. The soft-start mode is activated after AVIN reaches it’s UVLO voltage threshold and EN is set high to enable the part. A thermal shutdown event will also activate the softstart sequence. The soft-start mode controls the slew-rate of the output voltage during startup thus limiting in-rush current on the input supply. During start up, the reference voltage for the error amplifier is clamped by the voltage on the SS pin. The output voltage slew rate during softstart is determined by the value of the external capacitor connected to the SS pin and the internal 5μA charging current. The SC3102 requires a minimum soft-start time from enable to final regulation in the order of 200μs, including the 50μs enable delay. As a result the soft-start capacitor, Css, should be higher than 1.5nF. During start up, the chip operates in forced PWM mode. The value of Css for the desired soft-start time, tss, can be determined by Equation 1. t SS = CSS × 0.5V 5μA (1) The SC3102 is capable of starting up into a pre-biased output. When the output is pre-charged by another supply rail, the SC3102 will not discharge the output during the soft-start period. Thermal Shutdown The device has a thermal shutdown feature to protect the SC3102 if the junction temperature exceeds 160°C. During thermal shutdown, the on-chip power devices are disabled, floating the LX output. When the temperature drops by 10°C, it will initial a soft-start cycle to resume normal operation. Under-Voltage Lockout Under-Voltage Lockout (UVLO) is enabled when the input voltage drops below the UVLO threshold. This prevents the device from entering an ambiguous state in which regulation cannot be maintained. Hysteresis of approximately 300mV is included to prevent chattering near the threshold. When the AVIN voltage rises back to the turn-on threshold and EN is high, a soft-start sequence is initiated. Power Good The power good (PGOOD) is an open-drain output. When 13 SC3102 Applications Information (continued) the output voltage drops below 10% of nominal, the PGOOD pin is pulled low after a 20μs delay. During startup, PGOOD will be asserted 2ms (typical) after the output voltage reaches 90% of the final regulation voltage. The faults of over voltage, fold-back current limit mode and thermal shutdown will force PGOOD low after a 20μs delay. When recovering from a fault, PGOOD will be asserted 2ms (typical) after Vout reaches 90% of the final regulation voltage. in applications where faster transient response is required. More output capacitance will reduce the output deviation for a particular load transient. When using low inductance, the maximum peak inductor current at any condition (normal operation and start up) can not exceed 2.5A which is the guaranteed minimum current limit. The saturation current rating of the inductor needs to be at least larger than the peak inductor current which is the maximum output current plus half of the inductor ripple current. Enable The EN input is used to enable or disable the device when the device is not in UVLO. When EN is low (grounded), the device enters shutdown mode and consumes less than 1μA of current. In shutdown mode, the device tri-states the LX pin and pulls down the SS pin. The EN pin has a 500kΩ internal pull-down resistor. This resistor is switched in circuit whenever the EN pin is below its threshold, or when the device is in under voltage lockout and AVIN exceeds 0.8V. When the device is enabled, it takes about 50μs for the internal circuitry to wake up and begin the soft-start sequence. 100% Duty-Cycle Operation The SC3102 is capable of operating at 100% duty-cycle. When the difference between the input voltage and output voltage is less than the minimum dropout voltage, the PMOS switch turns completely on, operating in 100% duty-cycle. The minimum dropout voltage is the output current multiplied by the on-resistance of the internal PMOS switch and the DC-resistance of the inductor when the PMOS switch is on continuously. Output L-C filter Selection The SC3102 has fixed internal loop-gain compensation. It is optimized for X5R or X7R ceramic output capacitors and an output L-C filter corner frequency of less than 34kHz. The output L-C corner frequency can be determined by Equation 2. fC = 1 2π L ⋅ COUT (2) In general, the inductor is chosen to set the inductor ripple current to approximately 30% of the maximum output current. It is recommended to use a typical inductor value of 1μH to 2.2μH with output ceramic capacitors of 44μF or higher. Lower inductance should be considered 14 SC3102 Applications Information (continued) PCB Layout Considerations VIN U1 COUT GND C1 CSS GND PG oo d O D EN E R1 M 1. The input capacitor, CIN should be placed as close to the PVIN and PGND pins as possible. This capacitor provides a low impedance loop for the pulsed currents present at the buck converter’s input. Use short wide traces to connect as closely to the IC as possible. This will minimize EMI and input voltage ripple by localizing the high frequency current pulses. 2. Keep the LX pin traces as short as possible to minimize pickup of high frequency switching edges to other parts of the circuit. COUT and L should be connected as close as possible between the LX and PGND pins, with a direct return to the PGND pin from COUT. 3. Route the output voltage feedback/sense path away from the inductor and LX node to minimize noise and magnetic interference. 4. Use a ground plane referenced to the SC3102 PGND pin. Use several vias to connect to the component side ground to further reduce noise and interference on sensitive circuit nodes. 5. If possible, minimize the resistance from the VOUT and PGND pins to the load. This will reduce the voltage drop on the ground plane and improve the load regulation. And it will also improve the overall efficiency by reducing the copper losses on the output and ground planes. VOUT L CIN The layout diagram in Figure 4 shows a recommended top-layer PCB for the SC3102 and supporting components. Figure 5 shows the bottom layer for this PCB. Fundamental layout rules must be followed since the layout is critical for achieving the performance specified in the Electrical Characteristics table. Poor layout can degrade the performance of a DC-DC converter and can contribute to EMI problems, ground bounce, and resistive voltage losses. Poor regulation and instability can result. The following guidelines are recommended when developing a PCB layout: Figure 4 — Recommended PCB Layout (Top Layer) VOUT VIN GND GND Figure 5 — Bottom Layer Detail 15 SC3102 Outline Drawing – 3x3 MLPQ-UT16 D A B DIM PIN 1 INDICATOR (LASER MARK) A A1 A2 b D D1 E E1 e L N aaa bbb E A2 A SEATING PLANE aaa C DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX .024 .002 (.006) .007 .009 .012 .114 .118 .122 .061 .067 .071 .114 .118 .122 .061 .067 .071 .020 BSC .012 .016 .020 16 .003 .004 .020 .000 0.60 0.05 (0.152) 0.18 0.23 0.30 2.90 3.00 3.10 1.55 1.70 1.80 2.90 3.00 3.10 1.55 1.70 1.80 0.50 BSC 0.30 0.40 0.50 16 0.08 0.10 0.50 0.00 C A1 D1 e/2 LxN E/2 E1 NOTES: 2 CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 1. 1 N 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 3. DAP IS 1.90 x 1.90mm. e bxN D/2 bbb C A B Land Pattern – 3x3 MLPQ-UT16 H R DIM (C) K G Y X P Z C G H K P R X Y Z DIMENSIONS INCHES MILLIMETERS (.114) .083 .067 .067 .020 .006 .012 .031 .146 (2.90) 2.10 1.70 1.70 0.50 0.15 0.30 0.80 3.70 NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE. 16 SC3102 © Semtech 2012 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range. SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER’S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804 www.semtech.com 17