SC4525E - Semtech

SC4525E
28V 3A Step-Down Switching Regulator
POWER MANAGEMENT
Features
Description
Wide Input Voltage Range: 3V to 28V
3A Output Current
200kHz to 2MHz Programmable Frequency
Precision 1V Feedback Voltage
Peak Current-Mode Control
Cycle-by-Cycle Current Limiting
Hiccup Overload Protection with Frequency Foldback
Soft-Start and Enable
Thermal Shutdown
Thermally Enhanced 8-pin SOIC Package
Fully RoHS and WEEE Compliant











Applications
XDSL and Cable Modems
Set Top Boxes
Point of Load Applications
CPE Equipment
DSP Power Supplies
LCD and Plasma TVs
Automotive Car Audio







The SC4525E is a constant frequency peak current-mode
step-down switching regulator capable of producing 3A
output current from an input ranging from 3V to 28V. The
switching frequency of the SC4525E can be programmed
up to 2MHz for component miniaturization or it can be
set at lower frequencies to accommodate high step-down
ratios. The SC4525E is suitable for next generation XDSL
modems, high-definition TVs and various point of load
applications.
Peak current-mode PWM control employed in the
SC4525E achieves fast transient response with simple loop
compensation. Cycle-by-cycle current limiting and hiccup
overload protection reduces power dissipation during
output overload. Soft-start function reduces input startup current and prevents the output from overshooting
during power-up.
The SC4525E is available in SOIC-8 EDP package.
S C 4 52 5A
Typical Application Circuit
Efficiency
IN
C4
4 .7mF
90
D1
10 V – 28 V
1N 4148
C1
0 .33 mF
L1
BST
IN
SW
S C 4 5 2 5E
S S /E N
5.2mH
80
OUT
R4
33 .2 k
5 V /3 A
FB
COMP
C7
22 nF
C8
22 pF
ROSC
R7
12 .7k
GND
R5
15.8k
D2
20 B Q 030
R6
8.25k
C5
2.2nF
L1: C oiltronics C D 1- 5R 2
C2
10 mF X 3
Efficiency (%)
V
V IN = 24V
V IN = 12V
70
60
50
40
C 2: M urata G R M 31C R 60 J106 K
C 4: M urata G R M 32 E R 71 H 475 K
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Load Current (A)
Figure 1. 1MHz 10V -28V to 5V/3A Step-down Converter
Rev. 2.1
E fficien
c y of th e 1 M H z 1 0 V -2 8 V to 5 V /3 A S tep -D ow n C on ve
© 2013 Semtech
Corporation
SC4525E
Pin Configuration
Ordering Information
SW
1
8
BST
IN
2
7
FB
ROSC
3
6
COMP
GND
4
5
S S /E N
9
Device
Package
SC4525ESETRT(1)(2)
SOIC-8 EDP
SC4525EEVB
Evaluation Board
Notes:
(1) Available in tape and reel only. A reel contains 2,500 devices.
(2) Available in lead-free package only. Device is fully WEEE and RoHS
compliant and halogen-free.
(8 - Pin SOIC - EDP)
Marking Information
yyww=Date code (Example: 0752)
xxxxx=Semtech Lot No. (Example: E9010)
SC4525E
Absolute Maximum Ratings
Thermal Information
VIN Supply Voltage ……………………………… -0.3 to 32V
Junction to Ambient (1) ……………………………… 36°C/W
BST Voltage ……………………………………………… 42V
Junction to Case (1) …………………………………
BST Voltage above SW …………………………………… 34V
Maximum Junction Temperature……………………… 150°C
5.5°C/W
Storage Temperature ………………………… -65 to +150°C
SS Voltage ……………………………………………-0.3 to 3V
Lead Temperature (Soldering) 10 sec ………………… 300°C
FB Voltage ………………………………………….... -0.3 to 7V
Recommended Operating Conditions
SW Voltage ………………………………………… -0.6 to VIN
SW Transient Spikes (10ns Duration)……… -2.5V to VIN +1.5V
Input Voltage Range ……………………………… 3V to 28V
Peak IR Reflow Temperature ………………………….
Maximum Output Current ……………………………… 3A
260°C
ESD Protection Level ………………………………… 2000V
(2)
Operating Ambient Temperature …………… -40 to +105°C
Operating Junction Temperature …………… -40 to +125°C
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the
Electrical Characteristics section is not recommended.
NOTES(1) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
(2) Tested according to JEDEC standard JESD22-A114-B.
Electrical Characteristics
Unless otherwise noted, VIN = 12V, VBST = 15V, VSS = 2.2V, -40°C < TA = TJ < 125°C, ROSC = 12.1kΩ.
Parameter
Conditions
Min
Typ
Max
Units
28
V
2.95
V
Input Supply
Input Voltage Range
VIN Start Voltage
3
VIN Rising
2.70
VIN Start Hysteresis
VIN Quiescent Current
VIN Quiescent Current in Shutdown
2.82
225
mV
VCOMP = 0 (Not Switching)
2
2.6
mA
VSS/EN = 0, VIN = 12V
40
52
µA
1.000
1.020
V
Error Amplifier
Feedback Voltage
Feedback Voltage Line Regulation
FB Pin Input Bias Current
0.980
VIN = 3V to 28V
0.005
VFB = 1V, VCOMP = 0.8V
-170
%/V
-340
nA
Error Amplifier Transconductance
300
µΩ-1
Error Amplifier Open-loop Gain
60
dB
15.2
A/V
VFB = 0.9V
2.35
V
COMP Source Current
VFB = 0.8V, VCOMP = 0.8V
17
COMP Sink Current
VFB = 1.2V, VCOMP = 0.8V
25
COMP Pin to Switch Current Gain
COMP Maximum Voltage
µA
Internal Power Switch
Switch Current Limit
Switch Saturation Voltage
(Note 1)
ISW = -3.9A
3.9
5.1
6.6
A
380
600
mV
SC4525E
Electrical Characteristics (Cont.)
Unless otherwise noted, VIN = 12V, VBST = 15V, VSS = 2.2V, -40°C < TA = TJ < 125°C, ROSC = 12.1kΩ.
Parameter
Conditions
Min
Typ
Max
Units
Minimum Switch On-time
VIN = 10V, RSW=10Ω
70
120
230
ns
Minimum Switch Off-time
VIN = 6V, RSW=6Ω
30
75
130
ns
10
µA
Switch Leakage Current
Minimum Bootstrap Voltage
ISW = -3.9A
1.8
2.3
V
BST Pin Current
ISW = -3.9A
100
150
mA
Oscillator
Switching Frequency
Foldback Frequency
ROSC = 12.1kΩ
1.04
1.3
1.56
MHz
ROSC = 73.2kΩ
230
300
370
kHz
ROSC = 12.1kΩ, VFB = 0
100
ROSC = 73.2kΩ, VFB = 0
35
60
90
0.2
0.3
0.4
V
0.95
1.2
1.4
V
250
kHz
Soft Start and Overload Protection
SS/EN Shutdown Threshold
SS/EN Switching Threshold
Soft-start Charging Current
VFB = 0 V
VSS/EN = 0 V
VSS/EN = 1.5 V
1.9
1.6
Soft-start Discharging Current
2.4
3.2
µA
1.5
µA
Hiccup Arming SS/EN Voltage
VSS/EN Rising
2.15
V
Hiccup SS/EN Overload Threshold
VSS/EN Falling
1.9
V
Hiccup Retry SS/EN Voltage
VSS/EN Falling
0.6
1.0
1.2
V
Over Temperature Protection
Thermal Shutdown Temperature
165
°C
Thermal Shutdown Hysteresis
10
°C
Note 1: Switch current limit does not vary with duty cycle.
SC4525E
Pin Descriptions
SO-8
Pin Name
Pin Function
1
SW
Emitter of the internal NPN power transistor. Connect this pin to the inductor, the freewheeling diode and the
bootstrap capacitor.
2
IN
Power supply to the regulator. It is also the collector of the internal NPN power transistor. It must be closely bypassed to the ground plane with a capacitor.
3
ROSC
An external resistor from this pin to ground sets the oscillator frequency.
4
GND
Ground pin
5
SS/EN
Soft-start and regulator enable pin. A capacitor from this pin to ground provides soft-start and overload hiccup
functions. Hiccup can be disabled by overcoming the internal soft-start discharging current with an external pullup resistor connected between the SS/EN and the IN pins. Pulling the SS/EN pin below 0.2V completely shuts off
the regulator to low current state.
6
COMP
The output of the internal error amplifier. The voltage at this pin controls the peak switch current. A RC compensation network at this pin stabilizes the regulator.
7
FB
The inverting input of the error amplifier. If VFB falls below 0.8V, then the switching frequency will be reduced to
improve short-circuit robustness (see Applications Information for details).
8
BST
Supply pin to the power transistor driver. Tie to an external diode-capacitor bootstrap circuit to generate drive
voltage higher than VIN in order to fully enhance the internal NPN power transistor.
9
Exposed Pad
The exposed pad serves as a thermal contact to the circuit board. While the exposed pad is electrically isolated, it
is suggested to be soldered to the ground plane of the PC board.
SC4525E
Block Diagram
IN
SLO PE
COMP
COMP
6
FB
7
+
2
S
+
+
IS E N
3 .5 3m W
+ EA
+
OC
IL IM
+
1 8m V
-
BST
V1
8
+
PW M
-
S
R
FREQ UENCY
F O LD B A C K
ROSC
Q
POW ER
T R A N S IS T O R
CLK
O S C IL L A T O R
3
1.2 V
1
R
R
SW
O VERLO AD
-
PW M
A1
+
S S /E N
5
1V
1 .9V
REFERENCE
& THERM AL
SHUTDO W N
FAULT
S O F T -S T A R T
AND
O VERLO AD
H IC C U P
CONTROL
GND
4
Figure 2 — SC4525E Block Diagram
1.9 V
S S /E N
IC
2 .4mA
B4
+
S
B1
O VERLO AD
S
OC
R
PW M
R
B2
1V /2 .1 5V
FAULT
Q
ID
3 .9 mA
_
Q
B3
Figure 3 — Soft-start and Overload Hiccup Control Circuit
SC4525E
Typical Characteristics
Efficiency
VO = 5V
85
70
65
VO = 1 .5V
60
55
45
1 .0 1
V O = 3 .3 V
75
VO = 2 .5 V
70
65
60
55
1M H z, V IN = 12 V
D 2 = B 320 A
50
V IN = 1 2 V
VO = 5 V
80
VO = 2 .5V
75
Efficiency (%)
Efficiency (%)
80
1 .0 2
85
V O = 3 .3V
Feedback Voltage vs Temperature
Efficiency
90
VFB (V)
90
1M H z, VIN = 24 V
50
40
40
0
0 .5
1
1.5
2
Load Current (A)
2 .5
0
3
Frequency Setting Resistor
vs Frequency
1000
0 .5
1
1 .5
2
Load Current (A)
2 .5
-5 0
Frequency vs Temperature
0
25
50
75
100 125
Foldback Frequency vs VFB
1 .2 5
Normalized Frequency
1 .1
R O S C = 7 3.2 k
1 .0
R O S C = 1 2.1 k
0 .9
-2 5
Temperature (oC)
1 .2
Normalized Frequency
ROSC (k)
10
0 .9 7
3
V IN = 1 2V
100
0 .9 9
0 .9 8
D 2 = B 330 A
45
1 .0 0
1
R O S C = 7 3.2 k
0 .7 5
0 .5
TA = 2 5o C
0 .2 5
R O S C = 1 2 .1 k
1
0
0 .8
0
0 .2 5 0.5 0 .7 5 1
1 .2 5 1 .5 1 .7 5 2
-5 0
-2 5
0
Frequency (MHz)
300
-4 0 oC
200
150
0 .2 0
0 .4 0
0 .6 0
0 .8 0
1 .0 0
VF B (V)
Switch Current Limit vs Temperature
5 .2
Current Limit (A)
V CESAT (mV)
350
0 .0 0
125
1 0 0.0
BST Pin Current vs Switch Current
V IN = 1 2 V
V BST =15V
4 .8
1 2 5 oC
2 5 oC
100
Temperature ( C)
450
250
75
O
Switch Saturation Voltage
vs Switch Current
400
50
BST Pin Current (mA)
500
25
4 .4
4 .0
3 .6
7 5.0
-4 0 o C
5 0.0
1 2 5oC
2 5.0
100
3 .2
50
0 .0 0.5 1 .0 1 .5 2 .0 2 .5 3 .0 3 .5 4 .0 4 .5
Switch Current (A)
0.0
-5 0
-2 5
0
25
50
75
Temperature ( o C)
100 125
0
0 .5
1
1 .5
2
2 .5
3
3 .5
4
Switch Current (A)
SC4525E
Curve 12
Curve 11
Typical Characteristics (Cont.)
S S 270 RE V 6-7
S S 270 RE V 6-7
S S 270 RE V 6-7
VIN Supply Current
vs Soft-Start Voltage
VIN Thresholds vs Temperature
2.5
S ta rt
2.8
2.7
2.6
80
-40 o C
1.5
1.0
Curve 14
2.5
0.5
2.4
0.0
U VL O
-50
-25
0
Curve 15
25
50
75
100
0
125
0.5
125 o C
40
0
1
1.5
S S 270 R E V 6-7
0
2
5
10
20
25
30
Soft-Start Charging Current
vs Soft-Start Voltage
SS Shutdown Threshold
vs Temperature
0.40
125 o C
15
VIN (V)
S S 270 RE V 6-7
VIN Quiescent Current vs VIN
2.5
-40 o C
VSS (V)
Temperature ( C)
S S 2 7 0 R E V 6 -7
60
20
o
0.0
-0.5
o
SS Threshold (V)
-40 C
1.5
1.0
0.5
0.35
Current (uA)
2.0
Current (mA)
V SS = 0
125 o C
2.0
Current (mA)
VIN Threshold (V)
2.9
Current (uA)
3.0
VIN Shutdown Current vs VIN
100
0.30
15
VIN (V)
20
25
-2.0
-3.0
0.20
10
-40 o C
-1.5
-2.5
0.0
5
125 o C
0.25
V C O MP = 0
0
-1.0
30
-50
-25
0
25
50
75
o
Temperature ( C)
100
125
0
0.5
1
1.5
2
VSS (V)
SC4525E
Applications Information
Operation
The SC4525E is a constant-frequency, peak current-mode,
step-down switching regulator with an integrated 28V,
3.9A power NPN transistor. Programmable switching
frequency makes the regulator design more flexible. With
the peak current-mode control, the double reactive poles
of the output LC filter are reduced to a single real pole by
the inner current loop. This simplifies loop compensation
and achieves fast transient response with a simple Type-2
compensation network.
As shown in Figure 2, the switch collector current is
sensed with an integrated 3.53mW sense resistor. The
sensed current is summed with a slope-compensating
ramp before it is compared with the transconductance
error amplifier (EA) output. The PWM comparator trip
point determines the switch turn-on pulse width. The
current-limit comparator ILIM turns off the power switch
when the sensed signal exceeds the 18mV current-limit
threshold.
Driving the base of the power transistor above the
input power supply rail minimizes the power transistor
saturation voltage and maximizes efficiency. An external
bootstrap circuit (formed by the capacitor C1 and the
diode D1 in Figure 1) generates such a voltage at the BST
pin for driving the power transistor.
shown in Figure 3). As the SS/EN voltage exceeds 0.4V,
the internal bias circuit of the SC4525E turns on and the
SC4525E draws 2mA from VIN. The 1.9µA charging current
turns off and the 2.4µA current source IC in Figure 3 slowly
charges the soft-start capacitor.
The error amplifier EA in Figure 2 has two non-inverting
inputs. The non-inverting input with the lower voltage
predominates. One of the non-inverting inputs is biased
to a precision 1V reference and the other non-inverting
input is tied to the output of the amplifier A1. Amplifier A1
produces an output V1 = 2(VSS/EN -1.2V). V1 is zero and COMP
is forced low when VSS/EN is below 1.2V. During start up,
the effective non-inverting input of EA stays at zero until
the soft-start capacitor is charged above 1.2V. Once VSS/EN
exceeds 1.2V, COMP is released. The regulator starts to
switch when VCOMP rises above 0.4V. If the soft-start interval
is made sufficiently long, then the FB voltage (hence the
output voltage) will track V1 during start up. VSS/EN must be
at least 1.83V for the output to achieve regulation. Proper
soft-start prevents output overshoot. Current drawn from
the input supply is also well controlled.
Overload / Short-Circuit Protection
Table 2 lists various fault conditions and their
corresponding protection schemes in the SC4525E.
Table 2: Fault conditions and protections
Shutdown and Soft-Start
The SS/EN pin is a multiple-function pin. An external
capacitor connected from the SS pin to ground sets the
soft-start and overload shutoff times of the regulator
(Figure 3). The effect of VSS/EN on the SC4525E is summarized
in Table 1.
Table 1: SS/EN operation modes
SS/EN
Mode
Supply Current
<0.2V
Shutdown
18uA @ 5Vin
0.4V to 1.2V
Not switching
2mA
1.2V to 2.15V
Switching & hiccup disabled
>2.15V
Switching & hiccup armed
Load dependent
Pulling the SS/EN pin below 0.2V shuts off the regulator
and reduces the input supply current to 18µA (VIN = 5V).
When the SS/EN pin is released, the soft-start capacitor
is charged with an internal 1.9µA current source (not
Condition
Cause of Fault
Protective Action
Cycle-by-cycle limit at
IL>ILimit, V FB>0.8V
Over current
IL>ILimit, V FB<0.8V
Over current
VSS/EN Falling
Persistent over current
frequency foldback
Shutdown, then retry
SS/EN<1.9V
or short circuit
(Hiccup)
Tj>160C
Over temperature
Shutdown
programmed frequency
Cycle-by-cycle limit with
As summarized in Table 1, overload shutdown is disabled
during soft-start (VSS/EN<2.15V). In Figure 3, the reset input
of the overload latch B2 will remain high if the SS/EN
voltage is below 2.15V. Once the soft-start capacitor is
charged above 2.15V, the output of the Schmitt trigger
B1 goes high, the reset input of B2 goes low and hiccup
SC4525E
Applications Information (Cont.)
becomes armed. As the load draws more current from
the regulator, the current-limit comparator ILIM (Figure
2) will eventually limit the switch current on a cycle-bycycle basis. The over-current signal OC goes high, setting
the latch B3. The soft-start capacitor is discharged with
(ID - IC) (Figure 3). If the inductor current falls below the
current limit and the PWM comparator instead turns off
the switch, then latch B3 will be reset and IC will recharge
the soft-start capacitor. If over-current condition persists
or OC becomes asserted more often than PWM over
a period of time, then the soft-start capacitor will be
discharged below 1.9V. At this juncture, comparator B4
sets the overload latch B2. The soft-start capacitor will be
continuously discharged with (ID - IC). The COMP pin is
immediately pulled to ground. The switching regulator is
shut off until the soft-start capacitor is discharged below
1.0V. At this moment, the overload latch is reset. The
soft-start capacitor is recharged and the converter again
undergoes soft-start. The regulator will go through softstart, overload shutdown and restart until it is no longer
overloaded.
If the FB voltage falls below 0.8V because of output
overload, then the switching frequency will be reduced.
Frequency foldback helps to limit the inductor current
when the output is hard shorted to ground.
During normal operation, the soft-start capacitor is
charged to 2.4V.
Setting the Output Voltage
The regulator output voltage, VO, is set with an external
resistive divider (Figure 1) with its center tap tied to the FB
pin. For a given R6 value, R4 can be found by
 V

R4 = R6  O − 1 
1
.
0
V


Setting the Switching Frequency
The switching frequency of the SC4525E is set with an
external resistor from the ROSC pin to ground. Table 3 lists
the standard resistor values for typical frequency setting.
Table 3: Resistor for Typical Switching Frequency
Freq. (k)
ROSC (k)
Freq. (k)
ROSC (k)
Freq. (k)
ROSC (k)
200
110
700
25.5
1400
9.76
250
84.5
800
21.5
1500
8.87
300
69.8
900
18.2
1600
8.06
350
57.6
1000
15.8
1700
7.15
400
49.9
1100
14.0
1800
6.34
500
38.3
1200
12.4
1900
5.62
600
30.9
1300
11.0
2000
5.23
Minimum On Time Consideration
The operating duty cycle of a non-synchronous stepdown switching regulator in continuous-conduction
mode (CCM) is given by
D=
VO + VD
VIN + VD − VCESAT
where VIN is the input voltage, VCESAT is the switch saturation
voltage, and VD is voltage drop across the rectifying
diode.
In peak current-mode control, the PWM modulating
ramp is the sensed current ramp of the power switch.
This current ramp is absent unless the switch is turned
on. The intersection of this ramp with the output of the
voltage feedback error amplifier determines the switch
pulse width. The propagation delay time required to
immediately turn off the switch after it is turned on is the
minimum controllable switch on time (TON(MIN)).
Closed-loop measurement shows that the SC4525E
minimum on time is about 120ns at room temperature
(Figure 4) for 1A load current. If the required switch on
time is shorter than the minimum on time, the regulator
will either skip cycles or it will jitter.
To allow for transient headroom, the minimum operating
switch on time should be at least 20% to 30% higher than
the worst-case minimum on time.
10
SC4525E
Applications Information (Cont.)
inductor is given by
L1 =
( VO + VD ) x (1 − D)
35 % x IO x FSW
If the input voltage varies over a wide range, then choose
L1 based on the nominal input voltage. Always verify
converter operation at the input voltage extremes.
The peak current limit of SC4525E power transistor is at
least 3.9A. The maximum deliverable load current for the
SC4525E is 3.9A minus one half of the inductor ripple
current.
Input Decoupling Capacitor
The input capacitor should be chosen to handle the RMS
ripple current of a buck converter. This value is given by
Figure 4 — Variation of Minimum On Time
with Ambient Temperature
Minimum Off Time Limitation
The PWM latch in Figure 2 is reset every cycle by the
clock. The clock also turns off the power transistor to
refresh the bootstrap capacitor. This minimum off time
limits the attainable duty cycle of the regulator at a given
switching frequency. The measured minimum off time is
138ns typically. If the required duty cycle is higher than
the attainable maximum, then the output voltage will not
be able to reach its set value in continuous-conduction
mode.
Inductor Selection
The inductor ripple current for a non-synchronous stepdown converter in continuous-conduction mode is
DIL =
( VO + VD ) x (1 − D)
FSW x L1
where FSW is the switching frequency and L1 is the
inductance.
An inductor ripple current between 20% to 50% of the
maximum load current, IO, gives a good compromise
among efficiency, cost and size. Re-arranging the previous
equation and assuming 35% inductor ripple current, the
IRMS_ CIN = IO x
D x (1 − D)
The input capacitance must also be high enough to keep
input ripple voltage within specification. This is important
in reducing the conductive EMI from the regulator. The
input capacitance can be estimated from
CIN >
IO
4 x DVIN x FSW
where DVIN is the allowable input ripple voltage.
Multi-layer ceramic capacitors, which have very low ESR
(a few mW) and can easily handle high RMS ripple current,
are the ideal choice for input filtering. A single 4.7µF
X5R ceramic capacitor is adequate for 500kHz or higher
switching frequency applications, and 10µF is adequate
for 200kHz to 500kHz switching frequency. For high
voltage applications, a small ceramic (1µF or 2.2µF) can be
placed in parallel with a low ESR electrolytic capacitor to
satisfy both the ESR and bulk capacitance requirements.
Output Capacitor
The output ripple voltage DVO of a buck converter can be
expressed as
11
SC4525E
Applications Information (Cont.)



where CO is the output capacitance.
Since the inductor ripple current DIL increases as D
decreases (see first inductor selection capacitor equation),
the output ripple voltage is therefore the highest when
VIN is at its maximum.
A 22µF to 47µF X5R ceramic capacitor is found adequate
for output filtering in most applications. Ripple current in
the output capacitor is not a concern because the inductor
current of a buck converter directly feeds CO, resulting in
very low capacitor ripple current. Avoid using Z5U and
Y5V ceramic capacitors for output filtering because these
types of capacitors have high temperature and high voltage
coefficients.
Freewheeling Diode
Use of Schottky barrier diodes as freewheeling rectifiers
reduces diode reverse recovery input current spikes,
easing high-side current sensing in the SC4525E. These
diodes should have an average forward current rating
at least 3A and a reverse blocking voltage of at least a
few volts higher than the input voltage. For switching
regulators operating at low duty cycles (i.e. low output
voltage to input voltage conversion ratios), it is beneficial
to use freewheeling diodes with somewhat higher
average current ratings (thus lower forward voltages). This
is because the diode conduction interval is much longer
than that of the transistor. Converter efficiency will be
improved if the voltage drop across the diode is lower.
The 20BQ030 (International Rectifier), B320A, B330A
(Diodes Inc.), SS33 (Vishay), CMSH3-20MA and CMSH340MA (Central-Semi.) are all suitable.
The freewheeling diode should be placed close to the SW
pin of the SC4525E on the PCB to minimize ringing due to
trace inductance.
Bootstrapping the Power Transistor
To maximize efficiency, the turn-on voltage across the
internal power NPN transistors should be minimized. If
these transistors are to be driven into saturation, then
their bases will have to be driven from a power supply
higher in voltage than VIN. The required driver supply voltage (at least 2.3V higher than the SW voltage) is generated with a bootstrap circuit (the diode D1 and the capacitor C1 in Figure 6). The bootstrapped output (the common
node between D1 and C1) is connected to the BST pin of
the SC4525E.
The minimum BST to SW voltage required to fully saturate the power transistor is shown in Figure 5. The minimum required VC1 increases as temperature decreases.
The bootstrap circuit reaches equilibrium when the base
charge drawn from C1 during transistor on time is equal to
the charge replenished during the off interval.
Minimum Bootstrap Voltage
vs Temperature
2 .2
2 .1
Voltage (V)

1
DVO = DIL x  ESR +
8 x FSW x CO

2 .0
1 .9
1 .8
IS W = -3 .9 A
1 .7
1 .6
-5 0
-2 5
0
25
50
75
100
125
Temperature (oC)
Figure 5. Typical Minimum Bootstrap Voltage required
to Saturate the Transistor (ISW= -3.9A)
Figure 6 summarizes various ways of bootstrapping the
SC4525E. A fast switching PN diode (such as 1N4148 or
1N914) and a small (0.33μF – 0.47μF) ceramic capacitor
can be used for D1 and C1, respectively.
In Figure 6(a) the power switch is bootstrapped from the
output. This is the most efficient configuration and it also
results in the least voltage stress at the BST pin. The maximum BST pin voltage is about VIN + VOUT. The minimum
VOUT required for this bootstrap configuration is 2.5V. If the
output voltage is between 2.5V and 3V, then use a small
Schottky diode (such as BAt54) for D1 to maximize the
bootstrap voltage.
12
SC4525E
D1
D1
BST
V IN
BST
C1
VOUT
V IN
SC4525E
SC4525E
D2
GND
GND
D3
D3
D1
D1
+ VZ -
- VZ +
BST
BST
C1
VOUT
SW
IN
SC4525E
GND
V IN
SC4525E
D2
V S > V IN + 2 .5 V
D1
BST
C1
VOUT
SW
SC4525E
D2
GND
(e)
D2
GND
D1
IN
VOUT
(d)
BST
V IN
C1
SW
IN
(c)
V S > 2 .5 V
D2
(b)
(a)
V IN
VOUT
SW
IN
SW
IN
C1
V IN
VOUT
SW
IN
SC4525E
GND
D2
(f)
Figure 6(a)-(f). Methods of Bootstrapping the SC4525E
13
SC4525E
Applications Information (Cont.)
If VIN(MAX) + VOUT > 42V, then a Zener diode D3 can be used
in series with D1 to lower the BST voltage [Figure 6(c)]. The
following inequality gives a suitable range for the Zener
voltage VZ:
9287 ! 9= ! 9,10$; 9287 The SC4525E can also be bootstrapped from the input
[Figure 6(b)]. This configuration is not as efficient as Figure
6(a). However this may be the only option if the output
voltage is less than 2.5V and there is no other supply with
voltage higher than 2.5V. Voltage stress at the BST pin can
be somewhat higher than 2VIN. The BST pin voltage should
not exceed its absolute maximum rating of 42V.
loaded or VIN needs to be increased. Using larger soft-start
capacitor CSS will also help the bootstrap circuit to run because there will be current in the inductor over a longer
period of time. Figures 7(a) and 7(b) show the minimum
input voltage required to start bootstrap and to run before dropping out as a function of the load current. The
minimum start-up VIN decreases with higher dVIN/dt or
larger soft-start capacitor CSS. The lines labeled “dropout”
in these graphs show that once started, the bootstrap circuit is able to sustain itself down to zero load.
To reduce BST voltage stress when stepping down from
high VIN (>20V) to low VOUT (<2.5V), a Zener diode can be
added in series with D1. This is shown in Figure 6(d). The
Zener voltage can be selected as follows:
9,10,1 ! 9= ! 9,10$; Figures 6(e) and (f ) show how to bootstrap the SC4525E
from a second independent power supply VS.
The minimum bootstrap capacitance C1 can be estimated
as:
,
˜'
& ! 2870$; ˜ I ˜ 96 (a)
where VS is the voltage applied to the anode of D1.
The inductor current charges the bootstrap capacitor
when it pulls the SW node low during the switch off time.
If D1 is connected to the converter input, then C1 will be
charged as soon as VIN is applied.
If the bootstrap diode is tied to the converter output
[Figures 6(a) and 6(c)], then C1 can only be charged from
the regulator output through the inductor. Before the
converter starts, there is no output voltage or inductor
current. Hence it is necessary for the regulator to deliver some inductor current to the output before C1 can be
charged. If VIN is not much higher than the programmed
VOUT and it ramps up very slowly, then the inductor current will not be high enough for the bootstrap circuit to
run, especially at light loads. In order to have some inductor current to charge C1, the converter output needs to be
(b)
Figure 7. The Minimum Input Voltage to Start and
to Run Before Dropout. The Regulator is
Bootstrapped from its Output [Figure 6(a)].
D1 is 1N4148. (a) VOUT = 5V (b) VOUT = 3.3V
14
SC4525E
Applications Information (Cont.)
Minimum Soft-start Capacitance Css
To ensure normal operation, the minimum soft-start
capacitance CSS can be calculated in terms of the output
capacitance CO and output load current IO according to
the following equations.
dVSS
I
= SS
dt
C SS
dV0 dV1 d
=
= [2(VSS − 1.2V )]
dt
dt
dt
Substituting the first equation into the second equation,
dV0 2I SS
=
dt
C SS
where VSS is the soft-start capacitor voltage and ISS is the
soft-start charging current. V1 is the voltage defined in
Figure 2.
Loop Compensation
The goal of compensation is to shape the frequency
response of the converter so as to achieve high DC
accuracy and fast transient response while maintaining
loop stability (see Figure 8).
The block diagram in Figure 8 shows the control loops of a
buck converter with the SC4525E. The inner loop (current
loop) consists of a current sensing resistor (Rs=3.53mW)
and a current amplifier (CA) with gain (GCA=18.5). The
outer loop (voltage loop) consists of an error amplifier
(EA), a PWM modulator, and a LC filter.
Since the current loop is internally closed, the remaining
task for the loop compensation is to design the voltage
compensator (C5, R7, and C8).
C O N T R O L L E R A N D S C H O T T K Y D IO D E
CA
To ensure successful startup, the total current drawn
from the output must be less than the maximum output
capability of the part,
V0
dV
+ C 0 × 0 ≤ 3.5A
R
dt
REF
Io
+
EA
-
FB
Rs
Vc
PW M
M O D U LA TO R
SW
V ram p
L1
Vo
COMP
Co
C5
Substituting the third equation of this section into the
previous equation,
R7
V0
C
+ 2I SS × 0 ≤ 3.5A
R
C SS
C8
R esr
R4
R6
Figure 8. Block diagram of control loops
Rearranging,
2I SS(MAX) × C 0
C SS ≥
V 
3.5A −  0 
R 
For a converter with switching frequency FSW, output
inductance L1, output capacitance CO and loading R, the
control (VC) to output (VO) transfer function in Figure 8 is
given by:
Therefore the minimum CSS depends on the output
capacitance and the load current. Larger CSS is necessary
when starting into a heavy load (small R).
Vo
G PWM (1 + s R ESR C O )
=
Vc (1 + s/ω p )(1 + s/ω n Q + s 2 /ω 2n )
This transfer function has a finite DC gain
If the regulator is to be started by turning on a bench
power supply then CSS will be best determined empirically
because the rise time of a power supply can range from
a few milliseconds to a few hundred milliseconds. With
the maximum load applied, the output voltage rise is
observed using a 22nF for CSS. Adjust CSS until a linear VOUT
ramp is achieved.
G PWM ≈
R
G CA × R S
It has an ESR zero FZ at
ωZ =
1
R ESR C O
15
SC4525E
Applications Information (Cont.)
It has a dominant low-frequency pole FP at
1
R CO
ωp ≈
and double poles at half the switching frequency.
Including the voltage divider (R4 and R6), the control to
feedback transfer function is found and plotted in Figure
9 as the converter gain.
Since the converter gain has only one dominant pole at
low frequency, a simple Type-2 compensation network
is sufficient for voltage loop compensation. As shown in
Figure 9, the voltage compensator has a low frequency
integrator pole, a zero at FZ1, and a high frequency pole
at FP1. The integrator is used to boost the gain at low
frequency. The zero is introduced to compensate the
excessive phase lag at the loop gain crossover due to the
integrator pole (-90deg) and the dominant pole (-90deg).
The high frequency pole nulls the ESR zero and attenuates
high frequency noise.
GAIN (dB)
30
Fz1
Fp1
Fp
CO
NV
-30
ER
TE
Fc
RG
LO
CO
MP
OP
G
C5 =
1
2 π FZ1 R 7
C8 =
1
2 π FP1 R 7
where gm=0.3mA/V is the EA gain of the SC4525E.
EN
SA
TO
RG
Choose a loop gain crossover frequency of 80kHz, and
place voltage compensator zero and pole at FZ1=16kHz
(20% of FC), and FP1=600kHz. From the equation in step
(2), the required compensator gain at FC is
AIN
AIN
AC
AIN
Fz
-60
1K
AC
10 20
R7 =
gm
Example: Determine the voltage compensator for an
800kHz, 12V to 3.3V/3A converter with 47uF ceramic
output capacitor.
60
0
10% and 20% of the switching frequency. At FC, find the
required compensator gain, AC. In typical applications with
ceramic output capacitors, the ESR zero is neglected and
the required compensator gain at FC can be estimated by
(3) Place the compensator zero, FZ1, between 10% and
20% of the crossover frequency, FC.
(4) Use the compensator pole, FP1, to cancel the ESR zero, FZ.
(5) Then, the parameters of the compensation network
can be calculated by
Fsw/2
20 log
1
18.5 3. 53 10
1
3
3
2 80 10 47 10
6
1.0
3.3
14.1 dB
Then the compensator parameters are
14.1
10K
100K
FREQUENCY (Hz)
1M
10M
Figure 9 — Bode plots for voltage loop design
Therefore, the procedure of the voltage loop design for
the SC4525E can be summarized as:
(1) Plot the converter gain, i.e. control to feedback transfer
function.
(2) Select the open loop crossover frequency, FC, between
10 20
R7 =
= 16.9k
0.3 × 10− 3
1
C5 =
= 0.589nF
2π × 16 × 103 × 16.9 × 103
1
C8 =
= 15.7pF
2 π× 600 ×10 3 ×16.9 ×10 3
Select R7=16.9k, C5=0.68nF, and C8=22pF for the design.
Compensator parameters for various typical applications
are listed in Table 5.
16
SC4525E
Applications Information (Cont.)
Thermal Considerations
For the power transistor inside the SC4525E, the
conduction loss PC, the switching loss PSW, and bootstrap
circuit loss PBST, can be estimated as follows:
PC = D × VCESAT × IO
1
× t S × VIN × IO × FSW
2
I
= D × VBST × O
40
PSW =
PBST
where VBST is the BST supply voltage and tS is the equivalent
switching time of the NPN transistor (see Table 4).
Table 4. Typical switching time
Input Voltage
12V
24V
28V
1A
12.5ns
22ns
25.3ns
Load Current
2A
3A
15.3ns
18ns
25ns
28ns
28ns
31ns
PCB Layout Considerations
In a step-down switching regulator, the input bypass
capacitor, the main power switch and the freewheeling
diode carry pulse currents (Figure 10). For jitter-free
operation, the size of the loop formed by these components
should be minimized. Since the power switch is already
integrated within the SC4525E, connecting the anode of
the freewheeling diode close to the negative terminal of
the input bypass capacitor minimizes size of the switched
current loop. The input bypass capacitor should be placed
close to the IN pin. Shortening the traces of the SW and
BST nodes reduces the parasitic trace inductance at these
nodes. This not only reduces EMI but also decreases
switching voltage spikes at these nodes.
The exposed pad should be soldered to a large ground
plane as the ground copper acts as a heat sink for the
device. To ensure proper adhesion to the ground plane,
avoid using large vias directly under the device.
V IN
In addition, the quiescent current loss is
PQ = VIN × 2mA
VO U T
The total power loss of the SC4525E is therefore
Z L
PTOTAL = PC + PSW + PBST = PQ
The temperature rise of the SC4525E is the product of the
total power dissipation (see previous equation) and qJA
(36oC/W), which is the thermal impedance from junction
to ambient for the SOIC-8 EDP package.
It is not recommended to operate the SC4525E above
125oC junction temperature.
Figure 10 — Pulse Current Loop
NOTE: Heavy lines indicate the critical pulse current loop. The stray
inductance of this loop should be minimized.
17
SC4525E
Recommended Component Parameters in Typical Applications
Table 5 lists the recommended inductance (L1) and compensation network (R7, C5, C8) for common input and output
voltages. The inductance is determined by assuming that the ripple current is 35% of load current IO. The compensator
parameters are calculated by assuming a 47mF low ESR ceramic output capacitor and a loop gain crossover frequency
of FSW/10.
Table 5. Recommended inductance (L1) and compensator (R7, C5, C8)
Vin(V)
Typical Applications
Vo(V)
Io(A)
Fsw(kHz)
1.5
2.5
12
3.3
5
3
7.5
10
1.5
2.5
3.3
24
5
7.5
10
3
500
500
1000
500
1000
500
1000
500
1000
500
300
500
500
1000
500
1000
500
1000
500
C2(uF)
47
47
L1(uH)
3.3
4.7
2.2
6.8
3.3
6.8
3.3
6.8
3.3
3.3
6.8
6.8
6.8
3.3
8.2
4.7
10
4.7
15
Recommended Parameters
R7(k)
C5(nF)
C8(pF)
5.23
8.45
15.4
12.1
20.5
15.4
36.5
22.6
47.5
36.5
3.57
6.49
12.1
22.6
15.4
30.9
26.1
52.3
30.9
3.9
3.9
0.82
3.9
0.82
3.9
0.82
3.9
0.82
3.9
3.9
3.9
3.9
0.82
3.9
0.82
3.9
0.82
3.9
Snubber
no
22
1ȍ+220pF
no
18
SC4525E
Typical Application Schematics
V IN
D1
D3
24 V
18 V Z ener 1 N 4148
C4
4 .7mF
C1
0.33mF
L1
BST
IN
SW
6 .8mH
S C 4 5 2 5E
S S /E N
OUT
R4
33 .2 k
1.5V /3A
FB
COMP
C7
22 nF
ROSC
D2
B 330 A
R5
69 .8k
R7
3 .57 k
C8
22 pF
GND
R6
66.5k
C2
47mF
C5
3 .9 nF
L1 : C oiltronics D R 74
- 6R8
C 2: M urata G R M 31 C R 60J476 M
C 4 : M urata G R M 32 E R 71 H 475 K
Figure 11. 300kHz 24V to 1.5V/3A Step-down Converter
V
IN
D1
10 V – 26 V
C4
4 .7mF
1N 4148
C1
0.33mF
L1
BST
IN
SW
R0
1
S C 4 5 2 5E
S S /E N
3 .3mH
OUT
R4
33 .2 k
3.3V /3A
FB
COMP
C7
22 nF
C8
22 pF
ROSC
R7
22 .6k
GND
R5
15 .8k
C5
0.82 nF
L1 : C oiltronics D R 74-3R 3
C0
220pF
D2
B 330 A
R6
14.3k
C2
47mF
C 2 : M urata G R M 31 C R 60 J 476 M
C 4: M urata G R M 32 E R 71H 475 K
Figure 12. 1MHz 10V-26V to 3.3V/3A Step-down Converter
19
SC4525E
SS
Typical Performance Characteristics
(For A 12V to 5V/3A Step-down Converter with 1MHz Switching Frequency)
SS 2 7 0 R E V 6 -7
Load Characteristic
6
Output Voltage (V)
5
12V Input (5V/DIV)
4
3
5V Output (2V/DIV)
2
1
SS Voltage (1V/DIV)
0
0
0 .5
1
1 .5
2
2 .5
3
3 .5
4
4 .5
Load Current (A)
Load Characteristic
OCP
10ms/DIV
VIN Start up Transient (IO=3A)
5V Output Short (5V/DIV)
5V Output Response (500mV/DIV, AC Coupling)
Inductor Current (1A/DIV)
Retry Inductor Current (2A/DIV)
SS Voltage (2V/DIV)
40us/DIV
Load Transient Response (IO= 0.3A to 3A)
20ms/DIV
Output Short Circuit (Hiccup)
20
SC4525E
Outline Drawing - SOIC-8 EDP
A
D
e
N
2X E /2
E1
1
E
2
ccc C
2 X N /2 T IP S
e /2
B
D
aaa C
S E A T IN G
PLANE
A2 A
C
b xN
bbb
A1
D IM E N S IO N S
IN C H E S
M ILLIM E T E R S
D IM
M IN N O M M A X M IN N O M M A X
A
A1
A2
b
c
D
E1
E
e
F
H
h
L
L1
N
01
aaa
bbb
ccc
.0 6 9
.0 0 5
.0 6 5
.0 2 0
.0 1 0
.1 9 3 .1 9 7
.1 5 4 .1 5 7
.2 3 6 B S C
.0 5 0 B S C
.1 1 6 .1 2 0 .1 3 0
.0 8 5 .0 9 5 .0 9 9
.0 1 0
.0 2 0
.0 1 6 .0 2 8 .0 4 1
(.0 4 1 )
8
0°
8°
.0 0 4
.0 1 0
.0 0 8
.0 5 3
.0 0 0
.0 4 9
.0 1 2
.0 0 7
.1 8 9
.1 5 0
C A -B D
1 .7 5
0 .1 3
1 .6 5
0 .5 1
0 .2 5
4 .9 0 5 .0 0
3 .9 0 4 .0 0
6 .0 0 B S C
1 .2 7 B S C
2 .9 5 3 .0 5 3 .3 0
2 .1 5 2 .4 1 2 .5 1
0 .2 5
0 .5 0
0 .4 0 0 .7 2 1 .0 4
(1 .0 5 )
8
0°
8°
0 .1 0
0 .2 5
0 .2 0
1 .3 5
0 .0 0
1 .2 5
0 .3 1
0 .1 7
4 .8 0
3 .8 0
h
F
EXPOSED PAD
h
H
H
c
GAGE
PLANE
0 .2 5
L
(L1 )
S E E D E T A IL
S ID E V IE W
A
D E T A IL
01
A
NO TES:
1.
C O N T R O L L IN G D IM E N S IO N S A R E IN M IL L IM E T E R S (A N G L E S IN D E G R E E S ).
2.
D A T U M S -A - A N D
3.
D IM E N S IO N S "E 1 " A N D "D " D O N O T IN C L U D E M O L D F L A S H , P R O T R U S IO N S
O R G ATE BURRS .
R E F E R E N C E JE D E C S T D M S -0 1 2 , V A R IA T IO N B A .
4.
-B - T O B E D E T E R M IN E D A T D A T U M P L A N E
-H -
21
SC4525E
Land Pattern - SOIC-8 EDP
E
SOLDER M ASK
D
D IM E N S IO N S
D IM
(C )
F
G
Z
Y
T H E R M A L V IA
Ø 0 .3 6m m
P
X
C
D
E
F
G
P
X
Y
Z
IN C H E S
(.2 0 5)
.1 3 4
.2 0 1
.1 0 1
.1 1 8
.0 5 0
.0 2 4
.0 8 7
.2 9 1
M ILLIM E T E R S
(5 .2 0 )
3 .4 0
5 .1 0
2 .5 6
3 .0 0
1 .2 7
0 .6 0
2 .2 0
7 .4 0
NO TES:
1.
T H IS L A N D P A T T E R N IS F O R R E F E R E N C E P U R P O S E S O N L Y.
C O N S U L T Y O U R M A N U F A C T U R IN G G R O U P T O E N S U R E Y O U R
C O M P A N Y 'S M A N U F A C T U R IN G G U ID E L IN E S A R E M E T.
2.
R E F E R E N C E IP C -S M -7 8 2 A , R L P N O . 3 0 0 A .
3.
T H E R M A L V IA S IN T H E L A N D P A T T E R N O F T H E E X P O S E D P A D
S H A L L B E C O N N E C T E D T O A S Y S T E M G R O U N D P L A N E.
F A IL U R E T O D O S O M A Y C O M P R O M IS E T H E T H E R M A L A N D/O R
F U N C T IO N A L P E R F O R M A N C E O F T H E D E V IC E .
22
SC4525E
© Semtech 2013
All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property
rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from
misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but
not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range.
SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTEDTO BE SUITABLE FOR USE IN LIFE-SUPPORT
APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER’S OWN RISK. Should a customer purchase or use
Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise.
Contact Information
Semtech Corporation
Power Mangement Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111 Fax: (805) 498-3804
23