TSM1NB60 Taiwan Semiconductor N-Channel Power MOSFET 600V, 1A, 10Ω FEATURES KEY PERFORMANCE PARAMETERS ● Advanced planar process ● 100% avalanche tested ● Low RDS(ON) 8Ω (Typ.) ● Low gate charge typical @ 6.1 nC (Typ.) ● Low Crss typical @4.2pF (Typ.) PARAMETER VALUE UNIT VDS 600 V RDS(on) (max) 10 Ω Qg 6.1 nC APPLICATION ● Power Supply ● Lighting ● Charger SOT-223 TO-251 (IPAK) TO-252 (DPAK) Notes: Moisture sensitivity level: level 3. Per J-STD-020 ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) PARAMETER SYMBOL IPAK/DPAK SOT-223 UNIT Drain-Source Voltage VDS 600 V Gate-Source Voltage VGS ±30 V Continuous Drain Current Pulsed Drain Current TC = 25°C (Note 1) 1 ID TC = 100°C (Note 2) IDM Total Power Dissipation @ TC = 25°C PDTOT A 0.7 4 A 39 2.1 W Single Pulsed Avalanche Energy (Note 3) EAS 5 mJ Single Pulsed Avalanche Current (Note 3) IAS 1 A dv/dt 4.5 V/ns TJ, TSTG - 55 to +150 °C Peak Diode Recovery dv/dt (Note 4) Operating Junction and Storage Temperature Range THERMAL PERFORMANCE PARAMETER SYMBOL IPAK/DPAK SOT-223 UNIT Junction to Case Thermal Resistance RӨJC 2.87 -- °C/W Junction to Ambient Thermal Resistance RӨJA 110 60 °C/W Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined at the solder mounting surface of the drain pins. RӨJA is guaranteed by design while RӨCA is determined by the user’s board design. RӨJA shown below for single device operation on FR-4 PCB in still air. Document Number: DS_P0000038 1 Version: B15 TSM1NB60 Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted) PARAMETER Static CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 5) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA BVDSS 600 -- -- V Drain-Source On-State Resistance VGS = 10V, ID = 0.5A RDS(ON) -- 8 10 Ω Gate Threshold Voltage VDS = VGS, ID = 250µA VGS(TH) 2.5 3.5 4.5 V Zero Gate Voltage Drain Current VDS = 600V, VGS = 0V IDSS -- -- 10 µA Gate Body Leakage VGS = ±30V, VDS = 0V IGSS -- -- ±100 nA Forward Transfer Conductance VDS = 10V, ID = 0.5A gfs -- 0.8 -- S Qg -- 6.1 -- Qgs -- 1.4 -- Qgd -- 3.3 -- Ciss -- 138 -- Coss -- 17.1 -- Crss -- 4.2 -- Rg -- 12.5 -- td(on) -- 7.7 -- tr -- 6.8 -- td(off) -- 15.3 -- tf -- 14.9 -- VSD -- 0.9 1.4 Dynamic (Note 6) Total Gate Charge VDS = 480V, ID = 1A, Gate-Source Charge VGS = 10V Gate-Drain Charge Input Capacitance VDS = 25V, VGS = 0V, Output Capacitance Reverse Transfer Capacitance Gate Resistance Switching f = 1.0MHz F = 1MHz, open drain nC pF Ω (Note 7) Turn-On Delay Time Turn-On Rise Time VDD = 300V, RG =25Ω Turn-Off Delay Time ID = 1A, VGS = 10V Turn-Off Fall Time Source-Drain Diode ns (Note 5) Diode Forward Voltage IS = 1A, VGS = 0V Source Current Integral reverse diode IS -- -- 1 Source Current (Pulse) In the MOSFET ISM -- -- 4 V A Notes: 1. Current limited by package. 2. Pulse width limited by the maximum junction temperature. 3. L = 10mH, IAS = 1A, VDD = 50V, RG = 25Ω, Starting TJ = 25 C. o o 4. ISD≤1A , VDD≤BVDSS , di/dt≤200A/us , Starting TJ = 25 C. 5. Pulse test: PW ≤ 300µs, duty cycle ≤ 2%. 6. For DESIGN AID ONLY, not subject to production testing. 7. Switching time is essentially independent of operating temperature. Document Number: DS_P0000038 2 Version: B15 TSM1NB60 Taiwan Semiconductor ORDERING INFORMATION PART NO. PACKAGE PACKING TSM1NB60CH C5G TO-251 75 pcs / Tube TSM1NB60CP ROG TO-252 2,500 pcs / 13” Reel TSM1NB60CW RPG SOT-223 2,500 pcs / 13” Reel Note: 1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC 2. Halogen-free according to IEC 61249-2-21 definition Document Number: DS_P0000038 3 Version: B15 TSM1NB60 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-251 MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug Y =Nov Z =Dec W =Sep X =Oct L = Lot Code (1~9, A~Z) Document Number: DS_P0000038 4 Version: B15 TSM1NB60 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-252 SUGGESTED PAD LAYOUT MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000038 5 Version: B15 TSM1NB60 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) SOT-223 SUGGESTED PAD LAYOUT MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000038 6 Version: B15 TSM1NB60 Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. Document Number: DS_P0000038 7 Version: B15