UNISONIC TECHNOLOGIES CO., LTD PA4894

UNISONIC TECHNOLOGIES CO., LTD
PA4894
CMOS IC
1.8 WATT DIFFERENTIAL
AUDIO POWER AMPLIFIER
WITH SELECTABLE
SHUTDOWN
„
DESCRIPTION
The UTC PA4894 is a differential audio power amplifier,
characterized by its selectable shutdown mode for flexible operation.
Shutdown may be enabled by either logic high or low depending on
the voltage applied on the SD MODE pin and the shutdown mode
features low power consumption.
This device provides customers perfect sound performance by
its high quality audio, moreover, less external components and lower
power dissipation are required.
Operating with a 5.5V power supply, the UTC PA4894 is
capable of driving an 8.0Ω load at a continuous average output of
1.8W under a 10% THD+N. If it works with a 5.0V voltage under the
same load conditions, 1.0W power will be delivered and the
distortion will be less than 0.01%.
The UTC PA4894 incorporates protection circuit to avoid the
click and pop noise, which may occur during the transition state
between turn-on and turn-off.
The UTC PA4894 can be directly connected to a battery without
an LDO since it has perfect PSRR. The UTC PA4894 can be
configured externally with resistors to provide a controlled gain and
with bypass capacitor to provide a controlled turn-on time for more
flexibility.
The UTC PA4894 is suitable for applications, such as portable
electronic devices, PDAs and mobile phones.
„
MSOP-10
„
FEATURES
* Differential amplification
* Selectable and low current shutdown
mode
* 1.0W/Ch(typ.)into a 8Ω load @5.0V
* Directly connected to the battery due to
excellent PSRR
* Operation supply: 2.2 V-5.5 V
* External controlled gain and turn-on
time configuration
* Circuits for protection
* Thermal overload protection circuit
* “Click and pop” noise protection circuit
* Halogen Free
ORDERING INFORMATION
Ordering Number
PA4894G-SM2-R
Package
MSOP-10
www.unisonic.com.tw
Copyright © 2009 Unisonic Technologies Co., Ltd
Packing
Tape Reel
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PA4894
„
PIN CONFIGURATION
„
PIN DESCRIPTION
CMOS IC
PIN NO.
PIN NAME
TYPE
DESCRIPTION
1
SD SELECT
O
(Note)
2
INM
I
Negative differential input
3
SD MODE
I
Shutdown high or low selectivity (Note)
4
INP
I
Positive differential input
5
BYPASS
O
Bypass capacitor pin which provides the common mode voltage
6
OUTB
I
Negative BTL output
7
VM
I
Ground
8
NC
No connection
9
VP
I
Positive analog supply of the cell
10
OUTA
I
Positive BTL output
Note: The SD SELECT pin must be toggled to the same state as the SD MODE pin to force the device in shutdown
mode.
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PA4894
„
CMOS IC
BLOCK DIAGRAM
VP
9
INM
2
BYPASS
5
SD SELECT
1
10
OUTA
6
OUTB
SHUTDOWN
CONTROL
SD MODE
INP
3
4
7
VM
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PA4894
„
CMOS IC
ABSOLUTE MAXIMUM RATING (Ta=25°C, unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VP
6.0
V
Operating Supply Voltage
VOPR
2.2 ~ 5.5
V
Input Voltage
VIN
-0.3 ~ VCC +0.3
V
Max Output Current
IOUT
500
mA
Power Dissipation (Note 2)
PD
Internally Limited
Junction Temperature
TJ
150
°C
Operating Temperature (TA)
TOPR
-40 ~+85
°C
Storage Temperature Range
TSTG
−65 ~ +150
°C
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. The thermal shutdown set to 160°C (typical) avoids irreversible damage on the device due to power
dissipation.
„
THERMAL DATA
PARAMETER
Junction to Ambient
„
SYMBOL
θJA
RATINGS
200
UNIT
°C/W
ELECTRICAL CHARACTERISTICS (Ta= −40°C~ +85°C, unless otherwise specified).
PARAMETER
Common Mode Voltage
High
SD Select Threshold
Low
SYMBOL
VCM
VTHD(H)
VTHD(L)
TEST CONDITIONS
MIN
1.4
VP = 3.0V, RL= 8.0Ω
Output Swing
VO(SW)
Output Offset Voltage
VO(OFF)
Supply Quiescent Current
IQ
Shutdown Current
ISHDN
Turning On Time
Turning Off Time
TWU
TSD
RMS Output Power
Power Supply Ratio
Over Temperature Shutdown
VP = 5.0V, RL= 8.0Ω
2.2V≤VP≤5.5V
VP = 3.0 V, No Load
VP = 5.0 V, No Load
VP = 3.0 V, 8.0Ω
VP = 5.0 V, 8.0 Ω
2.2V≤VP≤5.5V
SDM=SDS=GND
CBYP = 1.0μF
Ta= 25°C
4.0
Ta= -40°C ~ +85°C 3.85
-30
Ta= 25°C
Ta= -40°C ~ +85°C
VP = 3.0 V
PO(RMS) RL= 8.0Ω, THD+N<0.1% VP = 3.3 V
VP = 5.0 V
G=2.0, RL=8.0Ω
F=217 Hz
CBYP= 1.0μF
PSRR
VP(RIPP_PP)= 200mV
F=1.0 kHz
Input Terminated with 10Ω
VP=5.0V
VP=3.0V
VP=5.0V
VP=3.0V
OTS
VP = 3.0 V, PO(RMS)= 380mW
VP = 5.0 V, PO(RMS)= 1.0W
VP = 3.0V, F = 1.0 kHz
RL= 8.0Ω, AV= 2.0, PO= 0.32 W
Total Harmonic Distortion
THD
VP = 5.0V, F = 1.0 kHz
RL= 8.0Ω, AV= 2.0, PO= 1.0 W
Notes: 1. Min and Max limits are guaranteed by design, test or statistical analysis.
2. See page 8 for a theoretical approach of these parameters.
Efficiency
η
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
TYP MAX UNIT
VP/2
V
V
0.4
V
2.5
V
4.3
V
V
1.0
30
mV
1.9
mA
2.1
mA
2.0
mA
2.2
4.0
mA
20
600
nA
2.0
μA
140
ms
20
ms
0.39
W
0.48
W
1.08
W
-80
dB
-80
dB
-85
dB
-85
dB
160
°C
64
%
63
%
0.007
%
0.006
%
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PA4894
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CMOS IC
TYPICAL APPLICATION CIRCUIT
Differential Input
RF 1
20kΩ
VP
CS
1µF
Negative Diff
Input from DAC
CI 1
RIN1
VP
INM
OUTA
390nF 20kΩ
BYPASS
Cb
1µF
SHUTDOWN CONTROL
SD MODE
0
0
1
1
SD SELECT
0
1
0
1
Positive Diff
Input from DAC
STATUS
SHUTDOWN
ON
ON
SHUTDOWN
CI 2
RIN2
RL
8Ω
SD SELECT
SHUTDOWN
CONTROL
SD MODE
OUTB
INP
390nF 20kΩ
VM
20kΩ
RF 2
Driving Headphone
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PA4894
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CMOS IC
APPLICATION INFORMATION
Detailed Description
The UTC PA4894 includes two power amplifiers internally. Two of them provide a controlled gain with external
components RIN and RF; the gain is calculated by the ratios of the resistors. The load is driven differentially through
OUTA and OUTB outputs. This configuration is saving the use of an output coupling capacitor.
The UTC PA4894 is operating on a 2.6V to 5.5V power supply, when VP is 2.6V it delivers 320mW rms output
power to 4.0Ω load, and when VP is 5.0V, it delivered 1.0W rms output power to 8.0Ω load.
Internal Power Amplifier
The internal power amplifier contains output PMOS and NMOS transistors, which is used to deliver the output
power of the specifications without clipping. The channel resistance (RON) of the NMOS and PMOS transistors does
not exceed 0.6Ω when they drive current.
The structure of the internal power amplifier is composed of three symmetrical gain stages, first and medium
gain stages are transconductance gain stages to obtain maximum bandwidth and DC gain.
Turn-On and Turn-Off Transitions
Output power in the load established must be slowly or cut for minimize the click and pop noise during the
transitions between turn-on and turn-off conditions. When shutdown mode is over，, the bypass voltage begins to rise
exponentially and once the output DC level is around the common mode voltage, the turn-on mode is over.
The turn−on time is determined by the following equation (at 25°C):
TON = 0.95×R×CBYP
(CBYP: bypass capacitor R: internal 150 k resistor with a 25% accuracy)
The turned off operation is as the same as the turn-on operation. Through applying a same logic state on the SD
SELECT and SD MODE pins, the system enters this mode. During the shutdown mode, amplifier outputs are
connected to the ground to discharge.
Shutdown Function
When SD SELECT and SD MODE pins are in the same logic state, the system enters shutdown mode. This
brings flexibility to the design, as the SD MODE pin must be permanently connected to VP or GND on the PCB. In
many applications, the output of a microcontroller or microprocessor is connected to the SD SELECT pin, so it is not
better to allow this pin float. During the shutdown state, the DC quiescent current has a typical value of 10nA.
Current Limit Circuit
The current limit circuit protects the device from damage from excessive current. The maximum output power of
the circuit (PO(RMS) =1.0W, VP = 5.0V, RL = 8.0Ω) requires a peak current in the load of 500mA. When short-circuit
occurs between both outputs, the current limit in the load is fixed to 800mA for limiting the excessive power
consumption.
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PA4894
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CMOS IC
APPLICATION INFORMATION(Cont.)
Thermal Overload Protection
When the temperature of the UTC PA4894 is higher than160°C for any reasons, the thermal overload protection
function turns the amplifiers off until the temperature drop below 140°C.
The UTC PA4894 is unity gain stable and requires no external components besides gain setting resistors, an
input coupling capacitor and a proper bypassing capacitor in the typical application. Both internal amplifiers are
externally configurable (RF and RIN) with gain configuration.
The differential ended amplifier has two main benefits compared to single-ended:
* The differential ended amplifier will yield 4 times larger the output power on the load at the same conditions
compared to a single ended amplifier.
* Output pins (OUTA and OUTB) are biased at the same potential VP/2, which is saving the use of an output
coupling capacitor that is required with a single ended amplifier configuration.
The differential closed loop gain of the amplifier is correlated as seen in the following ratio:
Avd =
RF
VO(RMS )
=
RIN VIN(RMS )
VO(RMS): the rms value of the voltage seen by the load
VIN(RMS):the rms value of the input differential signal)
Output power delivered to the load is defined as follows:
PO(RMS ) =
( VO(PEAK ) )2
2 × RL
VO(PEAK) is the peak differential output voltage
When choosing gain configuration to obtain the desired output power, check that the amplifier is not current
limited or clipped.
VO(PEAK )
The maximum current which can be delivered to the load is 500mA IO(PEAK ) =
RL
Gain−Setting Resistor Selection (RIN and RF)
The UTC PA4894 requires low gain configurations for a better performance. Since the RIN and RF determine the
closed−loop gain of both amplifiers, it is critical to choose both of them.
The low gain configuration minimizes THD + noise values and maximizes the signal to noise ratio, and the
amplifier can still be used without running into the bandwidth limitations.
A closed loop gain in the range from 2 ~ 5 is recommended to optimize overall system performance.
22 kΩ input resistor (RIN)is recommended.
Input Capacitor Selection (CIN)
The input coupling capacitor blocks the DC voltage at the amplifier input terminal. A high−pass filter is generated
by this capacitor and Rin, and the cut−off frequency is defined by the following fomula:
fC =
1
2 × π × RIN × CIN
The size of the capacitor must be large enough to couple in low frequencies without severe attenuation.
However a large input coupling capacitor requires more time to reach its quiescent DC voltage (VP/2) and can
increase the turn−on pops.
An input capacitor value between 0.1μ and 0.39μF is sugguested in most applications.
Bypass Capacitor Selection (CBYP)
To avoid the pop noise, the bapass capacitor should be chosen prompty. The bypass capacitor determines the
rate at which this device starts and it provides half−supply filtering.
A 1.0μF bypass capacitor value (CIN≤ 0.39μF) should produce clickless and popless shutdown transitions. So a
1.0μF bypassing capacitor is recommended to be used.
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CMOS IC
APPLICATION INFORMATION(Cont.)
„
Demo Board Schematic
R4
VP
J2
20kΩ
VP
C4
1µF
GND
C2
R2
1µF
20kΩ
VP
INM
OUTA
BYPASS
VP
J1
C3
1µF
J3
RL
8Ω
J4
100kΩ
SD SELECT
R3
SHUTDOWN
CONTROL
J5
SD MODE
C1
R1
1µF
20kΩ
OUTB
INP
VM
J7
20kΩ
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CMOS IC
TYPICAL CHARACTERISTICS
„
THD+N vs. Output Power
10
VP=5V
RL=8Ω
F=1kHz
VP=3V
RL=8Ω
F=1kHz
1
THD+N (%)
1
THD+N (%)
THD+N vs. Output Power
10
0.1
0.1
0.01
0.01
0.001
0.001
0
200
400 600
800 1000 1200
0
Output Power (mW)
100
200
300
400
500
THD+N (%)
THD+N (%)
Output Power (mW)
THD+N vs. Output Power
2000
1800
RL=8Ω
F=1kHz
1600
1400
THD+N =10%
1200
1000
800
600
THD+N =1%
400
200
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Output Power (mW)
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PA4894
Power Dissipation, PD (W)
TYPICAL CHARACTERISTICS(Cont.)
Power Dissipation, PD (W)
„
CMOS IC
Power DissipationOutput Power
Power DissipationOutput Power
0.4
0.25
0.35
0.2
RL=4Ω
0.3
0.25
0.15
0.2
0.1
RL=8Ω
0.15
VP=3V
RL=8Ω
F=1KHz
THD+N<0.1%
0.05
0
0
0.1
0.2
0.3
0.4
Output Power, POUT (W)
Turning-on Sequence
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0.1
0.05
0
VP=2.6V
F=1KHz
THD+N<0.1%
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
Output Power, POUT (W)
Turning-on Sequence Zoom
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CMOS IC
TYPICAL CHARACTERISTICS(Cont.)
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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