Silicon N-Channel MOSFET

W40N25W
WF
WFW
Silicon N-Channel MOSFET
Features
D
�
40A,250V,R DS(on) (Max0.068Ω)@VGS =10V
�
Ultra-low Gate charge(Typical 87nC)
�
Fast Switching Capability
�
100%Avalanche Tested
�
Maximum Junction Temperature Range(150℃)
G
S
General Description
This N-Channel enhancement mode power field effect transistors
are produced using Winsemi's proprietary, planar s tripe ,DMO S
technology. This advanced technology has been especially tailored
to minimize on-state resistance
, provide superior switching
performance, and w ithstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high efficiency
switch mode power supplies .
Absolute Maximum Ratings
Symbol
VDSS
ID
Parameter
Value
Units
Drain Source Voltage
250
V
Continuous Drain Current(@Tc=25℃)
40
A
Continuous Drain Current(@Tc=100℃)
25
A
160
A
±30
V
I DM
Drain Current Pulsed
(Note1)
VGS
Gate to Source Voltage
EAS
Single Pulsed Avalanche Energy
(Note2)
900
mJ
I AR
Avalanche Current
(Note1)
40
A
EAR
Repetitive Avalanche Energy
(Note1)
26
mJ
dv/dt
Peak Diode Recovery dv /dt
(Note3)
5.4
V/ ns
Total Power Dissipation(@Tc=25℃)
260
W
Derating Factor above 25℃
2.08
W/℃
TJ
Junction Temperature
150
℃
Tstg
Storage Temperature
-55~150
℃
TL
Channel Temperature
300
℃
PD
Thermal Characteristics
Symbol
Parameter
Value
Min
Typ
Max
Units
RQJC
Thermal Resistance , Junction -to -Case
-
-
0.48
℃/W
R QJA
Thermal Resistance,Junction to Ambient
-
-
62.5
℃/W
Rev.B Dec.2013
Copyr ight@Winsemi Microelectronics Co., Ltd., All right reserved.
0512
W40N25W
WF
WFW
Electrical Characteristics(Tc=25℃)
Characteristics
Symbol
Gate leakage current
Gate-source breakdown voltage
Test Condition
Min
Type
Max
Unit
I GSS
VGS =±30V,VDS =0V
-
-
±100
nA
V(BR)GSS
I G=±10 µA,VDS=0V
±30
-
-
V
-
-
1
µA
-
-
10
µA
250
-
-
V
-
0.26
-
V/℃
VDS =250V,V GS =0V,
Drain cut -off current
I DSS
T C=25℃
VDS =200V,T C=125℃
Drain -source breakdownvoltage
V(BR)DSS
Breakdownvoltage Temperature
△BVDSS/
I D=250µA,VGS =0V
I D=250µA,Referenced
coefficient
△TJ
to 25℃
Gate threshold voltage
VGS(th)
VDS =VGS,I D=250µA
2
-
4
V
Drain -source ON resistance
R DS(ON)
VGS =10V,ID=20A
-
0.047
0.068
Ω
Forward Transconductance
gfs
VDS =40V ,I D=20A
-
27
-
S
Input capacitance
C iss
VDS =25V,
-
3350
4210
Reverse transfer capacitance
C rss
VGS =0V,
-
82
105
Output capacitance
C oss
f=1MHz
-
685
867
VDD=125V
-
620
950
I D=40A
-
81
112
-
183
235
-
142
189
-
87
113
-
25
-
-
44
-
Min
Type
Max
Unit
-
-
40
A
1.5
V
Turn-on Rise time
Turn-on delay time
tr
Td(on)
Switching time
Turn-off Fall time
tf
R G=25Ω
pF
ns
(Note4,5)
Turn-off delay time
Td(off)
Total gate charge(gate-source
Qg
plus gate-drain)
VDS =200V,
VGS =10V,
Gate-source charge
Qgs
Gate-drain("miller") Charge
Qgd
nC
I D=40A
(Note4,5)
Source-Drain Ratings and Characteristics(Ta=25℃)
Characteristics
Symbol
Continuous drain reverse current
I DR
Test Condition
-
Forward voltage(diode)
VDSF
I DR=40A,VGS =0V
-
-
Reverse recovery time
trr
I DR=40A,VGS =0V,
-
234
Reverse recovery charge
Qrr
dIDR / dt =100 A / µs
-
2.15
ns
-
µC
Note 1.Repeativity rating :pulse width limited by junction temperature
2.L=0.9mH I AS=40A,VDD=50V,R G=25Ω,Starting T J=25℃
3.I SD≤40A,di/dt≤300A/us,VDD<BVDSS,STARTING TJ =25℃
4.Pulse Test:Pulse Width≤300us,Duty Cycle≤2%
5. Essentially independent of operating temperature.
This transistor is an electrostatic sensitive device
Please handle with caution
2/7
Steady, keep you advance
W40N25W
WF
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Fig.1 On-State characteristics
Fig.2 Transfer Current characteristics
Fig.3 On-Resistance Variation vs Drain
Fig.4 Body Diode Forward Voltage
Current and Gate Voltage
Variation with Source Current
and Temperature
Fig.5 Capacitance Characteristics
Fig.6 Gate Charge Characteristics
3/7
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W40N25W
WF
WFW
Fig.7 Breakdown Voltage Variation
Fig.8 On-Resistance Variation vs
vs.Temperature
Junction Temperature
Fig.9 Maximum Safe Operation Area
Fig.10 Maximum Drain Current vs
Case Temperature
Fig.11 Transient Thermal Response Curve
4/7
Steady, keep you advance
W40N25W
WF
WFW
12V
VG S
S ame type
as D U T
50K Ω
Qg
200nF
10V
300nF
VD S
VG S
Qg s
Qg d
DUT
3mA
C harge
Fig.12 Gate Test Circuit & Waveform
VD S
RG
RL
VD S
90%
VD D
VG S
VG S
DUT
10V
10%
td(on)
tr
td(off)
to n
tf
to ff
Fig.13 Resistive Switching Test Circuit & Waveform
L
1
EA S =
L IA S 2
2
VD S
B V DSS
IA S
ID
RG
VD D
DUT
10V
tp
B V DSS
B V D S S - VD D
ID( t)
VD S ( t)
VD D
tp
T im e
Fig.14 Unclamped Inductive Switching Test Circuit & Waveform
5/7
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W40N25W
WF
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DUT
VD S
IS D
L
Dr iver
RG
S am e Type
as DUT
VG S
VG S
(Driver)
VD D
dv/dt contr olled by R G
IS D conteolled by pulse period
D =
G ate Pulse W idth
Gate Pulse Per iod
10V
IF M ,Body Diode Forward Current
IS D
di/dt
(DUT )
IR M
Body Diode Reverse Current
VD S
(DUT )
Body Diode Recovery dv/dt
VS D
VD D
B o d y D io d e
For w ar d Voltage D r op
Fig.15 Peak Diode Recovery dv/dt Test Circuit & Waveform
6/7
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W40N25W
WF
WFW
247 Package Dimension
TOTO-2
U nit:m m
E
符 号
symbol
A
F
O
L2
D
P
L
Q1
B1
b
c
e
e
B
M IX
MAX
A
4 .9 0
5 .1 0
B
2 .9 5
3 .3 5
B1
1 .9 5
2 .3 5
b
1 .1 5
1 .3 5
c
0 .5 0
0 .7 0
D
2 0 .9
2 1 .1
E
1 5 .7
1 5 .9
e
5 .3 4
5 .5 4
F
1 .9 0
2 .1 0
L
1 9 .4
2 0 .4
L2
4 .0 3
4 .2 3
Q
6 .0 0
6 .4 0
Q1
2 .3 0
2 .5 0
P
3 .5 0
3 .7 0
7/7
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