APPLICATION NOTE AN199 Using the SL6609A Direct Conversion Pager Receiver AN199-2.0 July 1998 This application note outlines a basic circuit for the SL6609A Direct Conversion Pager Receiver for use in standard paging applications at 153MHz, 282MHz and 450MHz. Fig. 1 is a block diagram of the SL6609A, showing the pin allocation and the internal structure of the device. Table 1 gives detailed descriptions of these functions. REGCNT VREG 23 VR MIXB − LOX 22 5 + GYRI VBATT 4 20 VR BATTFL 11 − TPX TPLIMX VR 1 15 6 10 21 13 19 + GND 18,25 16 14 24 4f DETECTOR LIMITERS MIXERS MIXA BEC VCC1 VCC2 VBG 26 LIMITER 17 9 28 3 LOY 2 7 RFIADJ 12 27 IRFAMP TPY BRF2 DATAOP BRF1 TCADJ IAGCOUT 8 TPLIMY GTHADJ Fig. 1 SL6609A internal block diagram Pin Name Description 1 TPX Channel X test point. Channel X internal amplifier output/gyrator filter input. This pin is used to measure the receiver signal level during receiver set up. It may also be used in conjunction with pin 15 (TPLIMX) to measure the response of the gyrator filters. It can be used to add additional filtering in the channel in the form of an additional external capacitor. 2 RFIADJ Current source adjust. Pin 2 allows adjustment of the current source which is designed for use with the external RF amplifier. See CIRCUIT FACILITIES. 3 LOY Mixer LO input. The local oscillator signal is applied to pin 3 in phase quadrature to pin 5. For the phase quadrature circuit see RF Amplifier and Local Oscillator Network. The LO input of the mixers require a bias path to VCC1 (see R5 and R6 on the Applications Circuit, Fig. 2). 4 GYRI Gyrator filter adjust. The bandwidth of the on-chip gyrator filter can be adjusted using a resistor from pin 4 to GND. For values see Setup for Optimum Performance. 5 LOX Mixer LO input. See pin 3 6 VR Voltage reference, VR. 1V internal reference voltage. It may be used for the bias of external RF amplifier and LO Circuits. It is also a reference for pins 1,7,8 and 9. 7 TPY Channel Y. Channel Y internal amplifier output/gyrator filter input. This pin is used to measure the received signal level during receiver set up. It may also be used in conjunction with pin 12 (TPLIMY) to measure the response of the gyrator filters. It can be used to add additional filtering in the channel in the form of an additional external capacitor. Table 1 Pin descriptions Cont… AN199 Pin Name Description 8 GTHADJ Audio AGC level adjust. Level adjustment for the external AGC drive. See Fig. 5. The voltage at pin 8 is dictated by an external resistor (R16 in Applications Circuit) and an internal current source driven by the wanted audio (baseband) signal level. With no signal output to the receiver, the output of current source 1 tends to be zero and so the voltage at pin 8 is VR. This gives the result that the output of current source 2 (pin 28) tends to 0µA. (i.e. the AGC is disabled). With a signal incident on the receiver, current source 1 driving pin 8 is turned on and there is a voltage drop across the external resistor (R16). The value of R16 dictates the voltage drop and hence the sensitivity of the AGC circuit. For a value of R16, see Fig. 2. 9 TCADJ Audio AGC time constant. The attack (turn on) and decay (duration) times of the Audio AGC are set by an RC network connected to pin 9. See Fig. 2 for details. 10 BEC Battery economy. The battery economy facility allows the device to be powered down by pulling pin 10 to GND. If not required this should be connected to VCC2. 11 BATTFL Low battery flag output. The battery flag is the output of an on-chip comparator with VR as the reference voltage. When VBATT (pin 20) , VR, Battery Flag output is low. BATTFL is an open collector output. 12 TPLIMY Channel Y gyrator filter output. See pin 7. Pin 12 provides a monitor of the gyrator filter output of channel Y to enable the response of the filter to be accurately measured and adjusted using pin 4. For details refer to Setup for Optimum Performance. 13 VCC2 VCC2 supply. This pin requires adequate audio decoupling to GND. If a DC-DC converter is used to generate this voltage care must be taken to prevent power supply noise reducing the sensitivity of the device. 14 DATAOP Data output. Open collector data output. This requires a pull-up resistor to a suitable voltage reference e.g. VCC2. 15 TPLIMX Channel X gyrator filter output. See pin 1. Pin 15 provides a monitor of the gyrator filter output of channel X, to enable the response of the filter to be accurately measured and adjusted using Pin 4. For details refer to Setup for Optimum Performance. 16 BRF2 Data buffer input. Input to the data limiter. This pin is normally connected directly to Pin 17. 17 BRF1 Output of the phase detector. For optimum performance a Bit Rate filter can be applied to this pin. This is achieved by connecting a capacitor between Pin 17 and GND. The value of this capacitor is dependent on the data rate. For the value of this capacitor see Setup for Optimum Performance. 18 DIGGND 19 VBG Bandgap voltage reference (1·2V). This may be used to bias an external RF amplifier. See APPLICATION CIRCUIT REQUIREMENTS for details. 20 VBATT Battery flag input. Connect this pin to Pin 21 (VCC1) if a 1V threshold is required. Alternative thresholds may be determined using an external potential divider. See APPLICATION CIRCUIT REQUIREMENTS for details. 21 VCC1 VCC1 supply. This requires adequate audio and RF decoupling if optimum device sensitivity is to be achieved. 22 REGCNT Voltage regulator control output. 1V on-chip voltage regulator output, used to drive a suitable PNP transistor. See Setup for Optimum Performance. For stability purposes a capacitor should be applied between Pin 22 and Pin 23. The regulator is only specified for VCC1>1·1V. 23 VREG Voltage regulator sense. This should be connected to the load of the regulator. If the regulator is not required, and no active components are connected to Pin 22 and Pin 23, then Pin 23 should be connected to Vcc2. 24 MIXB Mixer RF input B. Input to the device from an external RF amplifier. The signal should be applied differentially between Pin 24 and Pin 26. The differential signal to the mixers may be DC coupled if no DC voltage is applied, otherwise AC coupling should be used. Digital ground. This is the ground for the digital circuits in the receiver. Table 1 Pin descriptions (continued) 2 Cont… AN199 Pin Name Description 25 GND Receiver ground. Ground for receiver RF circuits. 26 MIXA Mixer RF input A. Differential input from an external RF amplifier. See pin 24. 27 IRFAMP Current source output IRF. An on chip current source for use in RF amplifier designs. This allows the current in the RF amplifier to be independent of supply voltages. See APPLICATION CIRCUIT REQUIREMENTS for details. It is very important to use the current source with the RF amplifier. The current source incorporates an RF signal AGC. This ensures optimum operation of the device for high input signal levels. 28 IAGCOUT Audio AGC output current. See Fig. 5. A current source controlled by the Audio signal level and the AGC threshold adjust (pin 8). The current source is intended to sink current from an PIN diode on the RF input and hence reduce the RF signal incident on the RF amplifier input. Table 1 Pin descriptions (continued) APPLICATION CIRCUIT REQUIREMENTS The example application circuit is shown in Fig. 2. To achieve optimum performance of the device it is necessary to incorporate a low noise RF amplifier at the front end of the receiver. This is easily biased using the on-chip facilities provided. The receiver also requires a local oscillator input at the wanted channel frequency. RF Amplifier and Local Oscillator Network The design of the RF amplifier is simplified by the on-chip current source and the two voltage references VBG and VR. A suitable circuit is shown in Fig. 3. The current through the load and hence the gain of the amplifier is controlled by the onchip current source IRF. This ensures that the gain of the amplifier is independent of the supply voltage. Also, as VR and VBG are independent of supply voltage, it ensures that the bias points of the transistors are also stable and independent of supply voltage, with each transistor simply biased via a series resistor to the appropriate voltage reference. The RF amplifier current source (pin 27) may be adjusted with the use of an external resistor connected between pin 2 and a voltage reference or ground. For details see RF Current Source Adjustment. Also, the RF amplifier current source forms part of the RF AGC circuitry, reducing the RF amplifier current if excessive signal is incident on the mixer inputs. It is very important to use the current source in the design of the RF amplifier. This ensures that the SL6609A will operate with high level input signals. The differential input required by the mixers is applied from the RF amplifier via a suitable transformer (T1). This forms a tuned load with the variable capacitor (VC1). This load is tuned to the operating frequency of the device. The normal operating gain of the RF amplifier is also controlled by the load resistor R13 in parallel with the transformer. The input to the amplifier is an LC network (C26, L1 and C27) designed for optimum noise figure of the RF amplifier in order to give best overall device sensitivity. For optimum sensitivity, adjacent channel and third order intermodulation performance refer to Setup for Optimum Performance for the gain distribution requirements of the receiver chain. The local oscillator signal is applied to the device in phase quadrature. This can be achieved with the use of two RC networks operating at their 23dB/45° transfer characteristic at the local oscillator frequency, giving a full 90° phase differential between the LO ports of the device (see Fig. 4). Each LO port also requires an equal level of drive from the oscillator. In this application circuit the local oscillator is supplied by a signal generator with a source impedance of 50Ω hence the total RC network (including mixer bias) is designed to have this input impedance. Note: All voltage and current sources used for bias of the RF amplifier and receiver mixers should be decoupled at RF and audio frequencies using suitable capacitors. RF decoupling should be done as close as possible to the RF circuit. RF Amplifier to Mixer Transformerless Matching An LC coupling network can be used to replace the transformer T1 in the applications circuit, Fig. 2. This couples the RF amplifier output to the SL6609A mixer inputs MIXA (pin 26) and MIXB (pin 24). The circuit is shown in Fig. 10. Regulator Requirements The on-chip regulator must be used in conjunction with a suitable PNP transistor to achieve reliable regulation. As the transistor forms part of the regulator feedback loop, the transistor should exhibit the following characteristics: HFE >100 for VCE >0.1V A suitable transistor (TR1) is specified in Fig. 2 and Table 2. RF and Audio Decoupling Requirements All voltages and references should be adequately decoupled at audio (baseband) frequencies. Also, where a voltage reference or current source is used to bias the RF or LO circuits it is necessary to apply RF decoupling to the supply at the point of connection. Open Collector Outputs The Data Output and the Battery Flag output are open collector and require a pull up resistor to a suitable voltage reference. Care must be taken to ensure that the pull up resistor is adequate to supply sufficient current to the load. CIRCUIT FACILITIES Audio AGC Circuit Fig. 5 shows the internal structure associated with the Audio AGC facility. It consists of a current sink which is controlled by the audio (baseband) signal amplitude. It has three parameters that may be controlled by the user; the attack (turn on) time, decay (duration) time and threshold level. Attack time The attack time is simply determined by the value of the external capacitor connected to pin 9 (TCADJ). The external capacitor is in series with an internal 100kΩ resistor and the time constant of this circuit dictates the attack time of he AGC i.e. TATTACK∝100k3CTC (C8) Decay time The decay time is determined by the external resistor R9 (RDECAY) connected in parallel to the capacitor C8. The decay time is simply TDECAY = R93C8. 3 4 RF IN C15 C26 L1 C27 C16 R15 C24 C25 VR R14 VBG C34 R13 TR5 TR2 VC1 VCC1 C17 C4 C13 T1 27 26 24 VCC1 R6 R7 C21 C20 C12 R12 TR4 5 R3 22 EXTERNAL LO INPUT C3 C5 23 C11 TR1 R5 3 R4 1 VCC1 C18 C2 4 R1 TPX 7 20 VBG TPY R2 2 C1 R10 11 VCC2 VR C7 12 10 R16 8 VR 21 C30 BEC VCC1 TPLIMX TPLIMY 15 6 C6 VR SL6609A R8 VCC1 R9 9 13 C8 C31 VCC2 28 R18 14 17 16 25 19 VCC1 18 R11 C29 VBG VCC2 C9 C10 DATA OUT AN199 Fig. 2 Basic SL6609A application circuit (282MHz receiver), showing RF amplifier with external injected LO (no audio AGC) AN199 Resistors R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 Capacitors O/C O/C 100Ω 100kΩ 100Ω 100Ω 100Ω O/C 220kΩ 1MΩ 100kΩ(1) 330Ω(2) Note(3) 4·7kΩ 4·7kΩ 33kΩ Not used 12kΩ C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 1nF 5·6pF(4) 1nF 1nF 5·6pF(4) 2·2µF 1nF 100nF 2nF(5) 2·2µF 100nF 1nF 1nF Not used 1nF 1nF 2·2µF 1nF Capacitors (cont.) C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C34 VC1 Not used 1nF 1nF Not used Not used 1nF 1nF 6·8pF(4) (6) O/C(4) (6) Not used 100pF 2·2µF 2·2µF 2·2pF 1-10pF Inductors L1 T1 68nH(4) (6) 30nH 1:1, Coilcraft M1686-A Transistors TR1 TR2 TR3 TR4 TR5 Zetex FMMT58 Toshiba 2SC5065 Not used Philips BFT25A(2) Toshiba 2SC5065 Table 2 Component list for 282MHz characterisation board (Fig. 2) NOTES 1. The value of R11 is dependent on the data output load. R11 should allow sufficient current to drive the data output load. 2. R12 and TR4 form a dummy load for the regulator. Permitted load currents for the regulator are from 250µA to 3mA. 3. The value of R13 is determined by the set up procedure. See Setup For Optimum Performance. 4. The values of these components are dependent on the operating frequency. 5. The value of C9 is determined by the output data rate. Use 2nF for 512bps, 1nF for 1200bps and 470pF for 2400bps. 6. L1 and C26 form the low noise matching network for the RF amplifier. The values given are for the RF amplifier specified in Fig. 2 with no audio AGC connected. If the audio AGC circuit is connected, the values will require a small change to achieve a good match. 7. Values for R16, R8, C8 and R18 are included so that the open loop action of the AGC circuit can be observed. If this is not required, it can be disabled as described in the section Disabling the audio AGC circuits. Threshold level When a large audio (baseband) signal is incident on the input of the AGC circuit (Fig. 5), the variable current source is turned on. This causes a voltage drop across R16. The voltage potential between VR and the voltage on pin 8 causes a current to flow from pin 9. This charges C8 through the 100kΩ internal resistor. As the voltage across the capacitor increases, current source 2 is turned on and this sinks current from pin 28. The current sink on pin 28 can be used to drive the external AGC circuit by causing a PIN diode to conduct, reducing the signal to the RF amplifier. The relationship between the incident audio signal and current source 1 is shown in Fig. 8. This can be used in conjunction with the value of R16 to set the voltage at pin 8 for any particular signal level. The relationship between the voltage at pin 8 and the output of current source 2 is given in Fig. 9. Using both figures, the value of R16 can be selected to give the required output current at pin 28 for any particular input signal level. Note, however, that the maximum audio signal and hence the audio AGC current (pin 28) is limited in practice by a typical receiver gain distribution to approximately 45µA. Disabling the audio AGC circuits The audio AGC may be simply disabled by connecting pin 8 (GTHADJ) to VR. Alternatively the audio AGC may be disabled by connecting pin 28 (IAGCOUT) to VCC 2 and connecting pin 9 (TCADJ) directly to VR (pin 6). This would then allow the use of the voltage drop across R16, when connected to pin 8, to be used as an RSSI (Received Signal Strength Indicator). RF Current Source Adjustment With pin 2 open circuit and with pin 27 connected to a potential of 0·2V (i.e. the emitter of a transistor with the base voltage VB = 1V (i.e. VR)), the current is nominally set to give IRF= 500µA. The current source may be adjusted by connecting pin 2 via a suitable resistor to a voltage reference or ground. The value of the resistor is determined by the required increase or decrease in IRF from the nominal 500µA. (i.e. pin 2 open circuit). The nominal voltage of pin 2 is 0·7V. To decrease IRF, connect pin 2 to ground using a resistor R, where V20·7V R= (500µA2IREQ)/5 IREQ = required IRF To increase IRF, connect pin 2 to a voltage reference V (e.g. VBG) using a resistor R, where R= 0·7V (IREQ2500µA)/5 5 AN199 NOTES 1. VBG should not be used to sink current. 2. The on-chip voltage reference VR should not be used as a reference for pin 2 as it is not capable of sourcing the required current. On-Chip Voltage References The on-chip voltage reference VBG (1·2V) may be used to bias an external RF amplifier and as a reference for the onchip RF AGC (see pin 2). VBG can source a maximum current as specified in the device data sheet. VBG should not be used to sink current. The on-chip voltage references VR (1·0V) may be used to bias an external RF amplifier and as a reference for pins 1,7,8 and 9. VR can source or sink a maximum current as specified in the SL6609A data sheet. Battery Flag Input The battery flag threshold may be simply increased by using a suitable potential divider so that at the required battery threshold voltage, the voltage at pin 20 (VBATT) is 1V. Setup for Optimum Performance To obtain optimum receiver sensitivity it is necessary to have a Low Noise RF Amplifier at the front end of the receiver (see RF Amplifier and Local Oscillator Network). However, to achieve optimum third order intermodulation rejection it is essential to ensure that the amplifier gain is not greater than the value necessary to achieve good sensitivity. Similarly, to achieve optimum adjacent channel rejection it is necessary to limit the internal gain of the device to that required to obtain sensitivity. Increasing the internal or the RF Amplifier gain beyond these points will degrade the receiver performance. The procedure outlined here represents a method of obtaining optimum performance under the following operating conditions: Frequency of Operation Deviation Frequency Local Oscillator Input Power Power Supply VCC1 Power Supply VCC2 Nominal Gyrator pin 4 R1 R8 C1-C7 282MHz 4kHz 215dBm (50Ω source impedance, see Fig. 4) 1·3V 2·7V 100kΩ Open Circuit Open Circuit 1nF If the proposed frequency of operation is different to that stated above, the signal levels stated should be used as a guide to obtaining the optimum gain distribution within the receiver and RF amplifier. Note: The following set up procedure was undertaken using the RF Amplifier specified in Fig. 2 and should only be used as guidance if alternative RF amplifiers are proposed. Having obtained the component values for optimum performance for a specified RF amplifier, circuit layout, and operating conditions then, provided the RF amplifier design is not device dependent, it should not be necessary to undertake the set up procedure for each individual circuit. The local oscillator drive level and receiver gain used can be optimised if required by the user to trade off sensitivity with the receiver interferer performance (i.e. IP3). The receiver gain level specified below is considered adequate to achieve a good balance between sensitivity and receiver interferer performance. Sensitivity can be increased, to the detriment of receiver interferer performance, by increasing the LNA gain. Fig. 11 and Fig. 12 show typical trends. 6 Increasing the local oscillator drive level, while reducing the LNA gain to keep the same gain to the receiver test points (TPX and TPY), can be used to increase the receiver interferer performance whilst maintaining a near constant sensitivity level. This is typically true for local oscillator signals in the range 10mVrms to 50mVrms as measured at the receiver local oscillator inputs pins LOX and LOY. Set up procedure If the Audio AGC function of the SL6609A is being used in a particular application it must be disabled before undertaking the following steps. To disable the audio AGC function connect GTHADJ directly to VR, leaving all existing circuitry connected to GTHADJ and VR unaltered. (a) Apply a signal with a frequency of fLO14kHz, 273dBm, with no modulation on, to the input of the RF amplifier. (b) Monitor test point TPX (pin 1) with an oscilloscope. Determine that the signal is at a frequency of 4kHz. Adjust the LO or RF frequency to achieve this. Adjust VC1 on the RF amplifier load until the 4kHz signal level is maximum. This should be >200mV p-p. Note: If the level of the signal is above 260mV p-p the signal will not be sinusoidal due to the saturation of the receiver. (c) Use the parallel load resistor (R13) on the RF amplifier to reduce the gain of the RF amplifier to obtain a level of 160mV 10mV p-p at TPX. Ensure that the signal at TPY (pin 7) is also at a level within 10mV of that at TPX (pin 1). Typically, R13 will be: 1·2kΩ for 153MHz 1·8kΩ for 282MHz 3·9kΩ for 470MHz (d) Connect a capacitor between pin 16 and GND in accordance with Table 3. Data rate (bps) Capacitor required 512 1200 2400 2nF 1nF 470pF Table 3 Fine adjustment of the gyrator filter Due to the tolerance of the manufacturing process the gyrator response may vary by 15% for a given value of resistor connected between pin 4 and GND. For accurate alignment the filter will require adjustment. This is simply achieved by undertaking the following procedure: Note: For the following levels to apply the procedure below should follow Setup for Optimum Performance. (a) Set the input RF frequency to fLO14kHz, no modulation. (b) Monitor the signal at the test point TPX (pin 1). Check that the signal frequency is 4kHz. Adjust the LO or RF frequency to obtain this. Adjust the RF signal input until a level of 4mV p-p is measured. (c) Monitor the test point TPLIMX (pin 15) and note the peak to peak signal level; this should be approximately 170mV p-p but not limiting. (d) Adjust the RF signal generator frequency until the signal level drops to 70·8% (23dB) of the level noted in step (c). (e) Note the frequency of the RF signal generator. The difference between the LO frequency and the RF input frequency represents the 23dB response of the filter. Using a 100kΩ resistor to set the gyrator filters will give a nominal 23dB cut of 7·5kHz. Changing this resistor value causes a linear change in the frequency of the filter cutoff. For example, if a 100kΩ resistor results in a filter 23dB cut off equal to 7.5kHz then a 136kΩ resistor will give a 5·5kHz 23dB cutoff. AN199 VCC1 C17 C20 PIN 24 VBG R13 VC1 T1 C21 R14 VR PIN 26 C24 TR2 C25 C34 C26 RF IN C15 L1 C27 C16 R15 TR5 L2 R22 D1 C13 PIN 27 C22 TO PIN 28 CURRENT SOURCE VCC1 NOTE C13, C17, C22 C24, C25 C15, C16 C20, C21 RF DECOUPLING RF DECOUPLING DC BLOCKING DC BLOCKING IRF Fig. 3 RF amplifier Component Value R13 R14 R15 R16 R22 C13 C15 C16 C17 C20 C21 C24 C25 L2 D1 Note(1) 4·7kΩ 4·7kΩ 33kΩ 47kΩ 1nF 1nF 1nF 1nF 1nF(2) 1nF(2) 1nF 1nF 820nH MA862 (Panasonic) Table 4a RF amplifier component values (non-frequency dependent ) NOTES 1. The value of R13 is determined by the setup procedure. See Setup For Optimum Performance. 2. C20 and C21 are purely for demonstration purposes. Pin 24 and pin 26 may be DC coupled provided that no DC voltage is applied to the mixer inputs. Component 153MHz C26 C27 C34 L1 T1 VC1 TR4, TR5 Not used Not used 3·3pF 150nH 100nH Coilcraft N2261-A 1-10pF Toshiba 2SC5065 280MHz 6·8pF Not used 2·2pF 68nH 30nH Coilcraft M1686-A 1-10pF Toshiba 2SC5065 450MHz Not used Not used 1·5pF 39nH 16nH Coilcraft Q4123-A 1-3pF Philips BFT25A Table 4b RF amplifier component values (frequency dependent). See also LO drive network, Fig. 4 7 AN199 Component VCC1 C18 C2 C5 C3,C4,C18 R3,R5,R6,R7 VCC1 C2 R5 153MHz R3 280MHz 450MHz 10pF 5·6pF 10pF 5·6pF 1nF, all frequencies 100Ω, all frequencies 3·3pF 3·9pF Table 5 LO drive network component values for 50Ω input impedance (external LO injection) TO PIN 3 LO INPUT TO PIN 5 C3 VCC1 C5 R7 Component 153MHz 280MHz 450MHz C2 C5 R3 R7 C3 R5,R6 C4,C18 10pF 10pF 100Ω 100Ω 5·6pF 5·6pF 100Ω 100Ω 3·3pF 3·9pF 100Ω 100Ω R6 C4 NOTE C4, C18 C3 R5, R6 RF DECOUPLING DC BLOCKING MIXER BIAS Set by load allowable on crystal osc. (4·7pF typ.) 1kΩ, all frequencies 1nF, all frequencies Table 6 LO drive network component values for high input impedance (crystal oscillator input) Fig. 4 Local oscillator drive network VCC1 RF INPUT VR VCC1 SL6609A CURRENT SOURCE 1 C15 − − 100k L2 28 C22 C16 C26 CURRENT SOURCE 2 8 R22 TO RF AMP + + D1 L1 9 R9 RDECAY R16 VR C8 CTC VR Fig. 5 AGC schematic Resistors R9 R15 R16 R17 R22 220kΩ 4·7kΩ 33kΩ(1) 2kΩ 47kΩ Capacitors C8 C15 C16 C22 C26 C30 100nF(1) 1nF(2) 1nF 1nF 4·7pF(2) 1nF Miscellaneous L1 L2 D1 47nH(2) 820nH MA862 (Panasonic) Table 7 AGC component values (282MHz RF amplifier) NOTES 1. R16 sets the gain (sensitivity) of the audio AGC. If R16 is increased then the the audio AGC will become active for a lower wanted signal level. Increasing R16 can cause the audio AGC loop to become unstable. C8 should be increased to increase the turn on/off time to prevent oscillation occuring. 2. L1, C15 and C26 are part of the RF amplifier (see Fig. 3). 8 AN199 AGC Response Fig. 6 shows a typical AGC response with wanted and unwanted rejection level. If the AGC is required to become active earlier, it is possible to use the circuit shown in Fig. 7 to replace R16. However, it should be noted that the AGC has a fixed dynamic range. TYPICAL IP3 WITH AUDIO AGC AT 282MHz. L1 = 47nH, C26 = 4·7pF, R13 = 820Ω, R16 = 33kΩ, C8 = 100nF, R17 = 2kΩ, R22 = 47kΩ. NOTE: IP3 IS LEVEL ABOVE WANTED REQUIRED TO REDUCE RECEIVER BER TO 1 IN 30. 60 VBG 50 AGC ON 1·8M 40 PIN 8 (VR14·7mV) IP3 (dB) 30 AGC OFF 33k 20 10 VR 0 2125 2105 285 265 245 WANTED SIGNAL (dBm) Fig. 6 Fig. 7 1·6 1·4 1·2 1·0 0·8 0·6 0·4 0·2 0 0·1 1 10 100 1000 AMPLITUDE AT TPX (PIN 1) OR TPY (PIN 7) (mV p-p) Fig. 8 RSSI audio AGC v. signal level at TPX or TPY AUDIO AGC OUTPUT CURRENT, PIN 28 (µA) AUDIO AGC OUTPUT CURRENT AT PIN 8 (µA) 1·8 70 60 50 40 30 20 10 0 0 50 100 150 200 250 300 DC INPUT VOLTAGE AT PIN 8 WRT VR, PIN 6 (mV) Fig. 9 Audio output current at pin 28 v. DC voltage at pin 8 (GTHADJ) 9 AN199 VCC1 C17 R2 L6 VBG C20 PIN 24 R14 VR C25 C24 RF IN C15 VC1 PIN 26 C34 C21 R13 C16 L1 L3 TR2 TR5 C26 C27 C13 FROM PIN 27 CURRENT SOURCE IRF Fig. 10 RF amplifier with transformerless mixer matching circuit Resistors R2 R13 R14 Note(1) 4·7kΩ 4·7kΩ Capacitors C13 C15 C16 C24 1nF 1nF 1nF 1nF Table 8a Component values for Fig. 10 (non-frequency dependent ) NOTES 1. The value of R2 is determined by the setup procedure. See Setup For Optimum Performance. Component C20 C21 C26 C27 C34 L1 L3 L6 VC1 TR4, TR5 153MHz 1nF 2·7pF Not used Not used 3·3pF 150nH 330nH 150nH 1-10pF Toshiba 2SC5065 280MHz 1nF 3·3pF 6·8pF Not used 2·2pF 68nH 100nH 83nH 1-5pF Toshiba 2SC5065 450MHz 1nF 1pF Not used Not used 1·5pF 39nH 39nH 47nH Not used Philips BFT25A Table 8b Component values for Fig. 10 (frequency dependent). 10 AN199 60 2125 59 2125·5 57 IP3 2126·5 56 2127 55 SENSITIVITY IP3 (dB) SENSITIVITY (dBm) 58 2126 54 2127·5 53 2128 52 2128·5 51 2129 50 104 111·5 117 129·5 155 178 237 RECEIVER GAIN TO TPX (mV p-p) FOR AN RF INPUT OF 273dBm AT fLO 14kHz FREQUENCY 282MHz 1200bps, 4kHz DEVIATION, LO DRIVE LEVEL = 21·1mVrms Fig. 11 Sensitivity, IP3 v. receiver gain 74 2125 73·5 ADJACENT CHANNEL 2126 73 72·5 2126·5 2127 72 71·5 SENSITIVITY 2127·5 2128 71 ADJACENT CHANNEL (dB) SENSITIVITY (dBm) 2125·5 70·5 2128·5 2129 70 104 111·5 117 129·5 155 178 237 RECEIVER GAIN TO TPX (mV p-p) FOR AN RF INPUT OF 273dBm AT fLO 14kHz FREQUENCY 282MHz 1200bps, 4kHz DEVIATION, LO DRIVE LEVEL = 21·1mVrms Fig. 12 Sensitivity, adjacent channel v. receiver gain 11 For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively “Zarlink”) is believed to be reliable. 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Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request. Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE