E910.44 Ultra Low Power HALL-Sensor Features • • • • • • Brief Functional Description Supply voltage range 2,0V to 6,0V Low effective current consumption in standard mode < 29µA Hall-sensor with two magnetic switching thresholds Two signal outputs for coded output of the recognised field strength area High measuring rate of typically 10k samples per second in standard mode. Slow measuring mode and/or increased sensitivity can be statically adjusted • Stabilised internal 1.8V regulator • Operating temperature -40°C to 125°C • TSSOP 8 package The ASIC incorporates a Hall sensor which is able to differentiate between 3 different magnetic field strengths, these being positive, negative and near zero. In order to attain a very low average current consumption, the ASIC is pulsed internally - the field measurements are carried out at fixed time intervals. After each individual measurement, the ASIC goes to “stand by” using a very low current consumption. Both output signals, however, remain during this time. Application • General position detection • Advanced revolution counter Typical Application (Example) Host Connection: VSUP S Slow High Gain Supply Data, N 1 2 Changing magnetic field: - to supply - and to detect 8 E91044B 7 3 6 4 5 GND signal processing and nv-datastorage Clock OUT2 OUT1 Notice: The drawing does not represent a functional mechanical arrangement of the sensor system! ELMOS Semiconductor AG Specification Page1 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 1 Pinout 1.1 Pin Description Name Pin No. Type * TST_3 1 I, O, A, D Description Input / Output for test; connect to GND in the application! Switching the trigger rate: connect default to GND (normal trigger rate); With pin at VDD - slower operations (½ x Triggerrate) ; Pin not to be left open in the application! SLOW 2 I, D VDD 3 S OUT1 4 O, D Output: 0 - Field very positive or Low Bat at OUT2=0 1 - Field not positive (Æ near nil or negative) OUT2 5 O, D Output: 0 - Field very negative or Low Bat bei OUT1=0 1 - Field not negative(Æ near nil or positive) GND 6 S Operating Voltage Ground, connection to substrate GAIN (TST_1) 7 I, O, A, D Sensitivity switching: default connection to GND - normal sensitivity; connection to VDD – increased sensitivity (2 x); In test mode: input / output for test signals; Pin not to be left open in the application! TST_2 8 I, O, A, D Input / Output for test; connect to GND in the application! * D = digital, A = analog, S = Supply, I = Input, O = Output, HV = High Voltage (max. 40V) 1.2 Package Pinout with Hall-sensor position 8 7 6 5 dx = -0,05mm dy = -0,15mm reproducibility of dx, dy better than +/- 0,2mm dy dx 1 2 3 4 Figure 1.2-1: Pinout ELMOS Semiconductor AG Specification Page 2 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 2 Blockdiagram VDD 3 IDD0 @ TRG=0 IDD1 @ TRG=1 & GAIN=0 IDD2 @ TRG=1 & GAIN=1 VDD = 2 ... 6V Low Bat Low Bat Vintern VDDintern ca. 1,8V Regler Referenz Vth 2 x Komparator OUT_1 ‘pos’ Bias 4 Logic, Levelshift, OUT_2 Buffer sensitivity ‘neg’ 5 SLOW Clock ‘Autozero’ 2 Connect to GND or VDD for mode select GND 6 ‘Measurement’ tpTRG TRG TTRG GAIN 7 (TST_1) Connect to GND or VDD for sensitivity select 1 TST_3 8 TST_2 For test purposes only! Connect to GND in application! Figure 2-1: Blockdiagram ELMOS Semiconductor AG Page 3 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 3 Operating Conditions 3.1 Absolute Maximum Ratings Operating the device beyond these limits may cause permanent damage. Parameter Condition Symbol Junction Temperature Storage Temperature Range Maximum dissipation of the outputs OUT1 and/or OUT2 Min. Max. Tj -40 150 °C Tstg -40 150 °C 1 mW PVOUT Unit Operating Voltage VDD -0.3 7 V Input Voltage VIN -0.3 VDD+0.3 V 3.2 Recommended Operating Conditions Operating Conditions for which all data are valid (unless otherwise specified)! Parameter Condition Symbol Min. Max. Unit Operating Temperature Range Ta -40 125 °C Junction Temperature Tj -40 150 °C Operating Voltage VDD 2.0 6.0 V Input Voltage SLOW, GAIN - Low - High VIL VIH 0 VDD-0.4 0.4 VDD V V All the following specified characteristics apply in the whole operating temperature range and in the supply voltage range VDD unless otherwise stated. Voltages have GND as a reference unless otherwise stated and currents have positive values when they flow into the circuit. ELMOS Semiconductor AG Specification Page 4 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 4 Detailed Electrical Specification 4.1 Introductory Remark Unless other specified, all values are those corresponding to the operating conditions described in chapter 3.2. 4.2 Electrical Characteristics No. 1.3.4 Parameter Current consumption static - stand by Current consumption static - active at normal sensitivity high sensitivity Internal triggering (Period) and in Slow-Mode 1 Internal Measuring time 2 Integral current consumption at normal sensitivity high sensitivity normal sensitivity, slow high sensitivity, Slow 3.1 Output current OUT1, 2 1.1 1.2.1 1.2.2 2.1.1 2.1.2 2.2 1.3.1 1.3.2 1.3.3 3.2 4.1 4.2 2.3 - Low - High Low Bat thresholds static Condition VDD=6V; min - IDD1 IDD2 TTRG 80 160 - typ max 8 Unit µA VDD=6V; GAIN=L GAIN=H VDD>VLBoff; SLOW=L SLOW=H VDD>VLBoff; TTRGSlow tpTRG 350 535 120 240 - µA µA µs µs µs - 29 38 18 23 100 100 1,8 1,9 - 2,4 2,45 100 µA µA µA µA µA µA V V 103 206 5,8 VDD=6V; GAIN=L, SLOW=L GAIN=H, SLOW=L GAIN=L, SLOW=H GAIN=H, SLOW=H VOL=0.4V VOH=VDD-0.4V VDD dropping IC Operability Time: VDD>VLBoff until first measurement valid Symbol IDD0 VDD increasing VDD>VLBoff IDDeff1 IDDeff2 IDDeff1Slow IDDeff2Slow IOL -IOH VLBon VLBoff tRDY 2,2 2,25 µs 1 Value for Information only. Measured value used to calculate I DDeff1,2 . , whereby with Itran ≤ 2µA the aver- 2 These values result from the following calculation: age reloading current of the “chip capacity” is taken into consideration. ELMOS Semiconductor AG Specification Page 5 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 4.3 Magnetic Characteristics No. 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 Parameter Magnetic Characteristics: magnetic switching thresholds ‘positive’ OUT1,2 = [0,1] ‘negative’ GAIN=L 3 VDD>VLBoff GAIN=H OUT1,2 = [1,0] ‘near zero’ OUT1,2 = [1,1] Symbol min typ max Unit VDD>VLBoff OUT1,2 = [1,0] ‘near zero’ OUT1,2 = [1,1] Magnetic switching thresholds at high sensitivity ‘positive’ OUT1,2 = [0,1] ‘negative Condition 3 BZpon BZpoff BZnon BZnoff BZz +15 +10 -100 -90 -10 +60 +30 - 60 - 30 +100 +90 -15 -10 +10 mT mT mT mT mT BZpons BZpoffs BZnons BZnoffs BZzs +7 +4 -50 -45 -4 +30 +15 - 30 - 15 +50 +45 -7 -4 +4 mT mT mT mT mT Note: A Hall sensor only detects the magnetic field component which is vertical to the chip surface. A magnetic field is valued positively for the IC when the top side of the chip faces north and the back side faces south. 3 The BZz range results from both thresholds and is the safer range in which neither a positive nor negative field is recognized. The maximum ratings are identical to minimum (BZpoff) and maximum (BZnoff) or to minimum (BZpoffs) and maximum (BZnoffs) ELMOS Semiconductor AG Specification Page 6 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 5 Functional Description 5.1 General With the Hall sensor IC, the magnetic field strength (the part which lies on the chip vertically) can be differentiated into three different areas of field strength, these being positive, near zero and negative. The information is given in a coded form at two outputs (see 2.2 and 3.1). The fourth piece of codable information from the two outputs is the signal under voltage (low bat) and indicates that no “measurements” are possible due to an operating voltage which is too low. The IC is optimised to work in an operating voltage ranging from 2V to a maximum of 6V with very low current consumption. Reducing the current consumption is achieved on the one hand by reducing, in particular, the static operating current of the Hall plate, and on the other hand by pulsing the supply of the main currentconsuming circuit components (Hall plate and comparators). Because of the extreme reduction in the “integral current consumption”, only a comparatively low magnetic sensitivity is achieved with the sensor, i.e. the field strengths must be relatively far apart. In the application, 4 different operating modes with both control inputs SLOW and GAIN are statically adjustable. The speed of the measurements and/or the sensitivity of the switching thresholds can be changed: Setting GAIN=L ; SLOW=L Functions 0 - Normal Mode: pulsed operations with normal sample rate according to TTRG , normal sensitivity, integral current consumption IDD1eff ; GAIN=L ; SLOW=H 1 - Slow Mode: pulsed operations with reduced sample rate ( ½ x) according to TTRGSlow, normal sensitivity, lowest integral current consumption IDD1effSlow ; GAIN=H ; SLOW=L 2 - Sensitive Mode: pulsed operations with normal sample rate according to TTRG , 2 x sensitivity, increased integral current consumption IDD2eff ; GAIN=H ; SLOW=H 3 - Slow + Sensitive Mode: pulsed operations with reduced sample rate ( ½ x) according to TTRGSlow , 2 x sensitivity, integral current consumption IDD2effSlow ; A typical functional flow for the IC is illustrated following. BZ BZp max. BZpon BZHysp BZpoff BZz BZnon BZn BZHysn BZnoff min. TRG t pTRG TTRG (internal) VDD VLBoff VLBon t RDY OUT1 H L OUT2 H L t RDY 'near Zero' 'positiv' 'near Zero' 'negativ' 'nahe Null' Low Bat Low Bat 'positiv' 'positiv' Remark: - the voltage levels of OUT1,2 are drawn normalized to VDD as logic levels L and H; Figure 5.1-1: Functional diagram identifying characteristics ELMOS Semiconductor AG Specification Page 7 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 5.2 Regulator The regulator provides a stabilised internal operating voltage Vintern of approximately 1.8V which is derived from the externally applied operating voltage VDD. All necessary reference voltages and reference currents are produced here (for example the Hall plate operating current, the comparators’ switching thresholds) and a voltage monitoring takes place (“low bat” recognition). The regulator is always connected to the operating voltage and therefore has a static current consumption of IDD0. After connecting additionally the operating voltage (after complete disconnection or after underrunning the low bat threshold), the operability time of the IC, tRDY, is determined by the build-up time of the regulator and the reference. If the threshold is only slightly underrun, (as seen in figure 4.2 on the right), the reference and regulator remain in further operation and there is no additional delay in operability. In case the operating voltage is above the low bat threshold and then quickly rising, a restart of the IC may occur, by generating an internal reset signal and showing a “low bat” condition at the outputs. If a restart takes place or not, depends on the slew rate and hight of the operating voltage step. Conditions in the range of 0,5V/µs and a step height above 1V can produce a restart, which typically takes less time then a normal start up. 5.3 Hall Plate The Hall plate forms the actual sensor element. To operate the plate, there is a current source which gets its reference current from the regulator. Through Pin 5 – GAIN – the operating current of the plate is switchable to twice the value (at Pin 5 at VDD), whereby the magnetic switching thresholds are halved, albeit at the cost of an increase in the integral current consumption. In order to achieve an effective offset suppression, the plate is operated choppered. The sub-assembly contains the necessary analogue switches to switch between “Autozero” and “Measurement”. 5.4 Comparators Since three areas of field strengths have to be recognised, at least two comparators are necessary. The signals coming from the Hall plate are extremely low (within a range of 10µV per mT). Therefore both comparators also work choppered in order to compensate for the relatively large offset voltages. The comparators compare the voltages which come from the Hall plate with the fixed voltages coming from the reference. The hysteresis of the two thresholds is achieved by the switchover of the reference voltage at the input of the comparator depending on its own output signal. 5.5 Timing Generator The timing generator controls both the cyclical triggering of the whole IC in order to activate the individual “measurements” as well as the chopping of the Hall plate and the comparators within a measuring cycle. For this purpose there are three signals – the 'Autozero' 'Measure' and 'Trigger'. The time interval of the trigger impulse (TTRG-tpTRG), and its duration (tpTRG) are determinant for the attainable integral consumption of the IC. The main power consuming Hall plate and the comparator are only connected (switched on) during measuring. Principally, this results in a good ganging between the times TTRG, and tpTRG in the permitted IC operating range so that the smallest ratio of TTRG/tpTRG to be used, results in a maximum integral current consumption of IDDeff1 or IDDeff2 (characteristics 1.3.1, 1.3.2). As can be seen from figure 4.2, the timing generator is disabled during “low bat” and during the regulator build-up time. The timing generator has another input SLOW (pin 8), intended to reduce the trigger rate (½ x) corresponding to the doubling of the trigger period to TTRGSlow whereby the integral current consumption can be reduced further still to IDDeff1Slow or IDDeff2Slow. For normal operations, this input must be firmly connected to GND, since there is no pull-down element available. If it is connected to VDD, the IC is switched to slow mode operation. ELMOS Semiconductor AG Specification Page 8 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 5.6 Output Logic This block has to save the output signals of the comparators, to process the Low Bat signal and to bring the two resulting output signals to the current VDD level. This block does not need any static operating current and is permanently connected to VDD. Therefore, the result of the last 'measurement' is available even during “stand by”. 5.7 Test Interface The connections not used in the 8-contact package are used to simplify IC measuring and to reach the highest possible test results. In order to achieve the lowest possible IC interference-sensibility through the test inputs, these must be connected to GND in the application. 5.8 Application Circuitry Host Connection: VSUP S Slow High Gain Supply Data, N 1 2 Changing magnetic field: - to supply - and to detect 8 E91044B 7 3 6 4 5 GND signal processing and nv-datastorage Clock OUT2 OUT1 Notice: The drawing does not represent a functional mechanical arrangement of the sensor system! Figure 5.8-1: An application example – revolution counter with autonomous energy supply 5.9 Timing Diagram Please see figure 5.1-1. 5.10 Interface Immunity In the application, the ASIC is not exposed to any particular EMC influencing factor since it is operated with an autonomous power supply in the application and put into an EMC-protective package. ELMOS Semiconductor AG Specification Page 9 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 6 Package 6.1 Marking 6.1.1 Top Side ELMOS where 91044 91044 ELMOS Project Number 6.1.2 Bottom Side BXXXC YWW** where B Version XXX Charge Number C Assembler Code YWW * Year and Week of Fabrication Mask Revision Number 6.2 Package Outline Specification ELMOS packages meet the requirements of the latest JEDEC outline specification. All JEDEC outline specifications can be free downloaded from http://www.jedec.org or please contact your local ELMOS-KeyacountManager. ELMOS Semiconductor AG Specification Page 10 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 7 General 7.1 General Information Customer Internal Address - Telephone - Telefax - E-Mail - Technical Contact - Customer's Project–No. - Revision B ELMOS Project Name E910.44 Package TSSOP 8 (4,4 mm) Process L 12HCY 7.2 ELMOS Documents See QM-No.: 07PL0035.xx Qualification Flow 910.44 7.3 Customer Documents None 7.4 Other Documents None ELMOS Semiconductor AG Specification Page 11 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 8 Quality 8.1 ESD-Protection OUT1/2, GAIN, SLOW, TST_x VDD Figure 8.1-1: Internal Protective Circuitry The ESD protection circuitry is measured using JESD 22-A114 (Human Body Model) during qualification with the following conditions. VIN = 2000 Volt REXT = 1500 Ohm CEXT = 100 pF 8.2 Latch up sensitivity according JEDEC 78 9 Reliability Controlling the reliability of the device according to ELMOS-Specification 07PL0005.XX 10 Storage, Handling, Packaging, and Shipping 10.1 Storage Storage conditions should not exceed those given in Chapter 3.1 Absolute Maximum Ratings. 10.2 Handling Devices are sensitive to damage by Electro Static Discharge (ESD) and should only be handled at an ESD protected workstation. Handling conditions should not exceed those given in Chapter 3.1 Absolute Maximum Ratings. 10.3 Packaging Material shall be packed for shipment as follows: TAPE on reel 10.4 Shipping Each delivery shall be accompanied by the following: Certificate of Conformance to this specification Delivery note ELMOS Semiconductor AG Specification Page 12 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 11 Record of Revisions Chapter Rev. Change and Reason for Change Date Released ELMOS All 0 Initial Revision 13/02/03 TSP 1.2 1 Chapter with Illustration added 03/06/03 THW 2 1 Illustration changed 03/06/03 THW 5.1 1 Illustration changed 03/06/03 THW 4.2 2 Parameters changed: IDD0, IDDeffxx, tRDY; 23/06/03 JN 5.8 2 Application circuit added 23/06/03 JN 2 Datasheet added 30/09/05 JN 1.1 2 TSSOP added, SO8 removed 30/09/05 JN 1.2 2 TSSOP added, SO8 removed 30/09/05 JN 4.2 2 Parameter tpTRG max limit removed, footer added 10/10/05 JN 5.8 3 Application circuit corrected for TSSOP8 05/01/06 JN Page 1 3 Application circuit corrected for TSSOP8 05/01/06 JN 6.1 4 IC marking corrected 06/04/06 JN 7.2 4 Document changed to 07PL0035 06/04/06 JN 8.1 4 Standard changed to JESD 22-A114 06/04/06 JN 8.2 4 added 06/04/06 JN 10 4 added / completed 20/04/06 THW 5.2 5 Behaviour @ quickly rising VDD added 05/09/06 JN 6.2 5 Package Dimensions renamed to Package Outline specification – chapter modified 27.09.06 ThW Page 1 ELMOS Semiconductor AG Specification Page 13 / 16 03SP0074E.05 Customer Date: 2006-09-27 E910.44 12 Index Table of Content 1 Pinout.............................................................................................................................................................2 1.1 Pin Description........................................................................................................................................2 1.2 Package Pinout with Hall-sensor position..............................................................................................2 2 Blockdiagram..................................................................................................................................................3 3 Operating Conditions.....................................................................................................................................4 3.1 Absolute Maximum Ratings....................................................................................................................4 3.2 Recommended Operating Conditions....................................................................................................4 4 Detailed Electrical Specification.....................................................................................................................5 4.1 Introductory Remark...............................................................................................................................5 4.2 Electrical Characteristics.........................................................................................................................5 4.3 Magnetic Characteristics.........................................................................................................................6 5 Functional Description....................................................................................................................................7 5.1 General....................................................................................................................................................7 5.2 Regulator.................................................................................................................................................8 5.3 Hall Plate.................................................................................................................................................8 5.4 Comparators...........................................................................................................................................8 5.5 Timing Generator....................................................................................................................................8 5.6 Output Logic............................................................................................................................................9 5.7 Test Interface..........................................................................................................................................9 5.8 Application Circuitry................................................................................................................................9 5.9 Timing Diagram.......................................................................................................................................9 5.10 Interface Immunity.................................................................................................................................9 6 Package.......................................................................................................................................................10 6.1 Marking.................................................................................................................................................10 6.1.1 Top Side.........................................................................................................................................10 6.1.2 Bottom Side...................................................................................................................................10 6.2 Package Outline Specification..............................................................................................................10 7 General.........................................................................................................................................................11 7.1 General Information..............................................................................................................................11 7.2 ELMOS Documents..............................................................................................................................11 7.3 Customer Documents...........................................................................................................................11 7.4 Other Documents..................................................................................................................................11 8 Quality..........................................................................................................................................................12 8.1 ESD-Protection.....................................................................................................................................12 8.2 Latch up sensitivity ...............................................................................................................................12 9 Reliability......................................................................................................................................................12 10 Storage, Handling, Packaging, and Shipping............................................................................................12 10.1 Storage................................................................................................................................................12 10.2 Handling..............................................................................................................................................12 10.3 Packaging...........................................................................................................................................12 10.4 Shipping..............................................................................................................................................12 11 Record of Revisions...................................................................................................................................13 12 Index...........................................................................................................................................................14 13 Approvals:..................................................................................................................................................16 ELMOS Semiconductor AG Specification Page 14 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 Table of Figures Figure 1.2-1: Pinout.............................................................................................................................................2 Figure 2-1: Blockdiagram....................................................................................................................................3 Figure 5.1-1: Functional diagram identifying characteristics..............................................................................7 Figure 5.8-1: An application example – revolution counter with autonomous energy supply............................9 Figure 8.1-1: Internal Protective Circuitry.........................................................................................................12 ELMOS Semiconductor AG Specification Page 15 / 16 03SP0074E.05 Date: 2006-09-27 E910.44 13 Approvals: Customer Part No : E910.44 910.44, Ultra Low Power HALL-Sensor Customer : Name : Title : Date / Sign : ELMOS : Name : Title : Date / Sign : ELMOS Semiconductor AG Specification Page 16 / 16 03SP0074E.05 Date: 2006-09-27