Date: 01.07.1998 SPECIFICATION CUSTOMER DETAIL SPECIFICATION Octal Parallel Low Side Driver APPROVALS Customer : Name : .............................................................................................. Title : ................................................................................................. ELMOS Name : ............................................................................................... Title : .................................................................................................. Date : ....................................................... Page 1 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 SPECIFICATION Date: 01.07.1998 Contents 1 Project Summary ........................................................................................................................................ 3 1.1 Purpose of Specification ............................................................................................................. 3 1.2 Life Support Policy/Product Liability............................................................................................ 3 1.3 General Information .................................................................................................................... 3 1.4 Brief Functional Description........................................................................................................ 4 1.5 Related ELMOS Documents....................................................................................................... 4 1.6 Related Customer Documents.................................................................................................... 4 1.7 Other Related Documents .......................................................................................................... 4 1.8 Marking ....................................................................................................................................... 4 2 General Device Specification...................................................................................................................... 5 2.1 Absolute Maximum Ratings (Non - operating)............................................................................ 5 2.2 Recommended Operating Conditions......................................................................................... 5 2.3 Package Outline.......................................................................................................................... 6 2.4 Package Pin-Assignment............................................................................................................ 6 2.5 Package Pin Definition................................................................................................................ 7 3 Detailed Electrical Description .................................................................................................................... 7 3.1 DC Characteristics ...................................................................................................................... 7 3.1.1 Inputs .......................................................................................................................... 7 3.1.2 Outputs ....................................................................................................................... 8 3.2 AC Characteristics ...................................................................................................................... 9 3.2.1 AC-Parameter............................................................................................................. 9 4 Functional Description................................................................................................................................. 10 4.1 Block Diagram............................................................................................................................. 10 4.2 Detailed Functional Description .................................................................................................. 10 4.2.1 Driver .......................................................................................................................... 10 4.2.2 Control-logic................................................................................................................ 11 4.2.3 Overload-Timer........................................................................................................... 12 4.2.4 Thermal-Control.......................................................................................................... 12 4.2.5 Power-On-Reset ......................................................................................................... 12 4.3 ESD Protection Circuit ................................................................................................................ 13 4.4 Test Method ................................................................................................................................ 13 4.5 Application Circuit ....................................................................................................................... 13 4.6 Production Test Sequence.......................................................................................................... 14 5 Storage, Handling, Packing and Shipping................................................................................................... 14 5.1 Storage ....................................................................................................................................... 14 5.2 Handling...................................................................................................................................... 14 5.3 Packing ....................................................................................................................................... 14 6 Record of Revisions.................................................................................................................................... 15 Page 2 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 1 Project Summary 1.1 Purpose of Specification The purpose of this specification is to define the mechanical, environmental and electrical characteristics for Application Specific integrated circuits supplied by ELMOS. All parts which comply with this specification shall be considered to meet the customers requirements. Any parameters which are left undefined will be processed in accordance with ELMOS´standard Quality Control procedures. This document is intended to take precedence of any applicable customer documents. When agreed by the customer and ELMOS, no changes or additions may be made without the written agreement of both the customer and ELMOS. 1.2 Life Support Policy/Product Liability The quality of ELMOS products is continuously monitored within the scope of the ISO9001 quality assurance system. All products are tested for compliance with specified requirements prior to delivery. Only those products which fully comply with the specified requirements may be released. The products of ELMOS are suitable only for the purpose described in the present tender specifications and for the use within the technical environment described herein which is still to be tested by the customer. Any use of another purpose or in another technical environment will be done at the own risk by the customer and at the exclusion of any liability of ELMOS for damages resulting therefrom. 1.3 General Information Elmos Project Name : E910.13 Revision Status : A Package Type : Plastic Small-Outline wide (SOW 24) Number of pins : 24 Process : T12H Page 3 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 1.4 Brief Functional Description The E910.13-IC is an octal parallel power driver circuit (low side) with microcontroller compatible bidirectional dataports and output status monitoring. The device incorporates the following features : • • • • • • very low quiescent current (typ. < 1 µA in Stand-By-Mode) high immunity against substrate currents 8-bit-parallel structure with memory function bidirectional inputs and outputs TTL- compatible input levels with threshold hysteresis high current outputs (RON < 3 Ω, max. 350 mA per channel, 8 channel capable of delivering max. 200 mA simultaneously) • individual output short circuit protection by switching off the corresponding output • Thermal overload protection by switching off all outputs 1.5 Related ELMOS Documents QS-Nr:: 07PL009.XX QS-Nr : 07SP001.XX QS-Nr : 07VA002.XX QS-Nr : 07VA013.XX QS-Nr : 07VA005.XX QS-Nr : 02SP002.XX Standard Qualifikation´s - Plan ELMOS Qualitäts- und Zuverlässigkeitsstandard Reliability Test Procedures Zuverlässigkeitsprüfung Warenausgangsprüfung Packaging for Automatic Assembly 1.6 Related Customer Documents None 1.7 Other Related Documents None 1.8 Marking Topside : <> YYY C ZZZ E91013 * Where : < > YYY C ZZZ * Customer Code Lot Number Carsem Assembly Year and work week of assembly Mask Revision status Backside : None. Page 4 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 2 General Device Specification 2.1 Absolute Maximum Ratings (Non - operating) Continuous operation of the device at or above these ratings is not recommended. Parameter: Condition: Symbol: Battery voltage t< 0.5s VS 40 V VDD 7 V +40 V max. 10 ms +46 V max. 300 µs +50 V Logic Supply Voltage Transient Output Voltage max. 300 ms min max VOUTx Unit Output Current IOUTx DC 350 mA Output Current of clamping diode IOUT P 600 mA Slew-Rate dVOUT/dt 100 V/µs Input Voltage (D1...D8) VDIN -0.3 VDD+0.3 V Input Voltage (EN , TR) VET -0.3 22 V P0 860 mW Thermal Resistance SO 24W (Junction to Ambient) RTRJ-A 75 K/W Junction Temperature TJ +150 °C Relative Humidity (Non-condensing) RH 85 % Soldering Temperature (10 Seconds) TLead 240 °C Operating Temperature TOPT -40 +125 °C Storage temperature TSTG -55 +150 °C (Schaffner pulses Type 2) TA = 85 °C Power dissipation SO 24W 5 2.2 Recommended Operating Conditions The following conditions apply unless otherwise stated. Parameter Condition Symbol min typ max Unit Logic Supply voltage VDD 4.75 5 5.25 V Battery Voltage VS 5 12 25 V Ambient Temperature TAMB -40 25 85 °C All voltages referenced to GND. Currents flowing into the circuit have positive values. Page 5 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 SPECIFICATION Date: 01.07.1998 2.3 Package Outline SO 24 W: DIM A a1 a2 b b1 C c1 D E e e3 F L S min mm typ max 2.65 0.2 2.45 0.49 0.32 0.1 0.35 0.23 0.5 45° 15.6 10.6 5 15.2 10.0 inch typ max .104 .003 .007 .096 .013 .019 .009 .012 .020 typ .598 .614 .393 .419 min 1.27 13.97 7.4 0.5 .050 .550 7.6 1.27 8° .291 .019 max .300 .050 2.4 Package Pin-Assignment SO 24 (300 mil JEDEC-STD) GND VDD OUT1 OUT8 OUT2 D8 D2 D7 EN VS TR D6 D3 D5 D4 OUT6 OUT3 OUT5 OUT4 NC Page 6 of 15 OUT7 D1 GND NC E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 2.5 Package Pin Definition Pin Nr. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 14 15 16 17 18 19 20 22 23 24 Name GND OUT1 OUT2 D1 D2 EN TR D3 D4 OUT3 OUT4 NC NC GND OUT5 OUT6 D5 D6 VS D7 D8 OUT7 OUT8 VDD Function Ground Open-Drain Low-Side Driver Open-Drain Low-Side Driver Bidirectional Data Port for OUT1 Bidirectional Data Port for OUT2 Chip Enable, active high invokes the Transfer-Mode, active high Bidirectional Data Port for OUT3 Bidirectional Data Port for OUT4 Open-Drain Low-Side Driver Open-Drain Low-Side Driver not connected not connected Ground Open-Drain Low-Side Driver Open-Drain Low-Side Driver Bidirectional Data Port for OUT5 Bidirectional Data Port for OUT6 Battery Voltage Bidirectional Data Port for OUT7 Bidirectional Data Port for OUT8 Open-Drain Low-Side Driver Open-Drain Low-Side Driver Logic Supply Voltage 3 Detailed Electrical Description 3.1 DC Characteristics 3.1.1 Inputs Pin Parameter Symbol min Dx Input LOW voltage VDINL 1) VDINH IDIN typ max Unit 0 0.8 V 1) 2.2 VDD V 1) -10 10 µA 2.5 3.5 V 0 0.8 V 2.2 VDD V 400 mV 15 20 V -1 1 µA (VEN=L, VTR=L) Input HIGH voltage (VEN=L, VTR=L) Input current OUTx EN, TR (VEN=L, VTR=L) Threshold Output Monitor (VOM) 6) Enable LOW voltage VETL VETH Enable HIGH voltage Hysteresis Voltage TEST-Mode VEThys VETtest Input current IET 6) 100 200 (0 < VET < 10V) Page 7 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 3.1.1 Inputs Pin Parameter Symbol VDD Quiescent current: IVDD STANDBY-MODE min typ max <1 10 µA 120 170 µA 120 170 µA 20 µA 5V < VS < 16V, VEN=H, VTR=H Quiescent current: IVDD TRANSFER-, HOLD-MODE VTR=L, IDOUT=0 Quiescent current: IVDD READ-MODE, VTR=H, VEN=L, IDOUT=0 Leakage current: VS ∑IVS Unit VOUTx=0, VVS=16V 3.1.2 Outputs Pin Parameter Symbol Dx Output LOW voltage VDOUTL min typ max Unit 0.4 V VDD V 1.5 3.0 Ω 10 100 µA 1.7 V (IDOUT=1mA) Output HIGH voltage VDOUTH 4.0 (IDOUT=-0.1mA) OUTx Output resistance ROUT (OUT=L; VDD = 5V; 0 < IOUT < 200mA) Output leakage current (∑IOUTL) VOUT=16V Voltage at clamping OUT=H, diodes: VOUTx - VS IVS-OUT = 350mA Output short circuit OUT=L, VOUT ≤ VS, TSCL = current (ISC) 0 0.36 0.5 0.9 A 150 175 200 °C 125 140 175 °C 20 40 60 °C 20ms Threshold of thermal shut TJ > THSoff off ( THSoff ) 3) 6) Threshold of thermal TJ < THSon switch on again ( THSon ) 3) 6) Hysteresis of thermal THShys protection 6) Page 8 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 3.2 AC Characteristics 3.2.1 AC-Parameter Pin Parameter Condition min OUTx Slew rate (dVOUT/dt) OUT=H Output capacitance (COUT) OUT=H,VOUT=5V 6) OUT=H,VOUT=15V 6) typ max 10 100 Unit V/µs 40 60 pF 30 45 pF 40 60 ms 4 8 µs 4 8 µs 70 ns 900 ns 6) Time of current limit (TSCL) max switching time (tSON) Dx IOUT > ISCL 2) ref. fig. 4.2.2 RL = 1kΩ 5) 6) max switching time (tSOFF) ref. fig. 4.2.2 RL = 1kΩ 4) 5) 6) Delay between functional CDX<20pF 20 6) mode and reaction at Dx: EN, TR tNON and tNOFF time window for transition 7) 300 600 Hold <--> Read (THR) Remarks: 1) D1 - D8 are bidirectional data ports, which are controlled by V -, V - status. (ref. Fig. 4.2.1) EN TR 2) If the output current exceeds the short circuit current threshold I SCL, an internal timer is started and the current limitation is activated. If the current limitation is still active after the time period of TSCL, the corresponding output is disabled by resetting the input latch bit. (Overload condition) 3) As long as the temperature T HS is exceeded, all outputs are switched to high resistance. The contents of the latches are maintained. 4) The risetime of the outputs depends on: - the drain-source-capacity of the output transistor (COUT) - the load resistor RL - the load capacity CL - the battery voltage VS Approximation formula: Td = T ⋅ ln10 (reaches 90% of VS) T = RL (COUT + CL) The drain-source-capacity of the output transistor depends on the applied voltage. This additional delay time Td must be added to TSOFF. 5) Time delay between all modes. 6) Not production-tested, guaranteed by the construction. 7) Within 300ns the change from HOLD-MODE to READ-MODE can be done directly via TRANSFERMODE. The data and output status will be maintained for up to 900ns. Page 9 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 4 Functional Description 4.1 Block Diagram Channel 1 VS D D1 Q OUT1 Power-On Reset EN Latch RB Driver Controllogic TR EN TEST Overloadtimer Thermocontrol Oscillator Channel 8 D8 VDD VDD OUT8 GND GND 4.2 Detailed Functional Description This IC was specially designed for the use in automotive applications with medium power dissipation for driving and controlling relays, lamps, bus systems etc. . The 910.13 has a bidirectional 8 bit-data bus and 8 identical power outputs. 4.2.1 Driver The output stage provides an active-low-drive signal suitable for max. 350mA continuous loads. By the usage of DiMOS transistors the current consumption in the Standby-Mode is reduced to typ. < 1µA. Each output has a current limitation circuit, which limits the maximum output current to approx. 500mA. If the voltage drop at the output stage exceeds the short circuit threshold of approx. 1V (RDSon typ. 1.5Ω), the current limitation is activated and the output is disabled after a certain delay time. Switching off the output (Setting a high-bit in TRANSFER-MODE), clears the short circuit latch. A restart is only possible after resetting the short circuit latch. In the On condition the output is driven as a constant current source by internal limitation. To switch on lamps certainly, the short circuit shut off has a time delay of typ. 40ms. Additionally the outputs have internal zeners set to approx. 52V to clamp inductive transients at turn-on or turn-off. Page 10 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 SPECIFICATION Date: 01.07.1998 4.2.2 Control-logic By means of two control inputs (EN,TR) 4 different operating modes and three testing modes can be selected (ref. also fig. 4.2.1 and fig. 4.2.2): 1. READ-MODE: The internal diagnostic function is active, the output status is read via the data bus (D1 - D8). If a short circuit is detected at the output (OUT1 - OUT8), the output is disabled and the corresponding bit is set to "High" level. 2. TRANSFER-MODE: The input data of D1 - D8 are transferred to the corresponding outputs (0 = on, 1 = off). Only in this mode the data latches are transparent. 3. HOLD-MODE: The actual data is latched. Changing the data in the latch is only possible in the TRANSFER-MODE. For a direct transition from HOLD to READ a time window typ. >300ns has to be observed. 4. STANDBY-MODE: All outputs and the internal oscillator are disabled. The current consumption is reduced. The short-circuit- and the over-temperature-latch are reset. All latched data is held. 5. TEST-MODE1: If the voltage at input EN exceeds 15 V TEST-MODE1 is activated. This means, that the internal timing is controlled by the input TR. 6. TEST-MODE2: If the voltage at input TR exceeds 15 V TEST-MODE2 is activated. This means, that the internal timing is controlled by the input EN. Additionally the overtemperature-shut-off thresholds are dropped to a range between 25°C and 85°C. 7. TEST-MODE3: If the voltage at input TR and input EN is approx. 15 V TEST-MODE3 is activated. This means, that the internal oscillator-output divided by 32 can be seen on data bus bit 1. Fig. 4.2.1: Functional Table of Control Inputs Enable VEN Transfer VTR Mode-Symbol Functional Mode L L H L RM TM H L HM H H SM VENtest H/L VENtest H/L VTRtest VTRtest TEST1 TEST2 TEST3 READ-MODE (output monitoring) TRANSFER-MODE (transferring the input data directly to the corresponding output) HOLD-MODE (the actual data is latched, output corresponds to the data latch) STANDBY-MODE (all outputs on high resistance) TEST-MODE1 TEST-MODE2 TEST-MODE3 Page 11 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 SPECIFICATION Date: 01.07.1998 Fig. 4.2.2: Timing-Diagram with Functional Mode V EN V TR V DI V OUT 4.2.3 Overload-Timer After the short circuit limitation has been activated, an internal timer starts to count. If the short circuit case is still on after a time period of approx. 40ms, the corresponding output is disabled. 4.2.4 Thermal-Control This module contains a thermal protection circuit and avoids a thermal overload of the IC. As soon as the junction temperature exceeds an upper threshold ϑab at typ. 175°C, all outputs are disabled. The latched data however is maintained. Only if the junction temperature drops below the value ϑein, which is approx. 40°C below ϑab ,the IC will recover the former operating status. 4.2.5 Power-On-Reset After applying the supply voltage to the IC all data latches and the timer are reset and the outputs are disabled. Then 910.13 is switched into the operating mode controlled by the inputs EN and TR. Page 12 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 4.3 ESD Protection Circuit VS VDD EN, TR IN OUTx Dx OUT EIO IIO IIO EIO 4.4 Test Method The ESD Protection circuitry is measured using MIL-STD-883C Method 3015 (Human Body Model) With following conditions : VIN = 2000 Volt REXT = 1500 Ohm CEXT = 100 pF 4.5 Application Circuit VS VDD MicroController D1 OUT1 R1 D2 OUT2 R2 D3 OUT3 R3 D4 OUT4 R4 D5 OUT5 R5 D6 OUT6 R6 D7 OUT7 R7 D8 OUT8 X1 X2 X3 X4 X5 X6 X7 TR EN E91013 GND Page 13 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 4.6 Production Test Sequence Wafer Test : 25 °C, Sample 5 Storage, Handling, Packing and Shipping 5.1 Storage Storage conditions should not exceed those given in „Absolute Maximum Ratings“. 5.2 Handling Devices are sensitive to damage by Electro Static Discharge (ESD) and should only be handled at an ESD protected workstation. 5.3 Packing Material shall be packed for shipment as follows: Volume conductive tubes or tape on reel. Page 14 of 15 E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 Date: 01.07.1998 SPECIFICATION 6 Record of Revisions CHAPTER REASON FOR AND DESCRIPTION OF CHANGE REV Page 15 of 15 DATE APPROVAL ELMOS E 910.13 Octal Parallel Low Side Driver QS-Nr.: 03SP113E.00 CUST