SPECIFICATION

Date :24.9.2002
SPECIFICATION
CUSTOMER DETAIL SPECIFICATION
RELIN
910.18
APPROVALS
Customer :
Name : ..............................................................................................
Title : .................................................................................................
ELMOS
Name : ...............................................................................................
Title : ..................................................................................................
Date : .......................................................
Page 1 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
Contents
1.
Project-Summary
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
2.
General Device Specification
2.1
2.2
2.3
2.4
2.5
3.
Purpose of Specification
Life Support Policy/Product Liability
General Information
Brief Technical Summary
Related ELMOS-Documents
Related Customer Documents
Other Related Documents
Marking
Absolute Maximum Ratings (Non-Operating)
Recommended Operating Conditions
Package
Package Pin Out
Package Pin Description
Detailed Electrical Specification
3.1 Characteristics
3.1.1 DC Characteristics
3.1.2 AC Characteristics
4.
Functional Description
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.7.1
4.8
5.
Quality
5.1
5.2
5.3
6.
Block Diagram
Detailed Functional Description
Application Circuit
Input Circuit
Timing Diagram
Noise Immunity
ESD Protection Circuit
ESD Test Method
Production Test Sequence
Lot -by-lot Quality Conformance Testing
Assembly Monitor
Delivery lot certification
Reliability
6.1
6.1.1
6.1.2
6.2
Qualification flow
Test Sequence
Tests, Test Severities
Reliability Monitor
Page 2 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
7.
Storage, Handling, Packing and Shipping
7.1
7.2
7.3
7.3.1
7.3.2
7.4
8.
Storage
Handling
Packing
Tape and Reel
Samples
Shipping
Record of Revisions
Page 3 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
1.
Project Summary
1.1
Purpose of Specification
The purpose of this specification is to define the mechanical, environmental and electrical characteristics for
Application Specific integrated circuits supplied by ELMOS. All parts which comply with this specification
shall be considered to meet the customer´s requirements. Any parameters which are left undefined will be
processed in accordance with ELMOS´ standard Quality Control procedures.
This document is intended to take precedence of any applicable customer documents. When agreed by the
customer and ELMOS, no changes or additions may be made without the written agreement of both the
customer and ELMOS.
1.2
Life Support Policy/Product Liability
ELMOS products are not designed for use in Life Support Applications, Devices or Systems where
malfunction of an ELMOS product can be reasonably expected to result in personal injury. ELMOS
customers using or selling ELMOS products for use in such applications do so at their own risk, and agree
to full indemnify ELMOS for any damage resulting from such improper use or sale.
1.3
General Information
Customer
:
Address
:
Telephone
:
Telex
:
Telefax
:
Technical Contact
:
Customer Project Name
:
910.18
Revision Status
:
A
Elmos Project Name
:
91018
Revision Status
:
A
Package Type
:
16SOICW
Page 4 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
1.4
Brief Functional Description
The ELMOS E910.18 is a voltage regulator with an integrated bidirectional serial interface for automotive
bus systems :
The device incorporates the following features :
-
LIN BUS interface
Output driver with Slew Rate control
Wake up (via BUS)
Input voltage BUS ranges from -24V to +30V (independent of VS)
Voltage regulator 5V, 1.5%, 100mA.
Current limited output
Operating voltage range (VS) 5.5 to 18.0V
Standby current <30µA typical
Over temperature protection
RESET with two fixed RESET times, 15ms and 100ms and two levels, 3.15V and 4.65V
Under voltage recognition, fixed threshold 6.8 - 7.8V
Universal comparator
1.5
Related ELMOS Documents
QS-Nr:: 07PL009.XX
QS-Nr : 07SP001.XX
QS-Nr : 07VA013.XX
QS-Nr : 07VA005.XX
QS-Nr : 02SP002.XX
1.6
Standard Qualifikation´s - Plan
ELMOS Qualitäts- und Zuverlässigkeitsstandard
Zuverlässigkeitsprüfung
Warenausgangsprüfung
Packaging for Automatic Assembly
Related Customer Documents
None
1.7
Other Related Documents
None
1.8
Marking
Topside :
91018A
XXX# YWW*@
Where :
91018A
XXX
#
YWW
*
@
Page 5 of 18
Part Number
Lot Number
Assembly Code
Year and work week of assembly
Mask Revision status
can be extended by ELMOS related marking
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
Backside
Page 6 of 18
None.
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
2.
General Device Specification
2.1
Absolute Maximum Ratings (Non - operating)
Continuous operation of the device at or above these ratings is not permitted.
Parameter
Supply Voltage (1)
For t < 1 minute
For t ≤ 500 ms
Input Voltage (1)
For t ≤ 500 ms
Differential VS-VCC
Input Voltage
Pin
1
6
1 -1 16
2,7
3,8,11,14,15
16
Input Current
Short Circuit (See 4.2)
Schaffner pulse (See 4.2)
Power dissipation TA = 85 °C (2)
Thermal Resistance
(Junction to Ambient)
Junction Temperature (3)
Operating Temperature Range
Storage Temperature Range
2 -5, 7 - 15
1,16
6
Symbol
VS
VS
VS
VIN
VIN
VIN
VIN
VIN
IIN
IIN
Min
-1.0
-24.0
-0.3
-0.3
-0.3
Max
18.0
30.0
40.0
30.0
40.0
40.0
VS + 0.3
VCC + 0.3
PTOP
RΘJ-A
-0.3
-25.0
-500.0
-200.0
-
6.5
25.0
500.0
200.0
600.0
95.0
TJ
TOPT
TSTG
-40.0
-55.0
+150.0
+125.0
+150.0
Unit
V
V
V
V
V
V
V
V
V
mA
mA
mA
mW
K/W
°C
°C
°C
NOTES :
1.
For pins 1 and 6 the values of voltage and current stated are interdependent
2.
The maximum power dissipation is a function of the ambient temperature and the thermal
resistance. The maximum power dissipation is calculated as follows :
PTOT ≤ (VS - VCC) * IOUT+ PBUS
Where PBUS is the bus driver component. Power dissipation is typically < 25mW
3.
See Over temperature circuit.
2.2
Recommended Operating Conditions
The following conditions apply unless otherwise stated.
All of the following parameters are valid for an operating temperature range of -40°C up to 125°C and a
supply voltage range of 4.75V < VCC < 5.25V and 5.25V < VS < 18.0V, unless otherwise specified.
Voltage reference is GND, if not otherwise specified. The current values are positive, if flowing into the
circuit.
Page 7 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
2.3
DIM
A
a1
a2
b
b1
C
c1
D
E
e
e3
F
G
L
M
S
2.4
Package Outline
min
mm
typ
0.1
0.35
0.23
max
2.65
0.2
2.45
0.49
0.32
inch
typ
min
.003
.013
.009
0.5
.020
45°
10.5
10.6
5
10.1
10.0
typ
.397
.393
1.27
8.89
7.4
8.8
0.5
max
.104
.007
.096
.019
.012
.413
.419
.050
.350
7.6
9.15
1.27
0.75
8°
.291
.346
.019
.300
.360
.050
.029
max
Package Pin Out
910.18
Page 8 of 18
VS
1
16
VCC
EN
2
15
SENSE
VTR
3
14
RESET
GND
4
13
TEST
GND
5
12
GND
BUS
6
11
TXD
SI
7
10
RXD
SO
8
9
NC
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
2.5
Package Pin Description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
Name
VS
EN
VTR
GND
GND
BUS
SI
SO
NC
RXD
TXD
GND
TEST
14
15
16
RESET
SENSE
VCC
3.
Detailed Electrical Description
3.1
DC Characteristics
1
2
3
Parameter
Voltage Regulator
Power On Reset
Threshold, VCC on
Power On Reset
Threshold, VCC off
Power Supply Current
ISUP
4
5
6
7
Output Voltage
Output Voltage
Output Voltage
Idle or Saturation
Voltage
8
9
10
11
Output Voltage
Output Current
Current Limit
Input Resistance VCC
in STBY-Mode
Universal
Comparator
Threshold SI LOW
Threshold SI HIGH
Hysteresis SI
12
13
14
Page 9 of 18
Description
Positive Supply Voltage
Enable input for VCC
Reset time and threshold select
Ground
Ground
Send/Receive pin
Universal comparator Input
Universal comparator Digital output
Not connected
Serial Data output
Serial Data input
Ground
Input for Overtemperature-Test, this Pin has to be
connected to GND in application!
Reset Output, Active LOW.
Input voltage monitor
Output 5v /100 mA
Conditions
Symbol
Min.
Valid for VCC,VS> 4.5V
VRESON
4.5
4.65
4.8
V
VTR = HIGH, VS > 0V
VTR = LOW, VS > 0V
EN = VS= 12V
Pins 8,9-11, 14-16 open
EN = 0, VCC=off
VS > 5.5 V, Tamb = 25°C
VS > 5.5 V
VS > 16 V
VS > 4.0V, IOUT ≤ 20 mA
VS > 4.0V, IOUT ≤ 100 mA
VS > 3.3V, IOUT ≤ 20 mA
3.3 > VS < 5.5 V
VS > 3V, VS < 40V
VS > 0V, VS < 40V
EN = 0, VCC=off
VRES2
VRES1
4.5
3.0
4.65
3.15
4.8V
3.3
V
V
IQS
ISTBY
VCCN
VCCT
VCCH
VR
VR
VR
VCCL
IVCC
ILIMVCC
RINSTBY
4.925
4.9
4.9
VS-VR
100.0
-
35.0
5.0
5.0
5.0
1
120.0
60.0
5.075
5.1
5.25
0.2
0.4
0.6
5.1
250.0
-
µA
µA
V
V
V
V
V
V
V
mA
mA
MΩ
1)
VSIL
VSIH
VSIHYST
1.05
50.0
1.17
1.27
100.0
1.4
-
V
V
mV
910.18
Voltage Regulator with LIN-Bus Interface
Typ.
Max.
unit
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
Conditions
IOUT = 1mA, VS > 5.5V
Symbol
VOL
10 k Ω from SO to VCC,
VCC> 3.3V
VOL
17
18
Parameter
Output Voltage
SO
Output Voltage LOW
SO
Battery-Voltage
comparator
Threshold SENSE LOW
Threshold SENSE HIGH
19
20
21
Hysteresis SENSE
Output Voltage SENSE
Output Voltage SENSE
1)
IL = 1 mA
IL = - 1 mA
22
23
24
25
EN
Threshold EN LOW
Threshold EN HIGH
Hysteresis EN
Pull Down Current EN
15
16
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Output Sink Current BUS
(Current Limit)
Page 10 of 18
Typ.
-
Max.
0.8
-
-
0.4
V
6.8
-
-
-
V
30.0
VCC0.8
100.0
-
7.8
0.8
-
-
1.75
100.0
-
2.5
-
V
V
mV
IPDENON
1.8
4.0
7.5
µA
IPDENOFF
70.0
100.0
130.0
µA
VTRH
VTRH
0.15
0.75
0.25
0.85
-
VCC
VCC
IOH
IOL
VOL
VOL
-300.0
160.0
-
-230.0
230.0
-
-160.0
300.0
0.8
0.2
µA
µA
V
V
IPU
-500.0
-375.0
-250.0
µA
8.0
-
400.0
10.5
-
V
mV
3.0
3.15
3.3
V
IPU
-500.0
-375.0
-250.0
µA
VIL
-
-
0.25
VCC
VIH
0.75
-
-
VCC
VIL
-
-
0.45
VS
VIH
VHYS
0.55
30.0
50.0
-
VS
mV
VOUT
VOUT
-
0.8
0.9
1.0
1.2
40.0
70.0
200.0
VSENSEL
VSENSEH
VCC > 3.3V
1)
Regulator "on"
(VEN > VENH)
Regulator "off"
(VEN < VENL)
RESET+VTR
Threshold VTR HIGH
Threshold VTR LOW
Output Current VTR
Interrogate Mode
HIGH
LOW
Output Voltage RESET
Output Voltage LOW
RESET
Pull Up Current RESET
Threshold
Charge -Pump
Hysteresis
BUS
POR
Pull Up Current
TxD
Input LOW Level
TxD
Input HIGH Level
TxD
Input LOW Level
BUS
Input HIGH Level
BUS
Hysteresis
Output Voltage BUS
(Under Load)
Min.
-
VSENSEHYST
VOL
VOL
VENL
VENH
VHYS
Unit
V
V
mV
V
V
VCC > 3.3V
IOUT = 1mA, VS > 5.5V
10 k Ω from RES to
VCC, VS = VCC = 0.8V
1)
VS > 0V, VPOR = VRES1
1)
VS = 12V
A) Pin 6, IL =25mA
B) Pin 6, IL =40mA
VBUS> 2.5V
VPOR
ILIM
910.18
Voltage Regulator with LIN-Bus Interface
V
V
mA
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
42
43
44
45
46
47
48
Parameter
Input Current BUS
Input Current BUS
Input Current BUS
Input Current BUS
Pull-Up Resistor BUS
Output Voltage
RxD
Output Voltage
RxD
Conditions
VBUS = -12V
o
VBUS = -12V, T>85 C
VBUS = -18V
o
VBUS = -18V, T>85 C
Symbol
IIN
RPU
min.
20
typ.
30
max.
1
5
1.5
6.5
47
unit
mA
mA
mA
mA
kΩ
VCC0.8
-
0.8
V
-
-
V
Symbol
min
typ
max
unit
tRES
tDELRES
70.0
10.0
3.0
100.0
15.0
6.5
140.0
20.0
10.0
ms
ms
µs
dV/dt fall
dV/dt rise
-3.0
1.0
-1.5
1.5
-1.0
3.0
V/µs
V/µs
tTrans_pdr/f
1.0
2.0
4.0
µs
tTrans_sym
-2.0
0
2.0
µs
trec_pdr/f
1.0
3.0
6.0
µs
trec_sym
tdel_rise/fall
-2.0
-
0
-
2.0
20.0
µs
µs
tdel_sym
-3.5
0.6
200.0
25.0
0
1.0
45.0
3.5
1.5
90.0
µs
µs
ns
µs
4.0
10.0
9.0
17.0
15.0
25.0
µs
µs
IL = 1 mA
VOL
IL = - 1 mA
VOL
Conditions
VTR< 1kOhm
VTR > 45kOhm
VS > 0 1)
3.2 AC Parameter
Nr
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Parameter
Voltage Regulator
Reset Time
Reset Delay Time
BUS
Slew Rate Control BUS
Delay-Time TXD-BUS
rise/fall
Symmetry
Delay Time TXD-BUS
Delay Time BUS->RXD
rise/fall
Symmetry
Delay Time BUS->RXD
Delay Time TxD->RxD
Symmetry
Delay Time TxD->RxD
Delay Time TXD
Delay Time EN
Wake-Up Delay Time
(BUS)
Delay: Si-So Comparator
VS Sense Delay Time
see Timing Diagram 4.4
tTrans_sym =
tTrans_pdr -tTrans_pdf
see Timing Diagram 4.4
trec_sym = trec_pdr - trec_pdf
tdel_sym = tdel_rise - tdel_fall
1)
1)
1)
1)Not tested in production
Page 11 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
4.
Functional Description
4.1
Block Diagram
VS
VS
RXD
VTH12
VTL12
VCC
BUS
TXD
Levelshift
Slewrate Crl.
Curr. Limit
Test
Vref
Bias
GND
overtemperature
prot.
Vtemp
Gen.
EN
Wake-Up
Vref
VS
5Vvoltage
regulator
VCC
VRES1
VRES2
VS
Vref
SENSE
Oscillator
Reset
Gen.
VTR
SI
Vref
4.2
RESET
SO
Detailed Functional Description
The 910.18 integrated interface is designed for the control of serial data channels. The circuit realizes the
translation of transmit and receive signals from the processor voltage to the 12V bus level.
Undefined states are avoided during low voltage conditions by means of a Power-on-Reset which connects
and disconnects the outputs and inputs. The inputs make use of internal Pull-up and Pull-down-resistors to
maintain defined levels.
The bus control pin BUS can operate from voltages between GND +30V (GND + 40V for t ≤ 0.5s) and less
than GND -24V. This ensures that an open circuit ground connection or power supply interruption does not
inhibit the operation of other devices using the bus.
Page 12 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
4.2.1 Transmitter Path
A Low level on the TXD pin switches the open-collector transistor on the Bus Pin on. In order to minimise
the EMC radiation on the bus, the rise and fall time of the transmit pulse on the Bus pin is conditioned by a
slew rate controller.
4.2.2 Receiver Path
The signal on the BUS pin is permanently available at RXD (VCC>VRES1). Transients are filtered by an
internal delay of typ. 3µs on the comparator input.
4.2.3 Stby -Mode
The circuit turns on automatically after the battery voltage (VS) is greater than VSENSEH . After this it is
necessary to set EN to a voltage greater than VENH before it is possible to disable the circuit.
A voltage smaller than VENL at the Pin EN, switches the voltage regulator off (stby-mode). In this mode the
current consumption is smaller than 50µA. As long as the circuit operates in stby mode the EN input is held
to GND via an internal pull down current of typ. 100µA. It can be switched on again by setting VEN at a
voltage greater than VENH. The pull down current at the Pin EN is reduced to 4µA (see 3.1 Nr25)
If the circuit operates in stby-mode it can also be switched on by a level change of typically 45µs on the Pin
BUS.
4.2.4 Temperature Protection
The over temperature protection operates between Tj = 150°C and Tj = 170°C. In the range 150°C to over
temperature shut off the principal functions of the device are maintained within specification. The over
temperature protection circuit disables the output voltage and the bus driver. When the temperature returns
to the normal operating level, a reset signal is generated.
When Tj is typically 140°C the device operates again with a normal reset signal, independent of EN and
BUS level. The over temperature protection can be tested over the Pin TEST. This Pin has to be set to
GND in application.
4.2.5 Initialisation
Switch on of VS, switch on after over temperature protection and recognition of an edge on the bus:
The Bus is active when VCC exceeds VRES1 (typically. 3.15V). The internal reset logic is in a shut down
condition. The voltage regulator is in a switch on condition and can be switched off by a high/low transition
of the EN pin.
4.2.6 RESET Programming
The VTR pin allows programming of four different modes of the RESET function. With VTR tied to GND
the low RESET threshold (VRES1 = 3.15V) is valid, and when VTR is tied to VCC the high RESET
threshold is valid (VRES2 = 4.65).
When VTR is tied directly to VCC or GND a RESET time of 100ms is valid. When VTR is tied to VCC or
GND via a resistor of minimum 50kOhm, a RESET time of 15ms is valid.
The VTR programming takes place during the first oscillator period and will be fixed until Vbat turns off.
When the system is powered up the high threshold VRESON is always valid. The RESET function is
referenced to VCC.
The RESET function is interrogated in the following manner: Following the crossing of the reset threshold
VRESON the potential on VTR is interrogated. Depending upon the result of this interrogation following the
first clock pulse after the RESET the pull up or the pull down current source is activated for one clock pulse.
In this time the potential on the VTR pin changes if it is tied to VCC or GND via a 50kOhm resistor. From
this information the Reset time can be determined.
Page 13 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
4.2.7 Transient Resistance
Transients (1, 2, 3a, 3b, 100V, -150V) are coupled to the BUS pin without special filter elements. The
transient impulses have no influence upon the inner state or the outputs of the device.
The transients are also coupled to VS by the application circuit wherein a 47nF and a 100uF capacitor with
an ESR of 7 Ohm is used. The function of the capacitor is to flatten the transient inpulse.
An extra slow diode (e.g. D1F-60 or BYM 10 600) is used. Thus the internal condition of the device cannot
be altered; the device must maintain specified conditions.
The relatively high specified maximum Latch up current on VS enables the device to operate with a resistor
and a capacitor, but without polarised protection diode (zener?), so that the external circuitry limits of 500mA or -1V bz. +40V are not exceeded.
The transients 3a and 3b are fed directly to VS, since VS is blocked with a 47nF capacitor to GND there can
be no disturbance of the internal condition of the device.
During test the EN-Pin is tied to VS. For the pins EN and SI care has been taken to ensure that when the
transient arrives at these pins (Singly, or tied together) via a 10kOhm resistance that no disturbance of the
internal condition occurs. A clamp current of +-10mA on these pins causes no alteration in the function of
the device.
Voltage spikes on VS within the operating voltage range have no short term influence on the voltage value
at VCC, when they are below VRES1 or over 5.25V.
4.2.8 Output Circuit
The voltage regulator is stable with an output capacitance of min. 1µF. The selection and value of the load
capacitance can be selected depending upon the application ( e.g. 4.7 µF Tantal ), so that the important
parameter the current difference during load changes as well as the maximum permitted short term voltage
breaks.
4.2.9 Under Voltage
In the range 4.5V < VCC < 5.25 The Bus interface operates within the specified parameters. In the range
VRES1 < VCC < 4.5V the TXD-Signal is sent to the Bus; the receive path is also active. In the range VCC
< VRES1 the Bus driver remains in a high impedance condition. SENSE and SO also generate (VCC >
VRES) further correct signals; the specification of the input threshold of SI will eventually no longer be met.
4.2.10 Short Circuit Capability
All inputs and outputs are short circuit protected to VCC und GND. In addition, VCC and BUS are protected
against over temperature. In the event of a short circuit on VS, the capacitance on VCC is discharged via
the reverse diode of the regulator transistors. The discharge current is conducted to a capacitor of 1000uF
to prevent damage to the regulator. The current from VCC to VS has no effect on functionality of the device
(RESET, BUS) (the Bus does not enter a low resistance condition, and, RESET is still correctly generated
etc.).
4.2.12 Baud Rate
The device is designed to operate with a nominal transfer frequency of 20000 Baud (CBus < 25nF). Due to
the symmetrical delay times the device can operate in certain special modes (i.e. Programming of flash
memory) with higher Baud rates.
4.2.13 Reset
The Power On Reset has no hysteresis.
Page 14 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
4.3
Application Circuit
+5V
µC
VCC
SENSE RESET
TEST
GND
TXD
RXD
NC
BUS
SI
SO
910.18
VS
EN
VTR
GND
GND
VBat
µC
Ignition
Lin-Bus
optional
comparator input
optional
Gnd
one of four possible programmings
4.4
Timing Diagramm
Timing : Slew Rate BUS
TXD
BUS
VTH
VTL
tTrans_pdf
tTrans_pdr
RXD
trec_pdf
Page 15 of 18
trec_pdr
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
Voltage Regulator and Reset
VS
t
VCC
VRES1/2
VRESON
t
tDELRES
tRES
RESET
t
4.5
Noise Immunity
The 910.18 device meets the following requirements of ISO 7637 part1, when used in an application
according to this specification :
Parameter
Test pulse 1
Condition
t1 = 5s / US = -100V
100 pulses
Test pulse 2
t1 = 0.5s / US = 100V
1000 pulses
Test pulse 3a/b
US = -150V / US = 100V
1000 Bursts
Test pulse 4
Us =-6V Ua =-5V t8 = 5s
10 pulses
Test pulse 5
Ri = 2Ω tD = 250ms
tr = 0.1ms UP+US= 40V
10 pulses at 1 minute intervals
4.6
ESD Protection Circuit
VCC
PIN
VCC
Input-Pin
Circuit
Circuit
GND
Output-Pin
GND
GND
Pin: EN, VTR,SI,TXD,
Pin: SO,RXD,RESET,SENSE
Page 16 of 18
910.18
Voltage Regulator with LIN-Bus Interface
Pin: VCC, VS,BUS
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
4.6.1 Test Method
The ESD Protection circuitry is measured using MIL-STD-883C Method 3015 (Human Body Model) with the
following conditions :
VIN = 1000 Volt
REXT
= 1500 Ohm
CEXT
= 100 pF
4.7
Production Test Sequence
in accordance to control plan
5. Quality
5.1
Lot-by-lot Quality Conformance Testing
Quality Conformance Testing shall be carried out in accordance with ELMOS specification 07VA005.
Sampling Levels are as defined in 07PL004
Each delivery shall be accompanied by a Certificate of Conformance to this specification
5.2
Assembly Monitor
Assembly monitoring shall be carried out according to ELMOS specification 07PL006 and 07PL007.
Page 17 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
6.0 Reliability
6.1
Qualification Flow
6.1.1 Test Sequence
The test sequence for device qualification shall be as defined in ELMOS specification 07PL009
6.1.2 Tests, test severities
The tests and the severities of test shall be as defined in ELMOS specifications 07SP001.XX and
07VA013.XX
6.2
Reliability Monitor
Product Reliability monitoring shall be conducted in accordance with ELMOS specification 07PL005.
7. Storage, Handling, Packing and Shipping
7.1
Storage
Storage conditions should not exceed those given in 2.1 Absolute Maximum Ratings.
7.2
Handling
Devices are sensitive to damage by Electro Static Discharge (ESD) and should only be handled at an ESD
protected workstation.
7.3
Packing
Material shall be packed for shipment as follows:
7.3.1 Tape and Reel
Surface Mount devices are available taped on reels to ELMOS specification 02SP002
7.3.2 Samples
Samples will be available packed in tubes
7.4
Shipping
Each delivery shall be accompanied by the following :
Certificate of Conformance to this specification
Delivery note
Page 18 of 18
910.18
Voltage Regulator with LIN-Bus Interface
QMNr.:03SP238E.02
Date :24.9.2002
SPECIFICATION
8.
Record of Revisions
CHAPTER
REASON FOR AND DESCRIPTION OF CHANGE
REV
00
New Specification
01 Page 5: 1.4 features
Page 6: Input voltage range >500ms
Page 6: RTH Package
Page 8: stby current + Hysteresis Si-SO
Page 9: 3.1.41 Output Current BUS
Page 10: 3.1.42/3 new
Page 10: 3.1.42+43 removed
Page 10: 3.2.3 Slew Rate Control
Page 10: 3.2.4 min value
Page 12: 4.2.6 VTR Programming
Page 13: 4.2.8 Output capacitor
02 Page 5: 1.4 Brief functional description
Page 10: Reverse current BUS
Page 19 of 18
DATE
15.1.2001
23.5.2002
24.9.202
910.18
Voltage Regulator with LIN-Bus Interface
APPROVAL
ELMOS
BF
BF
CUST.
BF
QMNr.:03SP238E.02