Product Folder Sample & Buy Support & Community Tools & Software Technical Documents Reference Design SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 SN74AVC32T245 32-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation, Level-Shifting, and Tri-State Outputs 1 Features • 1 • • • • • • • • • Member of the Texas Instruments Widebus+™ Family Control Inputs VIH/VIL Levels Referenced to VCCA Voltage VCC Isolation Feature – If Either VCC Input is at GND, Both Ports are in the High-Impedance State Overvoltage-Tolerant Inputs/Outputs Allow MixedVoltage-Mode Data Communications Fully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.2 V to 3.6 V PowerSupply Range Ioff Supports Partial-Power-Down Mode Operation 4.6 V Tolerant I/Os Max Data Rates – 380 Mbps (1.8 V to 3.3 V Level-Shifting) – 200 Mbps (< 1.8 V to 3.3 V Level-Shifting) – 200 Mbps (Translate to 2.5 V or 1.8 V) – 150 Mbps (Translate to 1.5 V) – 100 Mbps (Translate to 1.2 V) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 4000 V Human-Body Model (A114-A) – 200 V Machine Model (A115-A) – 1000 V Charged-Device Model (C101) The SN74AVC32T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can disable the outputs so the buses are effectively isolated. The SN74AVC32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1OE, 2OE, 3OE, and 4OE) are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the highimpedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Device Information(1) PART NUMBER SN74AVC32T245 PACKAGE 13.50 mm × 5.50 mm BGA MICROSTAR JUNIOR (96) 8.50 mm × 3.50 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 2 Applications • • • • Personal Electronics Industrial Enterprise Telecom Logic Diagram 1DIR A3 2DIR A4 1A1 H4 2A1 A2 H3 1OE A5 3 Description This 32-bit noninverting bus transceiver uses two separate, configurable power-supply rails. The SN74AVC32T245 device is optimized to operate with VCCA/VCCB set from 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA and accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB and accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2 V, 1.5V, 1.8 V, 2.5 V, and 3.3 V voltage nodes. BODY SIZE (NOM) LFBGA (96) E5 E2 1B1 To Seven Other Channels 3DIR J3 4DIR T4 4A1 J2 T3 3OE J5 To Seven Other Channels 2B1 To Seven Other Channels J4 3A1 2OE 4OE N5 N2 3B1 4B1 To Seven Other Channels 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 6.12 7 8 1 1 1 2 3 6 Absolute Maximum Ratings ..................................... 6 ESD Ratings.............................................................. 6 Recommended Operating Conditions....................... 7 Thermal Information .................................................. 7 Electrical Characteristics .......................................... 8 Switching Characteristics: VCCA = 1.2 V ................... 9 Switching Characteristics: VCCA = 1.5 V ± 0.1 V....... 9 Switching Characteristics: VCCA = 1.8 V ± 0.15 V... 10 Switching Characteristics: VCCA = 2.5 V ± 0.2 V..... 10 Switching Characteristics: VCCA = 3.3 V ± 0.3 V... 11 Operating Characteristics...................................... 11 Typical Characteristics .......................................... 12 Parameter Measurement Information ................ 14 Detailed Description ............................................ 15 8.1 8.2 8.3 8.4 9 Overview ................................................................. Functional Block Diagram ....................................... Feature Description ................................................ Device Functional Modes........................................ 15 15 15 16 Application and Implementation ........................ 17 9.1 Application Information .......................................... 17 9.2 EnableTimes ........................................................... 17 9.3 Typical Application ................................................. 18 10 Power Supply Recommendations ..................... 20 11 Layout................................................................... 20 11.1 Layout Guidelines ................................................. 20 11.2 Layout Example .................................................... 20 12 Device and Documentation Support ................. 21 12.1 12.2 12.3 12.4 12.5 Documentation Support ....................................... Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 21 21 21 21 21 13 Mechanical, Packaging, and Orderable Information ........................................................... 21 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (August 2007) to Revision F • 2 Page Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 5 Pin Configuration and Functions GKE, ZKE Package 96-Pin LFBGA Top View 1 2 3 4 5 ZRL Package 96-Pin BGA MICROSTAR JUNIOR Top View 6 1 2 3 4 5 6 A A B B C C D D E E F F G G H H J J K L K M L N M P N R P T R T Table 1. Pin Assignments 1 2 3 4 5 6 A 1B2 1B1 B 1B4 1B3 1DIR 1OE 1A1 1A2 GND GND 1A3 C 1B6 1A4 1B5 VCCB VCCA 1A5 1A6 D E 1B8 1B7 GND GND 1A7 1A8 2B2 2B1 GND GND 2A1 2A2 F 2B4 2B3 VCCB VCCA 2A3 2A4 G 2B6 2B5 GND GND 2A5 2A6 H 2B7 2B8 2DIR 2OE 2A8 2A7 J 3B2 3B1 3DIR 3OE 3A1 3A2 K 3B4 3B3 GND GND 3A3 3A4 L 3B6 3B5 VCCB VCCA 3A5 3A6 M 3B8 3B7 GND GND 3A7 3A8 N 4B2 4B1 GND GND 4A1 4A2 P 4B4 4B3 VCCB VCCA 4A3 4A4 R 4B6 4B5 GND GND 4A5 4A6 T 4B7 4B8 4DIR 4OE 4A8 4A7 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 3 SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com Pin Functions PIN I/O DESCRIPTION NO. NAME A1 1B2 Input/Output Referenced to VCCB A2 1B1 Input/Output Referenced to VCCB A3 1DIR Input Direction-control signal A4 1OE Input Tri-State output-mode enables. Pull OE high to place all outputs in Tri-State mode. Referenced to VCCA A5 1A1 Input/Output Referenced to VCCA A6 1A2 Input/Output Referenced to VCCA B1 1B4 Input/Output Referenced to VCCB B2 1B3 Input/Output Referenced to VCCB B3 GND — Ground B4 GND — Ground B5 1A3 Input/Output Referenced to VCCA B6 1A4 Input/Output Referenced to VCCA C1 1B6 Input/Output Referenced to VCCB C2 1B5 Input/Output Referenced to VCCB C3 VCCB — B-port supply voltage. 1.2 V ≤ VCCB ≤ 3.6 V C4 VCCA — A-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V C5 1A5 Input/Output Referenced to VCCA C6 1A6 Input/Output Referenced to VCCA D1 1B8 Input/Output Referenced to VCCB D2 1B7 Input/Output Referenced to VCCB D3 GND — Ground D4 GND — Ground D5 1A7 Input/Output Referenced to VCCA D6 1A8 Input/Output Referenced to VCCA E1 2B2 Input/Output Referenced to VCCB E2 2B1 Input/Output Referenced to VCCB E3 GND — Ground E4 GND — Ground E5 2A1 Input/Output Referenced to VCCA E6 2A2 Input/Output Referenced to VCCA F1 2B4 Input/Output Referenced to VCCB F2 2B3 Input/Output Referenced to VCCB F3 VCCB — B-port supply voltage. 1.2 V ≤ VCCB ≤ 3.6 V F4 VCCA — A-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V F5 2A3 Input/Output Referenced to VCCA F6 2A4 Input/Output Referenced to VCCA G1 2B6 Input/Output Referenced to VCCB G2 2B5 Input/Output Referenced to VCCB G3 GND — Ground G4 GND — Ground G5 2A5 Input/Output Referenced to VCCA G6 2A6 Input/Output Referenced to VCCA H1 2B7 Input/Output Referenced to VCCB H2 2B8 Input/Output Referenced to VCCB H3 2DIR Input 4 Direction-control signal Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 Pin Functions (continued) PIN I/O DESCRIPTION NO. NAME H4 2OE Input H5 2A8 Input/Output Referenced to VCCA H6 2A7 Input/Output Referenced to VCCA J1 3B2 Input/Output Referenced to VCCB J2 3B1 Input/Output Referenced to VCCB J3 3DIR Input Direction-control signal J4 3OE Input Tri-State output-mode enables. Pull OE high to place all outputs in Tri-State mode. Referenced to VCCA J5 3A1 Input/Output Referenced to VCCA J6 3A2 Input/Output Referenced to VCCA K1 3B4 Input/Output Referenced to VCCB K2 3B3 Input/Output Referenced to VCCB K3 GND — Ground K4 GND — Ground K5 3A3 Input/Output Referenced to VCCA K6 3A4 Input/Output Referenced to VCCA L1 3B6 Input/Output Referenced to VCCB L2 3B5 Input/Output Referenced to VCCB L3 VCCB — B-port supply voltage. 1.2 V ≤ VCCB ≤ 3.6 V L4 VCCA — A-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V L5 3A5 Input/Output Referenced to VCCA L6 3A6 Input/Output Referenced to VCCA M1 3B8 Input/Output Referenced to VCCB M2 3B7 Input/Output Referenced to VCCB M3 GND — Ground M4 GND — Ground M5 3A7 Input/Output Referenced to VCCA M6 3A8 Input/Output Referenced to VCCA N1 4B2 Input/Output Referenced to VCCB N2 4B1 Input/Output Referenced to VCCB N3 GND — Ground N4 GND — Ground N5 4A1 Input/Output Referenced to VCCA N6 4A2 Input/Output Referenced to VCCA P1 4B4 Input/Output Referenced to VCCB P2 4B3 Input/Output Referenced to VCCB P3 VCCB — A-port supply voltage. 1.2 V ≤ VCCB ≤ 3.6 V P4 VCCA — A-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V P5 4A3 Input/Output Referenced to VCCA P6 4A4 Input/Output Referenced to VCCA R1 4B6 Input/Output Referenced to VCCB R2 4B5 Input/Output Referenced to VCCB R3 GND — Ground R4 GND — Ground R5 4A5 Input/Output Referenced to VCCA R6 4A6 Input/Output Referenced to VCCA Tri-State output-mode enables. Pull OE high to place all outputs in Tri-State mode. Referenced to VCCA Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 5 SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com Pin Functions (continued) PIN NO. I/O NAME DESCRIPTION T1 4B7 Input/Output Referenced to VCCB T2 4B8 Input/Output Referenced to VCCB T3 4DIR Input Direction-control signal T4 4OE Input Tri-State output-mode enables. Pull OE high to place all outputs in Tri-State mode. Referenced to VCCA T5 4A8 Input/Output Referenced to VCCA T6 4A7 Input/Output Referenced to VCCA 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCCA VCCB Supply voltage VI Input voltage (2) MIN MAX UNIT –0.5 4.6 V I/O ports (A port) –0.5 4.6 I/O ports (B port) –0.5 4.6 Control inputs –0.5 4.6 A port –0.5 4.6 B port –0.5 4.6 A port –0.5 VCCA + 0.5 B port –0.5 VCCB + 0.5 V VO Voltage applied to any output in the high-impedance or power-off state (2) VO Voltage range applied to any output in the high or low state (2) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA Continuous current through each VCCA, VCCB, and GND ±100 mA 150 °C Tstg (1) (2) (3) (3) Storage temperature –65 V V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. 6.2 ESD Ratings VALUE Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 V(ESD) (1) (2) 6 Electrostatic discharge (1) Charged-device model (CDM), per JEDEC specification JESD22C101 (2) UNIT ±8000 ±1000 V JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process. Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 6.3 Recommended Operating Conditions (1) (2) (3) See VCCI VCCO MIN MAX UNIT VCCA Supply voltage 1.2 3.6 V VCCB Supply voltage 1.2 3.6 V VIH High-level input voltage VIL Low-level input voltage Data inputs (4) Data inputs (4) 1.2 V to 1.95 V VCCI × 0.65 1.95 V to 2.7 V 1.6 2.7 V to 3.6 V 2 V 1.2 V to 1.95 V VCCI × 0.35 1.95 V to 2.7 V 0.7 2.7 V to 3.6 V VIH High-level input voltage VIL Low-level input voltage VI DIR (referenced to VCCA) (5) DIR (referenced to VCCA) (5) Output voltage IOH 1.95 V to 2.7 V 1.6 2.7 V to 3.6 V 2 V 1.2 V to 1.95 V VCCA × 0.35 1.95 V to 2.7 V 0.7 2.7 V to 3.6 V 0.8 0 3.6 0 VCCO 3-state 0 3.6 Low-level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature (4) (5) VCCA × 0.65 Active state High-level output current IOL (1) (2) (3) 0.8 1.2 V to 1.95 V Input voltage VO V 1.2 V –3 1.4 V to 1.6 V –6 1.65 V to 1.95 V –8 2.3 V to 2.7 V –9 3 V to 3.6 V –12 1.2 V 3 1.4 V to 1.6 V 6 1.65 V to 1.95 V 8 2.3 V to 2.7 V 9 3 V to 3.6 V 12 –40 V V V mA mA 5 ns/V 85 °C VCCI is the VCC associated with the data input port. VCCO is the VCC associated with the output port. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V. For VCCI values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V. 6.4 Thermal Information SN74AVC32T245 THERMAL METRIC (1) GKE/ZKE (LFBGA) ZRL (MICROSTAR JUNIOR) 96 PINS 96 PINS UNIT RθJA Junction-to-ambient thermal resistance 70.7 105.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 34.0 1.6 °C/W RθJB Junction-to-board thermal resistance 43.5 10.8 °C/W ψJT Junction-to-top characterization parameter 3.5 3.1 °C/W ψJB Junction-to-board characterization parameter 43.5 10.8 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 7 SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com 6.5 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) (1) PARAMETER TEST CONDITIONS IOH = –100 μA IOH = –3 mA IOH = –6 mA VOH A or B port IOZ A or B port (3) A or B port ICCA MAX VCCO – 0.2 V IOH = –9 mA 2.3 V 2.3 V 1.75 IOH = –12 mA 3V 3V 2.3 IOL = 100 μA 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.2 V 1.4 V 1.4 V 0.35 1.65 V 1.65 V 0.45 IOL = 9 mA 2.3 V 2.3 V 0.55 IOL = 12 mA 3V 3V 0.7 1.2 V to 3.6 V 1.2 V to 3.6 V 0V VI = VIL VI = VCCA or GND V 0.2 0.15 ±0.025 ±0.25 ±1 0 to 3.6 V ±0.1 ±2.5 ±5 0 to 3.6 V 0V ±0.1 ±2.5 ±5 3.6 V 3.6 V ±0.5 ±2.5 ±5 1.2 V to 3.6 V 1.2 V to 3.6 V 50 0V 3.6 V –10 3.6 V 0V 50 1.2 V to 3.6 V 1.2 V to 3.6 V 50 0V 3.6 V 50 3.6 V 0V –10 1.2 V to 3.6 V 1.2 V to 3.6 V 90 V μA μA VI or VO = 0 to 3.6 V VO = VCCO or GND, VI = VCCI or GND, OE =VIH VI = VCCI or GND, UNIT 0.95 1.2 VI = VCCI or GND, ICCA + ICCB MIN 1.05 VI = VCCI or GND, ICCB 1.2 V –40°C TO 85°C MAX 1.4 V IOL = 8 mA Ioff 1.2 V to 3.6 V 1.2 V TYP 1.65 V IOL = 6 mA II 1.2 V to 3.6 V TA = 25°C MIN 1.4 V VI = VIH IOL = 3 mA Control inputs VCCB 1.65 V IOH = –8 mA VOL VCCA (2) IO = 0 IO = 0 IO = 0 μA μA μA μA Ci Control inputs VI = 3.3 V or GND 3.3 V 3.3 V 3.5 pF Cio A or B port VO = 3.3 V or GND 3.3 V 3.3 V 7 pF (1) (2) (3) 8 VCCO is the VCC associated with the output port. VCCI is the VCC associated with the input port. For I/O ports, the parameter IOZ includes the input leakage current. Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 6.6 Switching Characteristics: VCCA = 1.2 V over recommended operating free-air temperature range, VCCA = 1.2 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V TYP TYP TYP TYP TYP 4.1 3.3 3 2.8 3.2 4.1 3.3 3 2.8 3.2 4.4 4 3.8 3.6 3.5 4.4 4 3.8 3.6 3.5 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6 4.6 4 3.4 3.2 6 4.6 4 3.4 3.2 6.6 6.6 6.6 6.6 6.8 6.6 6.6 6.6 6.6 6.8 6 4.9 4.9 4.2 5.3 6 4.9 4.9 4.2 5.3 UNIT ns ns ns ns ns ns 6.7 Switching Characteristics: VCCA = 1.5 V ± 0.1 V over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.6 0.5 6.2 0.5 5.2 0.5 4.1 0.5 3.7 3.6 0.5 6.2 0.5 5.2 0.5 4.1 0.5 3.7 3.3 0.5 6.2 0.5 5.9 0.5 5.6 0.5 5.5 3.3 0.5 6.2 0.5 5.9 0.5 5.6 0.5 5.5 4.3 1 10.1 1 10.1 1 10.1 1 10.1 4.3 1 10.1 1 10.1 1 10.1 1 10.1 5.6 1 10.1 0.5 8.1 0.5 5.9 0.5 5.2 5.6 1 10.1 0.5 8.1 0.5 5.9 0.5 5.2 4.5 1.5 9.1 1.5 9.1 1.5 9.1 1.5 9.1 4.5 1.5 9.1 1.5 9.1 1.5 9.1 1.5 9.1 5.5 1.5 8.7 1.5 7.5 1 6.5 1 6.3 5.5 1.5 8.7 1.5 7.5 1 6.5 1 6.3 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 UNIT ns ns ns ns ns ns 9 SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com 6.8 Switching Characteristics: VCCA = 1.8 V ± 0.15 V over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.4 0.5 5.9 0.5 4.8 0.5 3.7 0.5 3.3 3.4 0.5 5.9 0.5 4.8 0.5 3.7 0.5 3.3 3 0.5 5.2 0.5 4.8 0.5 4.5 0.5 4.4 3 0.5 5.2 0.5 4.8 0.5 4.5 0.5 4.4 3.4 1 7.8 1 7.8 1 7.8 1 7.8 3.4 1 7.8 1 7.8 1 7.8 1 7.8 5.4 1 9.2 0.5 7.4 0.5 5.3 0.5 4.5 5.4 1 9.2 0.5 7.4 0.5 5.3 0.5 4.5 4.2 1.5 7.7 1.5 7.7 1.5 7.7 1.5 7.7 4.2 1.5 7.7 1.5 7.7 1.5 7.7 1.5 7.7 5.2 1.5 8.4 1.5 7.1 1 5.9 1 5.7 5.2 1.5 8.4 1.5 7.1 1 5.9 1 5.7 UNIT ns ns ns ns ns ns 6.9 Switching Characteristics: VCCA = 2.5 V ± 0.2 V over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ 10 FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.2 0.5 5.6 0.5 4.5 0.5 3.3 0.5 2.8 3.2 0.5 5.6 0.5 4.5 0.5 3.3 0.5 2.8 2.6 0.5 4.1 0.5 3.7 0.5 3.3 0.5 3.2 2.6 0.5 4.1 0.5 3.7 0.5 3.3 0.5 3.2 2.5 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 2.5 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 5.2 0.5 9.4 0.5 7.3 0.5 5.1 0.5 4.5 5.2 0.5 9.4 0.5 7.3 0.5 5.1 0.5 4.5 3 1 6.1 1 6.1 1 6.1 1 6.1 3 1 6.1 1 6.1 1 6.1 1 6.1 5 1 7.9 1 6.6 1 6.1 1 5.2 5 1 7.9 1 6.6 1 6.1 1 5.2 Submit Documentation Feedback UNIT ns ns ns ns ns ns Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 6.10 Switching Characteristics: VCCA = 3.3 V ± 0.3 V over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.2 0.5 5.5 0.5 4.4 0.5 3.2 0.5 2.7 3.2 0.5 5.5 0.5 4.4 0.5 3.2 0.5 2.7 2.8 0.5 3.7 0.5 3.3 0.5 2.8 0.5 2.7 2.8 0.5 3.7 0.5 3.3 0.5 2.8 0.5 2.7 2.2 0.5 4.3 0.5 4.2 0.5 4.1 0.5 4 2.2 0.5 4.3 0.5 4.2 0.5 4.1 0.5 4 5.1 0.5 9.3 0.5 7.2 0.5 4.9 0.5 4 5.1 0.5 9.3 0.5 7.2 0.5 4.9 0.5 4 3.4 0.5 5 0.5 5 0.5 5 0.5 5 3.4 0.5 5 0.5 5 0.5 5 0.5 5 4.9 1 7.7 1 6.5 1 5.2 0.5 5 4.9 1 7.7 1 6.5 1 5.2 0.5 5 UNIT ns ns ns ns ns ns 6.11 Operating Characteristics TA = 25°C VCCA = VCCB = 1.2 V VCCA = VCCB = 1.5 V VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V VCCA = VCCB = 3.3 V TYP TYP TYP TYP TYP 1 1 1 1 2 1 1 1 1 1 13 13 14 15 16 Outputs disabled 1 1 1 1 1 Outputs enabled 13 13 14 15 16 1 1 1 1 1 1 1 1 1 2 1 1 1 1 1 PARAMETER A to B CpdA (1) B to A A to B CpdB (1) B to A (1) TEST CONDITIONS Outputs enabled Outputs disabled Outputs enabled Outputs disabled Outputs enabled CL = 0, f = 10 MHz, tr = tf = 1 ns UNIT pF CL = 0, f = 10 MHz, tr = tf = 1 ns pF Outputs disabled Power dissipation capacitance per transceiver.. Refer to the TI application report, CMOS Power Consumption and Cpd Calculation. SCAA035 Table 2. Typical Total Static Power Consumption (ICCA + ICCB) VCCB VCCA 0V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 0V 0 <1 <1 <1 <1 <1 1.2 V <1 <2 <2 <2 <2 2 1.5 V <1 <2 <2 <2 <2 2 1.8 V <1 <2 <2 <2 <2 <2 2.5 V <1 2 <2 <2 <2 <2 3.3 V <1 2 <2 <2 <2 <2 UNIT μA Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 11 SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com 6.12 Typical Characteristics 6 6 TA = 25°C VCCA = 1.2 V TA = 25°C VCCA = 1.2 V 5 tPHL − Propagation Delay − ns tPLH − Propagation Delay − ns 5 4 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 1 0 0 10 20 30 40 CL − Load Capacitance − pF 50 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 1 0 60 Figure 1. Propagation Delay vs Load Capacitance 4 0 6 TA = 25°C VCCA = 1.5 V TA = 25°C VCCA = 1.5 V tPHL − Propagation Delay − ns tPLH − Propagation Delay − ns 5 4 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 1 0 10 20 30 40 50 5 4 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 1 0 60 0 10 CL − Load Capacitance − pF 30 40 50 60 Figure 4. Typical Propagation Delay tPLH (A to B) vs Load Capacitance 6 6 TA = 25°C VCCA = 1.8 V TA = 25°C VCCA = 1.8 V 5 tPHL − Propagation Delay − ns 5 tPLH − Propagation Delay − ns 20 CL − Load Capacitance − pF Figure 3. Typical Propagation Delay tPLH (A to B) vs Load Capacitance 4 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 1 0 0 10 20 30 40 50 4 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 1 0 60 0 10 20 30 40 50 60 CL − Load Capacitance − pF CL − Load Capacitance − pF Figure 5. Typical Propagation Delay tPLH (A to B) vs Load Capacitance 12 60 Figure 2. Propagation Delay vs Load Capacitance 6 0 10 20 30 40 50 CL − Load Capacitance − pF Figure 6. Typical Propagation Delay tPLH (A to B) vs Load Capacitance Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 Typical Characteristics (continued) 6 6 TA = 25°C VCCA = 2.5 V TA = 25°C VCCA = 2.5 V tPHL − Propagation Delay − ns tPLH − Propagation Delay − ns 5 4 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 1 0 0 10 20 30 40 50 5 4 3 2 1 0 60 0 10 CL − Load Capacitance − pF 30 TA = 25°C VCCA = 3.3 V 60 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V tPHL − Propagation Delay − ns 5 4 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 1 0 10 50 6 TA = 25°C VCCA = 3.3 V 0 40 Figure 8. Typical Propagation Delay tPLH (A to B) vs Load Capacitance 5 tPLH − Propagation Delay − ns 20 CL − Load Capacitance − pF Figure 7. Typical Propagation Delay tPLH (A to B) vs Load Capacitance 6 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 20 30 40 50 4 3 2 1 0 60 0 CL − Load Capacitance − pF 10 20 30 40 50 60 CL − Load Capacitance − pF Figure 9. Typical Propagation Delay tPLH (A to B) vs Load Capacitance Figure 10. Propagation Delay vs Load Capacitance Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 13 SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com 7 Parameter Measurement Information 2 ´ VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 ´ VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 15 pF 15 pF 15 pF 15 pF 2 kW 2 kW 2 kW 2 kW 2 kW 0.1 V 0.1 V 0.15 V 0.15 V 0.3 V VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCA Output Control (low-level enabling) VCCA/2 VCCA/2 0V tPLZ tPZL VCCI Input VCCI/2 VCCI/2 0V tPLH Output tPHL VOH VCCO/2 VOL VCCO/2 VCCO Output Waveform 1 S1 at 2 ´ VCCO (see Note B) VCCO/2 VOL + VTP VOL tPHZ tPZH Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VCCO/2 VOH − VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR£ 10 MHz, ZO = 50 W, dv/dt ≥1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. t PZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. Figure 11. Load Circuit and Voltage Waveforms 14 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 8 Detailed Description 8.1 Overview The SN74AVC32T245 is a 16-bit, dual-supply noninverting bidirectional voltage level translation. Pins A and control pins (DIR and OE) are supported by VCCA and pins B are supported by VCCB. The A port can accept I/O voltages ranging from 1.2 V to 3.6 V, while the B port can accept I/O voltages from 1.2 V to 3.6 V. A high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A when OE is set to low. When OE is set to high, both A and B are in the high-impedance state. This device is fully specified for partial-power-down applications using off output current (Ioff). The VCC isolation feature ensures that if either VCC input is at GND, both ports are put in a high-impedance state. 8.2 Functional Block Diagram 1DIR A3 2DIR A4 1A1 H4 1OE A5 2A1 A2 H3 E5 E2 1B1 To Seven Other Channels 3DIR 2B1 To Seven Other Channels J3 4DIR J4 3A1 2OE T4 3OE J5 4A1 J2 T3 4OE N5 N2 3B1 To Seven Other Channels 4B1 To Seven Other Channels Logic diagram (positive logic) 8.3 Feature Description 8.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2V to 3.6V Power-Supply Range Both VCCA and VCCB can be supplied at any voltage from 1.2 V to 3.6 V which makes the device suitable for translating between any of the low voltage nodes (1.2 V, 1.8 V, 2.5 V, and 3.3 V). Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 15 SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com Feature Description (continued) 8.3.2 Partial-Power-Down Mode Operation This device is fully specified for partial-power-down applications using off output current (Ioff). The Ioff circuitry will prevent backflow current by disabling I/O output circuits when device is in partial power-down mode. 8.3.3 VCC Isolation The VCC isolation feature ensures that if either VCCA or VCCB are at GND, both ports will be in a high-impedance state (IOZ). This prevents false logic levels from being presented to either bus. 8.4 Device Functional Modes The SN74AVC32T245 is a voltage level translator that can operate from 1.2 V to 3.6 V (VCCA) and 1.2 V to 3.6 V (VCCB). The signal translation between 1.2 V and 3.6 V requires direction control and output enable control. When OE is low and DIR is high, data transmission is from A to B. When OE is low and DIR is low, data transmission is from B to A. When OE is high, both output ports will be high-impedance. Table 3. Function Table Functions (Each 8-Bit Section) INPUTS OE 16 DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The SN74AVC32T245 device can be used in level-shifting applications for interfacing devices and addressing mixed voltage incompatibility. The SN74AVC32T245 device is ideal for data transmission where direction is different for each channel. 9.2 EnableTimes Calculate the enable times for the SN74AVC32T45 using the following formulas: tPZH (DIR to A) = tPLZ tPZL (DIR to A) = tPHZ tPZH (DIR to B) = tPLZ tPZL (DIR to B) = tPHZ (DIR (DIR (DIR (DIR to to to to B) + B) + A) + A) + tPLH (B to tPHL (B to tPLH (A to tPHL (A to A) A) B) B) (1) (2) (3) (4) In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected. For example, if the SN74AVC32T245 initially is transmitting from A to B, then the DIR bit is switched; the B port of the device must be disabled before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified propagation delay. Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 17 SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com 9.3 Typical Application 1.8 V 3.3 V 0.1 µF 0.1 µF VCCA 0.1 µF VCCB 1DIR/2DIR/3DIR/4DIR 1OE/2OE/3OE/4OE 1.8-V Controller 3.3-V System SN74AVC32T245 Data 1A1/2A1/3A1/4A1 1B1/2B1/3B1/4B1 1A2/2A2/3A2/4A2 1B2/2B2/3B2/4B2 1A3/2A3/3A3/4A3 1B3/2B3/3B3/4B3 1A4/2A4/3A4/4A4 1B4/2B4/3B4/4B4 1A5/2A5/3A5/4A5 1B5/2B5/3B5/4B5 1A6/2A6/3A6/4A6 1B6/2B6/3B6/4B6 1A7/2A7/3A7/4A7 1B7/2B7/3B7/4B7 1A8/2A8/3A8/4A8 1B8/2B8/3B8/4B8 GND Data GND GND Figure 12. Application Schematic 9.3.1 Design Requirements This device uses drivers which are enabled depending on the state of the DIR pin. The designer must know the intended flow of data and take care not to violate any of the high or low logic levels. Unused data inputs must not be floating, as this can cause excessive internal leakage on the input CMOS structure. Tie any unused input and output ports directly to ground. For this design example, use the parameters listed in Table 4. Table 4. Design Parameters 18 DESIGN PARAMETER EXAMPLE VALUE Input voltage range 1.2 V to 3.6 V Output voltage range 1.2 V to 3.6 V Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 9.3.2 Detailed Design Procedure To begin the design process, determine the following: 9.3.2.1 Input Voltage Ranges Use the supply voltage of the device that is driving the SN74AVC32T245 device to determine the input voltage range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low the value must be less than the VIL of the input port. 9.3.2.2 Output Voltage Range Use the supply voltage of the device that the SN74AVC32T245 device is driving to determine the output voltage range. 9.3.3 Application Curve Input (1.2 V) Output (3.3 V) Figure 13. Translation Up (1.2 V to 3.3 V) at 2.5 MHz Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 19 SN74AVC32T245 SCES553F – MAY 2004 – REVISED JULY 2015 www.ti.com 10 Power Supply Recommendations The SN74AVC32T245 device uses two separate configurable power-supply rails, VCCA and VCCB. VCCA accepts any supply voltage from 1.2 V to 3.6 V and VCCB accepts any supply voltage from 1.2 V to 3.6 V. The A port and B port are designed to track VCCA and VCCB, respectively, allowing for low-voltage bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V and 3.3V voltage nodes. The output-enable OE input circuit is designed so that it is supplied by VCCA and when the OE input is high, all outputs are placed in the high-impedance state. To ensure the high-impedance state of the outputs during power up or power down, the OE input pin must be tied to VCCA through a pullup resistor and must not be enabled until VCCAand VCCB are fully ramped and stable. The minimum value of the pullup resistor to VCCA is determined by the current-sinking capability of the driver. 11 Layout 11.1 Layout Guidelines To • • • • ensure reliability of the device, following common printed-circuit-board layout guidelines is recommended. Bypass capacitors must be used on power supplies. Short trace lengths must be used to avoid excessive loading. Place pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of signals, depending on the system requirements. For detailed layout information, refer to 32-Bit Logic Families in LFBGA Packages SCEA014. 11.2 Layout Example Figure 14. Ground Balls Are Connected Together Within The PCB 20 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 SN74AVC32T245 www.ti.com SCES553F – MAY 2004 – REVISED JULY 2015 12 Device and Documentation Support 12.1 12.1.1 Documentation Support Related Documentation For related documentation, see the following: 32-Bit Logic Families in LFBGA Packages: 96 and 114 Ball Low-Profile Fine-Pitch BGA Packages, SCEA014. 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.3 Trademarks Widebus+, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVC32T245 21 PACKAGE OPTION ADDENDUM www.ti.com 25-Feb-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN74AVC32T245GKER ACTIVE LFBGA GKE 96 1000 TBD Call TI Call TI -40 to 85 WY245 SN74AVC32T245ZKER ACTIVE LFBGA ZKE 96 1000 TBD Call TI Call TI -40 to 85 WY245 SN74AVC32T245ZRLR ACTIVE BGA MICROSTAR JUNIOR ZRL 96 2500 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 WY245 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Feb-2015 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 2-Jul-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74AVC32T245ZRLR Package Package Pins Type Drawing BGA MI CROSTA R JUNI OR ZRL 96 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 3.8 B0 (mm) K0 (mm) P1 (mm) 8.8 1.4 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 2-Jul-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AVC32T245ZRLR BGA MICROSTAR JUNIOR ZRL 96 2500 336.6 336.6 28.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated