MTNK5S3

Spec. No. : C800S3
Issued Date : 2010.07.19
Revised Date : 2013.09.09
Page No. : 1/8
CYStech Electronics Corp.
ESD protected N-Channel Enhancement Mode MOSFET
MTNK5S3
BVDSS
ID
RDSON(MAX)
30V
100mA
8Ω
Description
• Low voltage drive(2.5V drive) makes this device ideal for portable equipment.
• High speed switching
• ESD protected device
• Pb-free lead plating & halogen-free package
Symbol
Outline
MTNK5S3
SOT-323
D
G
G：Gate
S：Source
D：Drain
G
S
S
Ordering Information
Device
MTNK5S3-0-T1-G
MTNK5S3
Package
SOT-323
(Pb-free lead plating & halogen-free package)
Shipping
3000 pcs / Tape & Reel
CYStek Product Specification
Spec. No. : C800S3
Issued Date : 2010.07.19
Revised Date : 2013.09.09
Page No. : 2/8
CYStech Electronics Corp.
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
BVDSS
Drain-Source Voltage
Gate-Source Voltage
Drain Current
Reverse Drain Current
Continuous
Pulsed
Continuous
Pulsed
Total Power Dissipation
ESD susceptibility
Operating Junction and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient
Limits
30
±20
±100
±200
±100
±200
200
750
-55~+150
556
VGS
ID
IDP
IDR
IDRP
PD
Tj ; Tstg
Rth,ja
*1
*1
*2
*3
Unit
V
V
mA
mA
mA
mA
mW
V
°C
°C/W
Note : *1. Pulse Width ≤ 10μs, Duty cycle ≤1%
*2. With each pin mounted on the recommended lands.
*3. Human body model, 1.5kΩ in series with 100pF
Electrical Characteristics (Ta=25°C)
Symbol
Static
BVDSS
VGS(th)
IGSS
IDSS
RDS(ON)
Min.
Typ.
Max.
Unit
30
0.8
20
1.3
3.4
6.9
50
1.5
±1
100
8
13
-
V
V
μA
nA
12.5
7.3
3.5
15
35
75
75
-
0.88
1.2
GFS
Dynamic
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Source-Drain Diode
*VSD
-
Test Conditions
mS
VGS=0, ID=100μA
VDS=3V, ID=100μA
VGS=±20V, VDS=0
VDS=30V, VGS=0
VGS=4V, ID=10mA
VGS=2.5V, ID=1mA
VDS=3V, ID=10mA
pF
VDS=5V, VGS=0, f=1MHz
ns
VDD≒5V, ID=10mA, VGS=5V, RL=500Ω,
RG=10Ω
V
VGS=0V, IS=100mA
Ω
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
MTNK5S3
CYStek Product Specification
Spec. No. : C800S3
Issued Date : 2010.07.19
Revised Date : 2013.09.09
Page No. : 3/8
CYStech Electronics Corp.
Typical Characteristics
Gate Threshold Voltage vs Channel Temperature
Typical Output Characteristics
2
0.15
3.5V
3V
TA=25°C
Gate Threshold Voltage---VGS(th)(V)
Drain Current --- I D(A)
4V
0.1
2.5V
0.05
2V
1.5
1
0.5
VGS=1.5V
0
0
0
-50
4
1
2
3
Drain-Source Voltage ---VDS(V)
25°C
150
VGS=4V
VDS=3V
75°C
Static Drain-Source On-state
Resistance(Ω)
Drain Current ---I D(mA)
125
5
200
150
125°C
100
50
0
4
ID=100mA
3
ID=50mA
2
0
1
2
3
Gate-Source Voltage---VGS(V)
-50
4
-25
0
25
50
75
100
125
150
Channel Temperature---Tch(°C)
Static Drain-Source On-State resistance vs Drain Current
Static Drain-Source On-State resistance vs Drain Current
10
10
9
Static Drain-Source On-State Resistance--RDS(on) (Ω)
Static Drain-Source On-State Resistance--RDS(on)(Ω)
0
25
50
75
100
Channel Temperature---Tch(°C)
Static Drain-Source On-state Resistance with Temperature
Typical Transfer Characteristics
TA=25°C
8
VGS=2.5V
7
6
5
4
3
VGS=4V
2
1
TA=125°C
9
8
7
VGS=2.5V
6
5
4
VGS=4V
3
2
1
1
MTNK5S3
-25
10
100
Drain Current---I D(mA)
1000
1
10
100
Drain Current---ID(mA)
1000
CYStek Product Specification
Spec. No. : C800S3
Issued Date : 2010.07.19
Revised Date : 2013.09.09
Page No. : 4/8
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Static Drain-Source On-State Resistance vs Drain Current
Static Drain-Source On-State Resistance vs Drain Current
10
VGS=4V
Static Drain-Source On-State ResistanceRDS(ON) (Ω)
Static Drain-Source On-State ResistanceRDS(ON) (Ω)
100
VGS=2.5V
Ta=25°C
Ta=75°C
10
Ta=125°C
Ta=25°C
Ta=75°C
1
1
1
10
100
Drain Current---I D(mA)
1
1000
9
9
ID=50mA
8
Static Drain-Source On-State
Resistance---RDS(ON) (Ω)
Static Drain-Source On-State
Resistance---RDS(ON) (Ω)
1000
10
10
7
6
TA=75°C
5
4
TA=125°C
3
2
TA=25°C
1
ID=100mA
8
7
6
5
TA=75°C
4
TA=125°C
3
2
TA=25°C
1
0
0
0
2
4
6
8
Gate-Source Voltage---VGS(V)
0
10
Reverse Drain Current vs Source-Drain Voltage(I)
2
4
6
8
Gate-Source Voltage---VGS(V)
10
Reverse Drain Current vs Source-Drain Voltage(II)
1000
1000
Reverse Drain Current-I DR(mA)
Reverse Drain Current-I DR(mA)
10
100
Drain Current---ID(mA)
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
100
TA=125°C
TA=25°C
10
TA=75°C
1
100
VGS=4V
VGS=0V
10
1
0.1
0.1
0
MTNK5S3
Ta=125°C
0.5
1
Source-Drain Voltage-VSD(V)
1.5
0
0.5
1
Source-Drain Voltage-VSD(V)
1.5
CYStek Product Specification
Spec. No. : C800S3
Issued Date : 2010.07.19
Revised Date : 2013.09.09
Page No. : 5/8
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Foreward Transfer Admittance vs Drain Current
Capacitance vs Drain-to-Source Voltage
1000
Forward Transfer Admittance--YFS(mS)
Capacitance---(pF)
100
Ciss
10
C oss
Crss
1
Ta=25°C
100
Ta=75°C
Ta=125°C
10
1
0
MTNK5S3
VDS=3V
10
20
Drain-Source Voltage---VDS(V)
30
1
10
100
Drain Current---ID(mA)
1000
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C800S3
Issued Date : 2010.07.19
Revised Date : 2013.09.09
Page No. : 6/8
Reel Dimension
Carrier Tape Dimension
MTNK5S3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C800S3
Issued Date : 2010.07.19
Revised Date : 2013.09.09
Page No. : 7/8
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTNK5S3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C800S3
Issued Date : 2010.07.19
Revised Date : 2013.09.09
Page No. : 8/8
SOT-323 Dimension
Device Code
TE
KN
xx
Marking:
Date Code
3-Lead SOT-323 Plastic
Surface Mounted Package
CYStek Package Code: S3
Style: Pin 1.Gate 2.Source 3.Drain
Millimeters
Min.
Max.
0.900
1.100
0.000
0.100
0.900
1.000
0.200
0.400
0.080
0.150
2.000
2.200
1.150
1.350
DIM
A
A1
A2
b
c
D
E
Inches
Min.
Max.
0.035
0.043
0.000
0.004
0.035
0.039
0.008
0.016
0.003
0.006
0.079
0.087
0.045
0.053
DIM
E1
e
e1
L
L1
θ
Millimeters
Min.
Max.
2.150
2.450
0.650 TYP
1.200
1.400
0.525 REF
0.260
0.460
0°
8°
Inches
Min.
Max.
0.085
0.096
0.026 TYP
0.047
0.055
0.021 REF
0.010
0.018
0°
8°
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTNK5S3
CYStek Product Specification