VNQ5E050AK-E - STMicroelectronics

VNQ5E050AK-E
Quad channel high-side driver with analog current sense
for automotive applications
Features
Max supply voltage
VCC
41 V
Operating voltage range
VCC
4.5 to 28 V
Max on-state resistance (per ch.) RON
50 m
Current limitation (typ)
ILIMH
27 A
Off-state supply current
IS
2 µA(1)
PowerSSO-24
– Reverse battery protected
– Electrostatic discharge protection
1. Typical value with all loads connected.
■
■
■
General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliance with European directive
2002/95/EC
– Very low current sense leakage
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off-state open-load detection
– Output short to VCC detection
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Overtemperature shutdown with auto
restart (thermal shutdown)
September 2013
Application
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
Description
The VNQ5E050AK-E is a quad channel high-side
driver manufactured using ST proprietary
VIPower™ M0-5 technology and housed in
PowerSSO-24 package. The device is designed
to drive 12 V automotive grounded loads, and to
provide protection and diagnostics. It also
implements a 3 V and 5 V CMOS compatible
interface for the use with any microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with
auto-restart and overvoltage active clamp.
A dedicated analog current sense pin is
associated with every output channel providing
enhanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication,
overtemperature indication, short-circuit to VCC
diagnosis and on-state and off-state open-load
detection. The current sensing and diagnostic
feedback of the whole device can be disabled by
pulling the CS_DIS pin high to share external
sense resistor with similar devices.
Doc ID 13519 Rev 7
1/37
www.st.com
1
Contents
VNQ5E050AK-E
Contents
1
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
3.1.2
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1
3.5
4
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 28
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1
5
Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 27
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1
ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
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VNQ5E050AK-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Switching (VCC = 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Open-load detection (8V<VCC<18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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List of figures
VNQ5E050AK-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/37
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of output current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Tj evolution in overload or short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28
PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 29
PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 30
Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30
PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Doc ID 13519 Rev 7
VNQ5E050AK-E
Block diagram and pin configuration
Figure 1.
Block diagram
VCC
Signal Clamp
Undervoltage
IN1
Control & Diagnostic 1
Power
Clamp
CONTROL & DIAGNOSTIC
Channels 2, 3 & 4
1
Block diagram and pin configuration
DRIVER
IN2
VON
Limitation
CH 1
IN3
Over
temp.
IN4
Current
Limitation
OFF State
Open load
CS_
DIS
VSENSEH
CS1
Current
Sense
CH 4
CH 3
OUT4
OUT3
CH 2
CS2
OUT2
OUT1
CS3
LOGIC
CS4
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
GND
Table 1.
Pin functions
Name
VCC
OUTPUTn
GND
INPUTn
CURRENT
SENSEn
CS_DIS
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
Analog current sense pin, delivers a current proportional to the load current.
Active high CMOS compatible pin, to disable the current sense pin.
Doc ID 13519 Rev 7
5/37
Block diagram and pin configuration
Figure 2.
VNQ5E050AK-E
Configuration diagram (top view)
VCC
OUTPUT1
GND
OUTPUT1
INPUT1
OUTPUT1
CURRENT SENSE1
OUTPUT2
INPUT2
OUTPUT2
CURRENT SENSE2
OUTPUT2
INPUT3
OUTPUT3
CURRENT SENSE3
OUTPUT3
INPUT4
OUTPUT3
CURRENT SENSE4
OUTPUT4
CS_DIS.
OUTPUT4
VCC
OUTPUT4
TAB = VCC
Table 2.
6/37
Suggested connections for unused and not connected pins
Connection / pin
Current sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
X
To ground
Through 1 k
resistor
X
Through 22 k
resistor
Through 10 k
resistor
Through 10 k
resistor
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VNQ5E050AK-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
VFn
IOUTn
ICSD
VCC
OUTPUTn
CS_DIS
VOUTn
ISENSEn
IINn
VCSD
CURRENT
SENSEn
INPUTn
VSENSEn
GND
VINn
IGND
Note:
VFn = VOUTn - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions reported in this section for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
-IGND
DC reverse ground pin current
200
mA
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
20
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC - 41 to
+VCC
V
IIN
ICSD
-ICSENSE
DC reverse CS pin current
VCSENSE
Current sense maximum voltage
Doc ID 13519 Rev 7
7/37
Electrical specifications
Table 3.
VNQ5E050AK-E
Absolute maximum ratings (continued)
Symbol
Unit
104
mJ
Maximum switching energy (single pulse)
(L = 3 mH; RL = 0 ; Vbat = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.))
VESD
Electrostatic discharge
(human body model: R = 1.5 K C = 100 pF)
– Input
– Current sense
– CS_DIS
– Output
– VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tstg
Thermal data
Table 4.
Thermal data
Symbol
2.3
Value
EMAX
Tj
2.2
Parameter
Parameter
Rthj-case
Thermal resistance junction-case (with one channel ON)
Rthj-amb
Thermal resistance junction-ambient
Max. value
Unit
2.8
°C/W
See Figure 36
°C/W
Electrical characteristics
Values specified in this section are for 8 V < VCC < 28 V, -40 °C < Tj < 150 °C, unless
otherwise stated.
Table 5.
Symbol
Parameter
VCC
Operating supply voltage
4.5
13
28
V
VUSD
Undervoltage shutdown
2.5
3.5
4.5
V
VUSDhyst
Undervoltage shutdown
hysteresis
RON
Vclamp
8/37
Power section
On-state resistance
Clamp voltage
Test conditions
(1)
Min. Typ. Max.
0.5
V
IOUT = 2 A; Tj = 25 °C
50
IOUT = 2 A; Tj = 150 °C
100
IOUT = 2 A; VCC = 5 V; Tj = 25 °C
65
IS = 20 mA
Doc ID 13519 Rev 7
41
46
Unit
52
m
V
VNQ5E050AK-E
Electrical specifications
Table 5.
Power section (continued)
Symbol
IS
IL(off)
VF
Parameter
Supply current
Test conditions
Min. Typ. Max.
Unit
Off-state; VCC = 13 V; Tj = 25 °C;
VIN = VOUT = VSENSE = VCSD = 0 V
2(2)
5(2)
µA
8
14
mA
0.01
3
On-state; VCC = 13 V; VIN = 5 V;
IOUT = 0 A
Off-state output current (1)
Output - VCC diode
voltage(1)
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C
0
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C
0
µA
5
-IOUT = 2 A; Tj = 150 °C
0.7
V
1. For each channel
2. PowerMOS leakage included.
Table 6.
Symbol
Switching (VCC = 13 V; Tj = 25 °C)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 6.5  (see Figure 6.)
20
µs
td(off)
Turn-off delay time
RL = 6.5  (see Figure 6.)
35
µs
(dVOUT/dt)on Turn-on voltage slope RL = 6.5 
See
Figure 26
Vµs
(dVOUT/dt)off Turn-off voltage slope RL = 6.5 
See
Figure 28
Vµs
WON
Switching energy
losses during twon
RL = 6.5 (see Figure 6.)
0.15
mJ
WOFF
Switching energy
losses during twoff
RL = 6.5 (see Figure 6.)
0.25
mJ
Table 7.
Symbol
Logic inputs
Parameter
Test conditions
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
VIN = 0.9 V
CS_DIS low level voltage
ICSDL
Low level CS_DIS current
VCSDH
CS_DIS high level voltage
Max.
Unit
0.9
V
1
µA
2.1
V
10
0.25
7
V
-0.7
0.9
VCSD = 0.9 V
Doc ID 13519 Rev 7
µA
V
5.5
IIN = -1 mA
VCSDL
Typ.
VIN = 2.1 V
IIN = 1 mA
Input clamp voltage
Min.
V
1
µA
2.1
V
9/37
Electrical specifications
Table 7.
Symbol
ICSDH
VNQ5E050AK-E
Logic inputs (continued)
Parameter
Test conditions
High level CS_DIS current
Min.
VCSD = 2.1 V
VCSD(hyst) CS_DIS hysteresis voltage
VCSCL
Table 8.
Symbol
CS_DIS clamp voltage
ICSD = 1 mA
10
µA
7
V
-0.7
Protections and diagnostics (1)
Parameter
Test conditions
VCC = 13 V
IlimL
Short circuit current
VCC = 13 V; TR < Tj < TTSD
during thermal cycling
TTSD
Shutdown
temperature
TR
Reset temperature
TRS
Thermal reset of
STATUS
VON
Unit
V
5.5
ICSD = -1 mA
DC short circuit
current
VDEMAG
Max.
0.25
IlimH
THYST
Typ.
Min.
Typ.
Max.
Unit
19
27
38
A
38
A
5 V < VCC < 28 V
7
150
175
TRS + 1
TRS + 5
200
°C
7
Turn-off output voltage IOUT = 2 A; VIN = 0;
clamp
L = 6 mH
IOUT = 0.1 A;
Tj = -40 °C...150 °C
(see Figure 8)
VCC-41
°C
°C
135
Thermal hysteresis
(TTSD-TR)
Output voltage drop
limitation
A
VCC-46
°C
VCC-52
25
V
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Table 9.
Symbol
K0
K1
dK1/K1(1)
10/37
Current sense (8 V < VCC < 18 V)
Parameter
Test conditions
IOUT/ISENSE
IOUT = 0.05 A;
VSENSE = 0.5 V; VCSD = 0 V;
Tj = -40 °C...150 °C
IOUT/ISENSE
IOUT = 1 A;
VSENSE = 4V; VCSD = 0 V;
Tj = -40 °C...150 °C
Tj = 25 °C...150 °C
Current sense ratio
drift
IOUT = 1 A; VSENSE = 4 V;
VCSD = 0 V;
Tj = -40 °C to 150 °C
Doc ID 13519 Rev 7
Min. Typ. Max. Unit
1050 2110 3170
1510 1890 2650
1510 1890 2270
-13
13
%
VNQ5E050AK-E
Electrical specifications
Table 9.
Symbol
K2
dK2/K2
(1)
K3
dK3/K3(1)
ISENSE0
Current sense (8 V < VCC < 18 V) (continued)
Parameter
Test conditions
Min. Typ. Max. Unit
IOUT/ISENSE
IOUT = 2 A;
VSENSE = 4 V; VCSD = 0 V;
Tj = -40 °C...150 °C
Tj = 25 °C...150 °C
Current sense ratio
drift
IOUT = 2 A; VSENSE = 4 V;
VCSD = 0 V;
Tj = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 4 A;
VSENSE = 4 V; VCSD = 0 V;
Tj = -40 °C...150 °C
Tj = 25 °C...150 °C
Current sense ratio
drift
IOUT = 4 A; VSENSE = 4 V;
VCSD = 0 V;
Tj = -40 °C to 150 °C
-6
6
IOUT = 0 A; VSENSE = 0 V;
VCSD = 5 V; VIN = 0 V;
Tj = -40 °C...150 °C
0
1
IOUT = 0 A; VSENSE = 0 V;
VCSD = 0 V; VIN = 5 V;
Tj = -40 °C...150 °C
0
2
IOUT = 2 A; VSENSE = 0 V;
VCSD = 5 V; VIN = 5 V;
Tj = -40 °C...150 °C
0
1
20
Analog sense
leakage current
1600 1800 2230
1600 1800 2000
-8
8
%
1620 1770 1990
1620 1770 1920
%
µA
IOL
Open-load on-state
current detection
threshold
VIN = 5 V; 8 V < VCC < 18 V;
ISENSE = 5 µA
4
VSENSE
Max analog sense
output voltage
IOUT = 4 A; VCSD = 0 V
5
VSENSEH
Analog sense output
voltage in fault
condition(2)
VCC = 13 V; RSENSE = 10 K
8
V
ISENSEH
Analog sense output
current in fault
condition(2)
VCC = 13 V; VSENSE = 5 V
9
mA
Delay response time
tDSENSE1H from falling edge of
CS_DIS pin
VSENSE < 4 V, 0.5 A < IOUT < 4 A
ISENSE = 90 % of ISENSEMAX
(see Figure 4)
40
100
µs
Delay response time
tDSENSE1L from rising edge of
CS_DIS pin
VSENSE < 4 V; 0.5 A < IOUT < 4 A
ISENSE = 10 % of ISENSEMAX
(see Figure 4)
5
20
µs
Delay response time
tDSENSE2H from rising edge of
INPUT pin
VSENSE < 4 V, 0.5 A < IOUT < 4 A
ISENSE = 90 % of ISENSEMAX
(see Figure 4)
80
250
µs
Doc ID 13519 Rev 7
mA
V
11/37
Electrical specifications
Table 9.
Symbol
VNQ5E050AK-E
Current sense (8 V < VCC < 18 V) (continued)
Parameter
Test conditions
Min. Typ. Max. Unit
Delay response time
between rising edge
tDSENSE2H of output current and
rising edge of current
sense
VSENSE < 4 V,
ISENSE = 90 % of ISENSEMAX,
IOUT = 90 % of IOUTMAX
IOUTMAX = 2 A (see Figure 7)
Delay response time
tDSENSE2L from falling edge of
INPUT pin
VSENSE < 4 V, 0.5 A < IOUT < 4 A
ISENSE = 10 % of ISENSEMAX
(see Figure 4)
80
60
µs
250
µs
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open-load off-state detection.
Table 10.
Open-load detection (8V<VCC<18V)
Symbol
Parameter
Test conditions
Open-load off-state voltage
detection threshold
VIN = 0 V
tDSTKON
Output short circuit to Vcc
detection delay at turn-off
See Figure 5
IL(off2)r
Off-state output current at
VOUT = 4 V
IL(off2)f
td_vol
VOL
Figure 4.
Min.
Typ.
2
See
Figure 5
4
V
180
1200
µs
VIN = 0 V; VSENSE = 0 V;
VOUT rising from 0 V to 4 V
-120
0
µA
Off-state output current at
VOUT = 2 V
VIN = 0 V;
VSENSE = VSENSEH
VOUT falling from VCC to 2 V
-50
90
µA
Delay response from output
rising edge to VSENSE rising
edge in open-load
VOUT = 4 V; VIN = 0 V
VSENSE = 90 % of VSENSEH
20
µs
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
12/37
Max. Unit
tDSENSE1L
Doc ID 13519 Rev 7
tDSENSE1H
tDSENSE2L
VNQ5E050AK-E
Figure 5.
Electrical specifications
Open-load off-state delay timing
OUTPUT STUCK TO VCC
VIN
VOUT > VOL
VSENSEH
VCS
tDSTKON
Figure 6.
Switching characteristics
VOUT
tWon
tWoff
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
INPUT
td(on)
td(off)
t
Doc ID 13519 Rev 7
13/37
Electrical specifications
Figure 7.
VNQ5E050AK-E
Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
VIN
tDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
Figure 8.
Output voltage drop limitation
VCC-VOUT
Tj = 150 °C T = 25 °C
j
Tj = -40 °C
VON
VON/RON(T)
14/37
Doc ID 13519 Rev 7
IOUT
VNQ5E050AK-E
Electrical specifications
Figure 9.
IOUT/ISENSE vs IOUT
Iout / Isense
2800
2600
max Tj = -40 °C to 150 °C
2400
max Tj = 25 °C to 150 °C
2200
2000
typical value
1800
1600
min Tj = 25 °C to 150 °C = min Tj = -40 °C to 150 °C
1400
1200
1
1,5
2
2,5
3
3,5
4
IOUT (A)
Figure 10. Maximum current sense ratio drift vs load current
dk/k(%)
20
15
10
5
0
-5
-10
-15
-20
1
Note:
2
IOUT (A)
3
4
Parameter guaranteed by design; it is not tested.
Doc ID 13519 Rev 7
15/37
Electrical specifications
Table 11.
VNQ5E050AK-E
Truth table
Input
Output
Sense (VCSD = 0 V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND
(power limitation)
L
H
L
L
0
VSENSEH
Open-load off-state
(with external pull-up)
L
H
VSENSEH
Short circuit to VCC
(external pull-up
disconnected)
L
H
H
H
VSENSEH
< Nominal
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
16/37
Doc ID 13519 Rev 7
VNQ5E050AK-E
Electrical specifications
Table 12.
ISO 7637-2:
2004(E)
Test pulse
Electrical transient requirements (part 1)
Test levels(1)
III
IV
1
-75V
-100V
2a
+37V
3a
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
impedance
Min.
Max.
5000 pulses
0.5s
5s
2 ms, 10
+50V
5000 pulses
0.2s
5s
50µs, 2
-100V
-150V
1h
90ms
100ms
0.1µs, 50
3b
+75V
+100V
1h
90ms
100ms
0.1µs, 50
4
-6V
-7V
1 pulse
100ms, 0.01
+65V
+87V
1 pulse
400ms, 2
5b
(2)
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13.
Electrical transient requirements (part 2)
ISO 7637-2:
2004E
Test pulse
III
VI
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
C
C
(1)
5b
Test level results
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14.
Class
Electrical transient requirements (part 3)
Contents
C
All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 13519 Rev 7
17/37
Electrical specifications
2.4
VNQ5E050AK-E
Waveforms
Figure 11. Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 12. Overload or short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
18/37
Doc ID 13519 Rev 7
VNQ5E050AK-E
Electrical specifications
Figure 13. Intermittent overload
Intermittent Overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH>
VSENSE
VCS_DIS
Figure 14. Off-state open-load with external circuitry
OFF-State Open Load
with external circutry
INPUT
VOUT > VOL
VOUT
VOL
IOUT
VSENSEH >
tDSTK(on)
VSENSE
VCS_DIS
Doc ID 13519 Rev 7
19/37
Electrical specifications
VNQ5E050AK-E
Figure 15. Short to VCC
Short to VCC
Resistive
Short to VCC
Hard
Short to VCC
VOUT > VOL
VOL
VOUT
IOUT
tDSTK(on)
tDSTK(on)
VCS_DIS
Figure 16. Tj evolution in overload or short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
20/37
Doc ID 13519 Rev 7
VNQ5E050AK-E
2.5
Electrical specifications
Electrical characteristics curves
Figure 17. Off-state output current
Figure 18. High level input current
Iloff (nA)
Iih (µA)
5
700
4,5
600
Vin=2.1V
Off State
Vcc=13V
Vin=Vout=0V
500
4
3,5
3
400
2,5
300
2
1,5
200
1
100
0,5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
100
125
150
175
Tc (°C)
Figure 19. Input clamp voltage
Figure 20. Input low level
Vicl (V)
Vil (V)
7
2
6,8
1,8
lin=1mA
6,6
1,6
6,4
1,4
6,2
1,2
6
1
5,8
0,8
5,6
0,6
5,4
0,4
5,2
0,2
5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
Tc (°C)
Figure 21. Input high level
Figure 22. Input hysteresis voltage
Vih (V)
Vihyst (V)
4
1
0,9
3,5
0,8
3
0,7
2,5
0,6
2
0,5
0,4
1,5
0,3
1
0,2
0,5
0,1
0
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Doc ID 13519 Rev 7
21/37
Electrical specifications
VNQ5E050AK-E
Figure 23. On-state resistance vs Tcase
Figure 24. On-state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
150
100
Iout= 2A
Vcc=13V
120
Tc=150°C
80
Tc=125°C
90
60
60
40
30
20
Tc=25°C
Tc=-40°C
0
0
-50
-25
0
25
50
75
100
125
150
175
0
5
10
15
Tc (°C)
20
25
30
35
40
150
175
150
175
Vcc (V)
Figure 25. Undervoltage shutdown
Figure 26. Turn-on voltage slope
Vusd (V)
(dVout/dt )On (V/ms)
16
1000
900
14
Vcc=13V
RI=6.5 Ohm
800
12
700
10
600
8
500
400
6
300
4
200
2
100
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
Tc (°C)
Figure 27. ILIMH vs Tcase
Figure 28. Turn-off voltage slope
Ilimh (A)
(dVout/dt )Off (V/ms)
40
600
550
35
Vcc=13V
RI= 6.5 Ohm
500
Vcc=13V
450
30
400
350
300
25
250
20
200
150
15
100
50
10
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
22/37
-50
-25
0
25
50
75
Tc (°C)
Doc ID 13519 Rev 7
100
125
VNQ5E050AK-E
Electrical specifications
Figure 29. CS_DIS high level voltage
Figure 30. CS_DIS clamp voltage
Vcsdh (V)
Vcsdcl(V)
4
10
9
3,5
Iin = 1 mA
8
3
7
2,5
6
2
5
4
1,5
3
1
2
0,5
1
0
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Figure 31. CS_DIS low level voltage
Vcsdl (V)
3
2,5
2
1,5
1
0,5
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Doc ID 13519 Rev 7
23/37
Application information
3
VNQ5E050AK-E
Application information
Figure 32. Application schematic
+5V
VCC
Rprot
CS_DIS
Dld
CU
Rprot
IINPUT
OUTPUT
Rprot
CURRENT SENSE
GND
RSENSE
Cext
VGND
RGND
DGND
Note:
Channel 2, 3, 4 have the same internal circuit as channel 1.
3.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND  600 mV / (IS(on)max).
2.
RGND VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power Dissipation in RGND (when VCC < 0: during reverse battery situations) is:
Equation 1
PD = (-VCC)2/RGND
24/37
Doc ID 13519 Rev 7
VNQ5E050AK-E
Application information
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are on in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Section 3.1.2: Solution 2: diode (DGND) in the
ground line.
3.1.2
Solution 2: diode (DGND) in the ground line
A resistor (RGND = 1 kshould be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the microcontroller I/O pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 2
-VCCpeak/Ilatchup  Rprot  (VOHC - VIH - VGND) / IIHmax
Calculation example:
For VCCpeak = -100 V and Ilatchup  20 mA; VOHC  4.5 V
5 k  Rprot  180 k.
Recommended values: Rprot = 10 kCEXT = 10 nF.
Doc ID 13519 Rev 7
25/37
Application information
3.4
VNQ5E050AK-E
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a known ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Truth table):
–
Power limitation activation
–
Overtemperature
–
Short to VCC in off-state
–
Open-load in off-state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
VPU
VBAT
VCC
Main MOSn
41V
PU_CMD
Overtemperature
IOUT/KX
RPU
+
OL OFF
ISENSEH
VOL
Pwr_Lim
CS_DIS
OUTn
ILoff2r
ILoff2f
INPUTn
VSENSEH
CURRENT
SENSEn
RPROT
To uC ADC
26/37
RSENSE
GND
Load
RPD
VSENSE
Doc ID 13519 Rev 7
VNQ5E050AK-E
3.4.1
Application information
Short to VCC and off-state open-load detection
Short to VCC
A short circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device off-state. Small or no current is delivered by the current sense
during the on-state depending on the nature of the short circuit.
Off-state open-load with external circuitry
Detection of an open-load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module standby mode in order to avoid the
overall standby current consumption to increase in normal conditions, i.e. when load is
connected.
An external pull down resistor RPD connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and
diagnostic).
RPD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external
circuitry:
Equation 3
VOUT
Pull  up _ OFF
 RPD  I L ( off 2) f  VOL min  2V
RPD 22Kis recommended.
For proper open-load detection in off-state, the external pull-up resistor must be selected
according to the following formula:
Equation 4
VOUT
Pull  up _ ON

RPD  VPU  RPU  RPD  I L ( off 2) r
RPU  RPD
 VOL max  4V
For the values of VOLmin,VOLmax, IL(off2)r and IL(off2)f see Table 10: Open-load detection
(8V<VCC<18V).
Doc ID 13519 Rev 7
27/37
Application information
3.5
VNQ5E050AK-E
Maximum demagnetization energy (VCC = 13.5 V)
Figure 34. Maximum turn-off current versus inductance (for each channel)
100
A
B
C
I (A)
10
1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
28/37
Doc ID 13519 Rev 7
VNQ5E050AK-E
Package and PC board thermal data
4
Package and PC board thermal data
4.1
PowerSSO-24 thermal data
Figure 35. PowerSSO-24 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and back
side), Copper areas: from minimum pad lay-out to 8 cm2).
Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel ON)
RTHj_amb(°C/W)
55
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
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Package and PC board thermal data
VNQ5E050AK-E
Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON)
ZTH (°C/W)
1000
100
Footprint
2 cm2
8 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
10
100
1000
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24
Note:
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The fitting model is a simplified thermal tool and is valid for transient evolutions where the
embedded protections (power limitation or thermal cycling during thermal shutdown) are not
triggered.
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VNQ5E050AK-E
Package and PC board thermal data
Equation 5: pulse calculation formula
Z TH = R TH   + Z THtp  1 –  
where  = tP/T
Table 15.
Thermal parameters
Area/island (cm2)
Footprint
R1 = R7 = R9 = R11 (°C/W)
0.4
R2 = R8 = R10 = R12 (°C/W)
2
R3 (°C/W)
6
R4 (°C/W)
7.7
R5 (°C/W)
2
8
9
9
8
R6 (°C/W)
28
17
10
C1 = C7 = C9 = C11 (W.s/°C)
0.001
C2 = C8 = C10 = C12 (W.s/°C)
0.0022
C3 (W.s/°C)
0.025
C4 (W.s/°C)
0.75
C5 (W.s/°C)
1
4
9
C6 (W.s/°C)
2.2
5
17
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Package and packing information
VNQ5E050AK-E
5
Package and packing information
5.1
ECOPACK®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
PowerSSO-24 mechanical data
Figure 39. PowerSSO-24 package dimensions
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VNQ5E050AK-E
Package and packing information
Table 16.
PowerSSO-24 mechanical data
Millimeters
Symbol
Min.
Typ.
A
Max.
2.45
A2
2.15
2.35
a1
0
0.1
b
0.33
0.51
c
0.23
0.32
D
10.10
10.50
E
7.40
7.60
e
0.8
e3
8.8
F
2.3
G
H
0.1
10.1
10.5
h
0.4
k
0°
8°
L
0.55
0.85
O
1.2
Q
0.8
S
2.9
T
3.65
U
1.0
N
10°
X
4.1
4.7
Y
6.5
7.1
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Package and packing information
5.3
VNQ5E050AK-E
Packing information
Figure 40. PowerSSO-24 tube shipment (no suffix)
C
Base q.ty
Bulk q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
B
49
1225
532
3.5
13.8
0.6
All dimensions are in mm.
A
Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”)
Reel dimensions
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape hole spacing
Component spacing
Hole diameter
Hole diameter
Hole position
Compartment depth
Hole spacing
W
P0 (± 0.1)
P
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
24
4
12
1.55
1.5
11.5
2.85
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components Components
500mm min
No components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
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6
Order codes
Order codes
Table 17.
Device summary
Order codes
Package
PowerSSO-24
Tube
Tape and reel
VNQ5E050AK-E
VNQ5E050AKTR-E
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Revision history
7
VNQ5E050AK-E
Revision history
Table 18.
36/37
Document revision history
Date
Revision
Changes
06-Jun-2007
1
Initial release.
27-Mar-2008
2
Updated Table 9: Current sense (8 V < VCC < 18 V):
– added dk1/k1, dk2/k2, dk3/k3 parameters
– changed tDSENSE2H max value from 300 µs to 250 µs
Updated Table 10: Open-load detection (8V<VCC<18V):
– added IL(off2)r, IL(off2)f and td_vol parameters
Added Figure 9.: IOUT/ISENSE vs IOUT.
Added Figure 10.: Maximum current sense ratio drift vs load current
Added Section 2.4: Waveforms.
Added Section 2.5: Electrical characteristics curves.
Updated Section 3: Application information:
– added Section 3.4: Current sense and diagnostic
Updated Section 4: Package and PC board thermal data:
– added Figure 37.: PowerSSO-24 thermal impedance junction
ambient single pulse (one channel ON)
– added Table 15: Thermal parameters.
17-Mar-2009
3
Changed Table 16: PowerSSO-24 mechanical data
22-Jun-2009
4
Table 16: PowerSSO-24 mechanical data:
– Changed L (min) value from 6 to 0.55
– Changed L (max) value from 1 to 0.85
22-Jul-2009
5
Updated Figure 39: PowerSSO-24 package dimensions.
26-Oct-2010
6
Table 5: Power section:
– VUSD: updated minimum value
20-Sep-2013
7
Updated Disclaimer
Doc ID 13519 Rev 7
VNQ5E050AK-E
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