STMICROELECTRONICS VND5E025BKTR-E

VND5E025BK-E
Double channel high-side driver with analog current sense
for automotive applications
Features
Max transient supply voltage
VCC
41 V
Operating voltage range
VCC
4.5 to 28 V
Max on-state resistance (per ch.)
RON
25 mΩ
Current limitation (typ)
ILIMH
60 A
Off-state supply current
IS
2 µA(1)
PowerSSO-24
■
All types of resistive, inductive and capacitive
loads and suitable as LED driver
1. Typical value with all loads connected.
Description
■
General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0V CMOS compatible inputs
■
Diagnostic functions
– High current sense precision for wide
currents range
– Current sense ratio drift for single point
calibration
– Current sense disable
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
■
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection
Applications
■
The VND5E025BK-E is a double channel highside driver manufactured in the ST proprietary
VIPower™ M0-5 technology and housed in the
tiny PowerSSO-24 package. The VND5E025BK-E
is designed to drive 12V automotive grounded
loads delivering protection, diagnostics and easy
3V and 5V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto
restart and overvoltage active clamp.
A dedicated analog current sense pin is
associated with every output channel in order to
provide Enhanced diagnostic functions including
fast detection of overload and short circuit to
ground through power limitation indication and
overtemperature indication.
An improved current sense circuitry and the
introduction of a new current sense ratio drift,
dK/K(tot), allow the "single-point" calibration and
ensure a very high accuracy in case of "doublepoint" calibration.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices.
Especially intended for blinkers
October 2010
Doc ID 16273 Rev 7
1/34
www.st.com
1
Contents
VND5E025BK-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1
4
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
3.1.2
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.5
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25
Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1
ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34
Doc ID 16273 Rev 7
VND5E025BK-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8V < VCC < 18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Doc ID 16273 Rev 7
3/34
List of figures
VND5E025BK-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
4/34
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25
PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . 26
PowerSSO-24 thermal impedance junction to ambient single pulse (one channel on) . . . 27
Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 27
PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Doc ID 16273 Rev 7
VND5E025BK-E
Block diagram and pin description
Figure 1.
Block diagram
VCC
Signal Clamp
Undervoltage
Control & Diagnostic 1
IN1
Power
Clamp
DRIVER
IN2
VON
Limitation
Over
temp.
CH 1
Current
Limitation
CS_
DIS
VSENSEH
CS1
CONTROL & DIAGNOSTIC
Channels 2
1
Block diagram and pin description
CH 2
Current
Sense
OUT2
CS2
OUT1
LOGIC
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
GND
Table 1.
Pin functions
Name
VCC
OUTPUT1,2
GND
INPUT1,2
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external
diode / resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.
CURRENT SENSE1,2
Analog current sense pin; delivers a current proportional to the load
current.
CS_DIS
Active high CMOS compatible pin to disable the current sense pin.
Doc ID 16273 Rev 7
5/34
Block diagram and pin description
Figure 2.
VND5E025BK-E
Configuration diagram (top view)
VCC
GND
N.C.
INPUT2
N.C.
INPUT1
N.C.
CURRENT SENSE1
N.C.
CURRENT SENSE2
CS_DIS.
VCC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
TAB = VCC
Table 2.
6/34
Suggested connections for unused and not connected pins
Connection / pin
Current sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
X
To ground
Through 1 kΩ
resistor
X
Through 22 kΩ Through 10 kΩ
resistor
resistor
Doc ID 16273 Rev 7
Through 10 kΩ
resistor
VND5E025BK-E
2
Electrical specification
Electrical specification
Figure 3.
Current and voltage conventions
IS
VCC
ICSD
VCSD
CS_DIS
OUTPUT1
INPUT1
CURRENT
SENSE1
VCC
VOUT1
ISENSE1
IIN1
VIN1
VFn
IOUT1
IIN2
IOUT2
VSENSE1
OUTPUT2
INPUT2
ISENSE2
VIN2
VOUT2
CURRENT
SENSE2
GND
VSENSE2
IGND
Note:
VFn = VOUTn - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
VCC
DC supply voltage
41
-VCC
Reverse DC supply voltage
0.3
-IGND
DC reverse ground pin current
200
IOUT
DC output current
- IOUT
IIN
ICSD
Unit
V
mA
Internally limited
A
Reverse DC output current
24
DC input current
-1 to 10
DC current sense disable input current
-ICSENSE
DC reverse CS pin current
VCSENSE
Current sense maximum voltage
Doc ID 16273 Rev 7
mA
200
VCC - 41 to +VCC
V
7/34
Electrical specification
Table 3.
VND5E025BK-E
Absolute maximum ratings (continued)
Symbol
Unit
140
mJ
EMAX
VESD
Electrostatic discharge
(Human Body Model: R = 1.5 kΩ; C = 100 pF)
– Input
– Current sense
– CS_DIS
– Output
– VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Tstg
Junction operating temperature
- 40 to 150
Storage temperature
- 55 to 150
°C
Thermal data
Table 4.
Symbol
Thermal data
Parameter
Rthj-case Thermal resistance junction-case (with one channel on)
Rthj-amb Thermal resistance junction-ambient
8/34
Value
Maximum switching energy (single pulse)
(L = 0.8 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.))
Tj
2.2
Parameter
Doc ID 16273 Rev 7
Max. value
Unit
1.35
°C/W
See Figure 33
VND5E025BK-E
2.3
Electrical specification
Electrical characteristics
Values specified in this section are for 8V<VCC<28V; -40°C<Tj<150°C, unless otherwise
stated.
Table 5.
Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
4.5
13
28
4.5
VCC
Operating supply
voltage
VUSD
Undervoltage shutdown
3.5
VUSDhyst
Undervoltage shutdown
hysteresis
0.5
RON
Vclamp
IS
On-state resistance (1)
Clamp voltage
IOUT = 3A; Tj = 25°C
25
IOUT = 3A; Tj = 150°C
50
IOUT = 3A; VCC = 5V; Tj = 25°C
35
IS = 20 mA
41
IL(off1)
VF
Off-state output
current (1)
Output - VCC diode
voltage (1)
0
VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C
0
mΩ
52
V
2 (2)
5 (2)
µA
9
µA
3
6
mA
0.01
3
On-state; VCC = 13V; VIN = 5V;
IOUT = 0A
VIN = VOUT = 0V; VCC = 13V;
Tj = 25°C
V
46
Off-state; VCC = 13V; Tj = 25°C;
VIN = VOUT = VSENSE = VCSD = 0V
Off-state; VCC = 13V; Tj = 125°C;
VIN = VOUT = VSENSE = VCSD = 0V
Supply current
Unit
µA
5
-IOUT = 4 A; Tj = 150°C
0.7
V
1. For each channel.
2. PowerMOS leakage included.
Table 6.
Symbol
Switching (VCC = 13V; Tj = 25°C)
Parameter
td(on)
Turn-on delay time
td(off)
Turn-off delay time
Test conditions
RL = 4.3 Ω
(see Figure 5)
(dVOUT/dt)on Turn-on voltage slope
Min.
Typ.
-
20
-
-
30
-
-
See
Figure 24
-
-
See
Figure 25
-
-
0.6
-
-
0.35
-
µs
RL = 4.3 Ω
(dVOUT/dt)off Turn-off voltage slope
WON
Switching energy losses
during tWON
WOFF
Switching energy losses
during tWOFF
RL = 4.3 Ω
(see Figure 5)
Doc ID 16273 Rev 7
Max. Unit
V/µs
mJ
9/34
Electrical specification
Table 7.
Symbol
VND5E025BK-E
Logic inputs
Parameter
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
ICSDL
Low level CS_DIS current
VCSDH
CS_DIS high level voltage
ICSDH
High level CS_DIS current
VCSD(hyst)
CS_DIS hysteresis voltage
Symbol
Unit
0.9
V
µA
2.1
V
10
0.25
IIN = 1mA
5.5
7
V
-0.7
0.9
VCSD = 0.9V
1
µA
2.1
V
VCSD = 2.1V
10
µA
7
V
Max.
Unit
0.25
ICSD = 1mA
5.5
-0.7
Parameter
Test conditions
ILIML
TTSD
Shutdown temperature
VCC = 13V
Min.
Typ.
43
60
85
5V < VCC < 28V
TR
Reset temperature
TRS
Thermal reset of STATUS
A
VCC = 13V;
TR < Tj < TTSD
15
150
175
TRS + 1
TRS + 5
200
°C
135
Thermal hysteresis
(TTSD-TR)
7
Turn-Off output voltage
clamp
IOUT= 2A; VIN = 0;
L = 6 mH
Output voltage drop
limitation
IOUT = 0.1A;
Tj = -40°C to +150°C
(see Figure 6)
VCC - 41 VCC - 46 VCC - 52
V
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/34
µA
Protections and diagnostics (1)
Short circuit current
during thermal cycling
VON
Max.
1
ICSD = -1mA
DC short circuit current
VDEMAG
Typ.
VIN = 2.1V
CS_DIS clamp voltage
ILIMH
THYST
Min.
IIN = -1mA
CS_DIS low level voltage
Table 8.
VIN = 0.9V
Input clamp voltage
VCSDL
VCSCL
Test conditions
Doc ID 16273 Rev 7
VND5E025BK-E
Electrical specification
Table 9.
Symbol
Current sense (8V < VCC < 18V)
Parameter
Test conditions
Min. Typ. Max. Unit
KLED
IOUT/ISENSE
IOUT = 0.05A; VSENSE = 0.5V; VCSD = 0V;
1922 5046 9218
Tj = -40°C to 150°C
K1
IOUT/ISENSE
IOUT = 1.5 A; VSENSE = 4 V;
VCSD = 0V;
Tj = -40°C to 150°C
dK1/K1(1)(2)
K2
dK2/K2(1)(2)
K3
dK3/K3(1)(2)
K4
dK4/K4(1)(2)
K5
dK5/K5(1)(2)
K6
dK6/K6(1)(2)
Current sense
ratio drift
IOUT = 1.5 A; VSENSE = 4 V;
VCSD = 0V;
Tj = -40°C to 150°C
IOUT/ISENSE
IOUT = 2 A; VSENSE = 4V;
VCSD = 0V;
Tj = -40°C to 150°C
Current sense
ratio drift
IOUT = 2 A; VSENSE = 4V; VCSD = 0V;
Tj = -40°C to 150°C
IOUT/ISENSE
IOUT = 2.4 A; VSENSE = 4V;
VCSD = 0V;
Tj = -40°C to 150°C
Current sense
ratio drift
IOUT = 2.4 A; VSENSE = 4V; VCSD = 0V;
Tj = -40°C to 150°C
IOUT/ISENSE
IOUT = 3 A; VSENSE = 4V;
VCSD = 0V;
Tj = -40°C to 150°C
Current sense
ratio drift
IOUT = 3 A; VSENSE = 4V; VCSD = 0V;
Tj = -40°C to 150°C
IOUT/ISENSE
IOUT = 4 A; VSENSE = 4V;
VCSD = 0V;
Tj = -40°C to 150°C
Current sense
ratio drift
IOUT = 4 A; VSENSE = 4V; VCSD = 0V;
Tj = -40°C to 150°C
IOUT/ISENSE
IOUT = 10 A; VSENSE = 4V;
VCSD = 0V;
Tj = -40°C to 150°C
Current sense
ratio drift
IOUT = 10 A; VSENSE = 4V; VCSD = 0V;
Tj = -40°C to 150°C
2460 3363 4050
-9
9
%
2550 3405 4108
-7
7
%
2635 3384 4117
-6
+6
%
2752 3368 3975
-5
5
%
2860 3341 3805
-4
4
%
2965 3307 3570
-3
3
%
-9.5
-7
-6
-7
-8
9.5
7
6
7
8
%
%
%
%
%
Measurement point: IOUT = 2.4 A;
Tj = 25°C; VCC = 13.5V
Current sense
ratio drift for
dK/K(tot)(1)(3)
single point
calibration
IOUT = 1.5 A
IOUT = 2.0 A
IOUT = 2.4 A
IOUT = 3.0 A
IOUT = 4.0 A
Doc ID 16273 Rev 7
11/34
Electrical specification
Table 9.
Symbol
ISENSE0
VND5E025BK-E
Current sense (8V < VCC < 18V) (continued)
Parameter
Analog sense
leakage current
Test conditions
Min. Typ. Max. Unit
IOUT = 0A; VSENSE = 0V;
VCSD = 5V; VIN = 0V; Tj = -40°C to 150°C
VCSD = 0V; VIN = 5V; Tj = -40°C to 150°C
0
0
1
2
µA
µA
IOUT = 2A; VSENSE = 0V;
VCSD = 5V; VIN = 5V; Tj = -40°C to 150°C
0
1
µA
70
mA
IOL
Openload onstate current
detection
threshold
VIN = 5V, 8V<VCC<18V
ISENSE= 5 µA
5
VSENSE
Max analog
sense output
voltage
IOUT = 3 A; VCSD = 0V
5
VSENSEH
Analog sense
output voltage in VCC = 13V; RSENSE = 3.9kΩ
fault condition(4)
ISENSEH
Analog sense
output current in VCC = 13V; VSENSE = 5V
fault condition(2)
V
8
9
12
tDSENSE1H
Delay response V
< 4V, 0.5 < I
< 10A
time from falling I SENSE= 90% of I OUT
SENSE
SENSEMAX
edge of CS_DIS
(see Figure 4)
pin
30
100
tDSENSE1L
Delay response V
< 4V, 0.5 < I
< 10A
time from rising I SENSE= 10% of I OUT
SENSEMAX
edge of CS_DIS SENSE
(see Figure 4)
pin
5
20
tDSENSE2H
Delay response
time from rising
edge of INPUT
pin
80
300
Delay response
time between
rising edge of
ΔtDSENSE2H
output current
and rising edge
of current sense
tDSENSE2L
Delay response
time from falling
edge of INPUT
pin
VSENSE < 4V, 0.5 < IOUT < 10A
ISENSE = 90% of ISENSEMAX
(see Figure 4)
6
µs
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX, IOUTMAX = 3A
(see Figure 7)
VSENSE < 4V, 0.5 < IOUT < 10A
ISENSE = 10% of ISENSEMAX
(see Figure 4)
110
5
1. Parameter guaranteed by design; it is not tested.
2. Analog sense current drift (dK/K) is deviation of factor K for a given device over (-40 °C to 150 °C,
Vbatt: 8 V...16 V) with respect to its value measured at Tj = 25 °C, VCC = 13 V.
3. Total current drift over -40 °C to 150 °C, Vbatt: 8 V...16 V and output current variation, respect to a
calibration point measured at Tj = 25 °C and VCC = 13.5 V.
4. Fault condition includes: power limitation and overtemperature.
12/34
Doc ID 16273 Rev 7
mA
20
VND5E025BK-E
Figure 4.
Electrical specification
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
Figure 5.
tDSENSE1L
tDSENSE1H
tDSENSE2L
Switching characteristics
tWoff
tWon
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
tf
10%
t
INPUT
td(on)
td(off)
t
Figure 6.
Output voltage drop limitation
VCC - VOUT
Tj = 150oC
Tj = 25oC
Tj = -40oC
Von
Von/Ron(T)
Doc ID 16273 Rev 7
IOUT
13/34
Electrical specification
Figure 7.
VND5E025BK-E
Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
VIN
ΔtDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
Figure 8.
IOUT/ISENSE vs IOUT
K
4200
4000
3800
3600
3400
K(min)
K(max)
3200
3000
2800
2600
2400
2200
1.5
2.5
3.5
4.5
5.5
6.5
Iout (A)
14/34
Doc ID 16273 Rev 7
7.5
8.5
9.5
VND5E025BK-E
Electrical specification
Figure 9.
Maximum current sense ratio drift vs load current
dK/K
10%
8%
6%
4%
2%
dK/K(min)
0%
dK/K(max)
-2%
-4%
-6%
-8%
-10%
1.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
Iout (A)
Note:
Parameter guaranteed by design; it is not tested.
Table 10.
Truth table
Input
Output
Sense (VCSD=0V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND
(Power limitation)
L
H
L
L
0
VSENSEH
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Doc ID 16273 Rev 7
15/34
Electrical specification
Table 11.
ISO 7637-2:
2004(E) Test
pulse
VND5E025BK-E
Electrical transient requirements (part 1/3)
Test levels (1)
III
IV
1
-75V
-100V
2a
+37V
3a
Number of
pulses or
test times
Burst cycle / pulse
repetition time
Delays and
Impedance
Min.
Max.
5000 pulses
0.5s
5s
2 ms, 10Ω
+50V
5000 pulses
0.2s
5s
50µs, 2Ω
-100V
-150V
1h
90ms
100ms
0.1µs, 50Ω
3b
+75V
+100V
1h
90ms
100ms
0.1µs, 50Ω
4
-6V
-7V
1 pulse
100ms, 0.01Ω
+65V
+87V
1 pulse
400ms, 2Ω
5b
(2)
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 12.
Electrical transient requirements (part 2/3)
ISO 7637-2:
2004E
Test pulse
III
VI
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
C
C
5b
(1)
Test level results
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13.
Class
16/34
Electrical transient requirements (part 3/3)
Contents
C
All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 16273 Rev 7
VND5E025BK-E
2.4
Electrical specification
Waveforms
Figure 10. Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 11.
Overload or short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
Doc ID 16273 Rev 7
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Electrical specification
VND5E025BK-E
Figure 12. Intermittent overload
Intermittent Overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH>
VSENSE
VCS_DIS
Figure 13. TJ evolution in overload or short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
18/34
Doc ID 16273 Rev 7
VND5E025BK-E
2.5
Electrical specification
Electrical characteristics curves
Figure 14. Off-state output current
Figure 15. High level input current
Iloff (nA)
Iih (µA)
1000
5
900
4,5
Off State
Vcc=13V
Vin=Vout=0V
800
700
Vin = 2.1V
VCC = 8 V
4
3,5
600
3
500
2,5
400
2
300
1,5
200
1
100
0,5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
Tc (°C)
Figure 16. Input clamp voltage
Figure 17. Input high level
Vicl (V)
Vih (V)
7
4
6,8
lin=1mA
3,5
6,6
3
6,4
6,2
2,5
6
2
5,8
1,5
5,6
1
5,4
0,5
5,2
5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
Tc (°C)
Figure 18. Input low level
Figure 19. Input hysteresis voltage
Vil (V)
Vihyst (V)
2
1
1,8
0,9
1,6
0,8
1,4
0,7
1,2
0,6
1
0,5
0,8
0,4
0,6
0,3
0,4
0,2
0,2
0,1
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Doc ID 16273 Rev 7
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Electrical specification
VND5E025BK-E
Figure 20. On-state resistance vs Tcase
Figure 21. On-state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
70
60
60
Iout= 3A
Vcc=13V
50
Tc=150°C
50
40
40
Tc=125°C
30
30
Tc=25°C
20
20
Tc=-40°C
10
10
0
0
-50
-25
0
25
50
75
100
125
150
0
175
5
10
15
20
25
30
35
40
Vcc (V)
Tc (°C)
Figure 22. Undervoltage shutdown
Figure 23. ILIMH vs Tcase
Vusd (V)
Ilimh (A)
16
70
14
65
Vcc=13V
12
60
10
8
55
6
50
4
45
2
0
40
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
75
100
125
150
175
150
175
Tc (°C)
Figure 24. Turn-on voltage slope
Figure 25. Turn-off voltage slope
(dVout/dt )On (V/ms)
(dVout/dt )Off (V/ms)
700
600
600
50
Vcc=13V
RI=4.3 Ohm
Vcc=13V
RI= 4.3 Ohm
500
500
400
400
300
300
200
200
100
100
0
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
20/34
-50
-25
0
25
50
75
Tc (°C)
Doc ID 16273 Rev 7
100
125
VND5E025BK-E
Electrical specification
Figure 26. CS_DIS high level voltage
Figure 27. CS_DIS low level voltage
Vcsdl (V)
Vcsdh (V)
3
4
3,5
2,5
3
2
2,5
1,5
2
1,5
1
1
0,5
0,5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 28. CS_DIS clamp voltage
Vcsdcl(V)
10
9
Icsd = 1 mA
8
7
6
5
4
3
2
1
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Doc ID 16273 Rev 7
21/34
Application information
3
VND5E025BK-E
Application information
Figure 29. Application schematic
+5V
VCC
Rprot
CS_DIS
Dld
ΜCU
Rprot
INPUT
OUTPUT
Rprot
CURRENT SENSE
GND
RSENSE
VGND
CEXT
RGND
DGND
Note:
Channel 2 has the same internal circuit as channel 1.
3.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤ 600 mV / (IS(on)max)
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum On-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
22/34
Doc ID 16273 Rev 7
VND5E025BK-E
Application information
values. This shift will vary depending on how many devices are On in the case of several
high-side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2
Solution 2: diode (DGND) in the ground line
A resistor (RGND=1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the MCU I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of MCU and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of MCU
I/Os:
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak = - 100 V and Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V
5 kΩ ≤ Rprot ≤ 180 kΩ
Recommended values: Rprot =10 kΩ, CEXT=10 nF.
Doc ID 16273 Rev 7
23/34
Application information
3.4
VND5E025BK-E
Current sense and diagnostic
The current sense pin performs a double function (see Figure 30: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a known ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V
minimum (see parameter VSENSE in Table 9: Current sense (8V < VCC < 18V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8V < VCC < 18V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Truth table):
–
Power limitation activation
–
Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 30. Current sense and diagnostic
VCC
Signal Clamp
IN1
Control &Diagnostic 1
Power
Clamp
DRIVER
IN2
VON
Limitation
Over
temp.
CH1
Current
Limitation
CS_
DIS
VSENSEH
CS1
Current
Sense
CONTROL & DIAGNOSTIC
Channels 2
Undervoltage
CH2
OUT2
CS2
OUT1
LOGIC
OVERLOADPROTECTION
(ACTIVEPOWERLIMITATION)
GND
24/34
Doc ID 16273 Rev 7
VND5E025BK-E
Maximum demagnetization energy (VCC = 13.5V)
Figure 31. Maximum turn-off current versus inductance (for each channel)
100
A
B
C
10
I (A)
3.5
Application information
1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature
specified above for curves A and B.
Doc ID 16273 Rev 7
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Package and thermal data
VND5E025BK-E
4
Package and thermal data
4.1
PowerSSO-24 thermal data
Figure 32. PowerSSO-24 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area = 77mm x 86mm, PCB
thickness = 1.6mm, Cu thickness = 70µm (front and back side), Copper areas: from minimum pad layout to 8cm2).
Figure 33. Rthj-amb vs PCB copper area in open box free air condition (one channel
on)
RTHj_amb(°C/W)
55
50
45
40
35
30
0
2
4
6
PCB Cu heatsink area (cm^2)
26/34
Doc ID 16273 Rev 7
8
10
VND5E025BK-E
Package and thermal data
Figure 34. PowerSSO-24 thermal impedance junction to ambient single pulse (one
channel on)
ZTH (°C/W)
1000
100
Footprint
2 cm2
8 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
10
100
1000
Equation 1: pulse calculation formula
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
Figure 35. Thermal fitting model of a double channel HSD in PowerSSO-24
Note:
The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power
limitation or thermal cycling during thermal shutdown) are not triggered.
Doc ID 16273 Rev 7
27/34
Package and thermal data
Table 14.
28/34
VND5E025BK-E
Thermal parameters
Area/Island (cm2)
Footprint
R1 (°C/W)
0.28
R2 (°C/W)
0.9
R3 (°C/W)
6
R4 (°C/W)
7.7
R5 (°C/W)
2
8
9
9
8
R6 (°C/W)
28
17
10
R7 (°C/W)
0.28
R8 (°C/W)
0.9
C1 (W.s/°C)
0.001
C2 (W.s/°C)
0.003
C3 (W.s/°C)
0.025
C4 (W.s/°C)
0.75
C5 (W.s/°C)
1
4
9
C6 (W.s/°C)
2.2
5
17
C7 (W.s/°C)
0.001
C8 (W.s/°C)
0.003
Doc ID 16273 Rev 7
VND5E025BK-E
Package and packing information
5
Package and packing information
5.1
ECOPACK®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
Package mechanical data
Figure 36. PowerSSO-24 package dimensions
Doc ID 16273 Rev 7
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Package and packing information
VND5E025BK-E
PowerSSO-24 mechanical data
Table 15.
Millimeters
Symbol
Min.
Typ.
Max.
A
2.15
2.47
A2
2.15
2.40
a1
0
0.075
b
0.33
0.51
c
0.23
0.32
D
10.10
10.50
E
7.4
7.6
e
0.8
e3
8.8
G
0.1
G1
0.06
H
10.1
10.5
h
0.4
k
5°
L
0.55
0.85
N
5.3
10°
X
4.1
4.7
Y
6.5
7.1
Packing information
Figure 37. PowerSSO-24 tube shipment (no suffix)
C
B
Base Qty
Bulk Qty
Tube length (±0.5)
A
B
C (±0.1)
All dimensions are in mm.
A
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1225
532
3.5
13.8
0.6
VND5E025BK-E
Package and packing information
Figure 38. PowerSSO-24 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Qty
Bulk Qty
A (max)
B (min)
C (±0.2)
F
G (+2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (±0.1)
P
D (±0.05)
D1 (min)
F (±0.1)
K (max)
P1 (±0.1)
24
4
12
1.55
1.5
11.5
2.85
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components Components
500mm min
No components
500mm min
Empty components pockets
sealed with cover tape.
User direction of feed
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Order codes
6
VND5E025BK-E
Order codes
Table 16.
Device summary
Order codes
Package
PowerSSO-24
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Tube
Tape and reel
VND5E025BK-E
VND5E025BKTR-E
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7
Revision history
Revision history
Table 17.
Document revision history
Date
Revision
Changes
17-Sep-2009
1
Initial release.
02-Nov-2009
2
Updated Table 5: Power section.
30-Nov-2009
3
Updated Table 9: Current sense (8V < VCC < 18V).
Updated Figure 9: Maximum current sense ratio drift vs load current
21-Jan-2010
4
Updated Table 9: Current sense (8V < VCC < 18V)
03-Feb-2010
5
Updated following tables:
– Table 6: Switching (VCC = 13V; Tj = 25°C)
– Table 9: Current sense (8V < VCC < 18V)
Updated following figures:
– Figure 8: IOUT/ISENSE vs IOUT
– Figure 9: Maximum current sense ratio drift vs load current
19-Feb-2010
6
Updated Table 6: Switching (VCC = 13V; Tj = 25°C).
11-Oct-2010
7
Changed document status from target specification to datasheet.
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VND5E025BK-E
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