VNQ5E250AJ-E - STMicroelectronics

VNQ5E250AJ-E
Quad channel high-side driver with analog current sense
for automotive applications
Features
Max supply voltage
VCC
41 V
Operating voltage range
VCC
4 to 28 V
Max on-state resistance (per ch.)
RON
250 mΩ
Current limitation (typ)
ILIMH
5A
Off-state supply current
IS
2 µA(1)
PowerSSO-16
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection
1. Typical value with all loads connected.
Applications
■
■
■
General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliant with European directive
2002/95/EC
– Very low current sense leakage
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off-state open-load detection
– Output short to VCC detection
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
September 2013
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
■
Suitable as relays driver
Description
The VNQ5E250AJ-E is a quad channel high-side
driver manufactured using ST proprietary
VIPower™ M0-5 technology and housed in
PowerSSO-16 package. The device is designed
to drive 12 V automotive grounded loads, and to
provide protection and diagnostics. It also
implements a 3 V and 5 V CMOS compatible
interface for the use with any microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with autorestart and overvoltage active clamp. A dedicated
analog current sense pin is associated with every
output channel providing enhanced diagnostic
functions including fast detection of overload and
short-circuit to ground through power limitation
indication, overtemperature indication, shortcircuit to VCC diagnosis and on-state and off-state
open-load detection. The current sensing and
diagnostic feedback of the whole device can be
disabled by pulling the CS_DIS pin high to share
the external sense resistor with similar devices.
Doc ID 17360 Rev 3
1/37
www.st.com
1
Contents
VNQ5E250AJ-E
Contents
1
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
3.1.2
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1
3.5
4
Maximum demagnetization energy (VCC =13.5V) . . . . . . . . . . . . . . . . . . 28
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1
5
Short to VCC and off-state open load detection . . . . . . . . . . . . . . . . . . . 27
PowerSSO-16 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2
PowerSSO-16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
Doc ID 17360 Rev 3
VNQ5E250AJ-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Open-load detection (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
PowerSSO-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Doc ID 17360 Rev 3
3/37
List of figures
VNQ5E250AJ-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/37
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of output current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input low-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input high-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CS_DIS high-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS low-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28
PowerSSO-16 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 29
PowerSSO-16 thermal impedance junction ambient single pulse (one channel on) . . . . . 30
Thermal fitting model of a double channel HSD in PowerSSO-16 . . . . . . . . . . . . . . . . . . . 31
PowerSSO-16 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PowerSSO-16 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
PowerSSO-16 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Doc ID 17360 Rev 3
VNQ5E250AJ-E
Block diagram and pin configuration
Figure 1.
Block diagram
VCC
Signal Clamp
Undervoltage
IN1
Control & Diagnostic 1
Power
Clamp
DRIVER
IN2
VON
Limitation
CH 1
IN3
Over
temp.
IN4
Current
Limitation
OFF State
Open load
CS_
DIS
VSENSEH
CS1
CONTROL & DIAGNOSTIC
Channels 2, 3 & 4
1
Block diagram and pin configuration
Current
Sense
CH 4
CH 3
OUT4
OUT3
CH 2
OUT2
CS2
OUT1
CS3
LOGIC
CS4
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
GND
Table 1.
Pin functions
Name
VCC
OUTPUTn
GND
INPUTn
CURRENT
SENSEn
CS_DIS
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
Analog current sense pin, delivers a current proportional to the load current.
Active high CMOS compatible pin, to disable the current sense pin.
Doc ID 17360 Rev 3
5/37
Block diagram and pin configuration
Figure 2.
VNQ5E250AJ-E
Configuration diagram (top view)
CURRENT SENSE4
INPUT4
CURRENT SENSE3
INPUT3
CURRENT SENSE2
INPUT2
CURRENT SENSE1
INPUT1
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
GND
CS_DIS
N.C.
OUTPUT4
OUTPUT3
OUTPUT2
OUTPUT1
N.C.
TAB=Vcc
Table 2.
6/37
Suggested connections for unused and not connected pins
Connection / pin
Current sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
X
To ground
Through 1 kΩ
resistor
X
Not allowed
Through 10 kΩ
resistor
Through
10 kΩ resistor
Doc ID 17360 Rev 3
VNQ5E250AJ-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
OUTPUTn
CS_DIS
VOUTn
ISENSEn
IINn
VINn
VCC
IOUTn
ICSD
VCSD
VFn
CURRENT
INPUTn
SENSEn
VSENSEn
GND
IGND
Note:
VFn = VOUTn - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
VCC
Reverse DC supply voltage
0.3
V
IGND
DC reverse ground pin current
200
mA
IOUT
DC output current
Internally
limited
A
-IOUT
Reverse DC output current
5
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC-41
+VCC
V
V
39
mJ
IIN
ICSD
ICSENSE
DC reverse CS pin current
VCSENSE Current sense maximum voltage
EMAX
Maximum switching energy (single pulse)
(L = 36 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.))
Doc ID 17360 Rev 3
7/37
Electrical specifications
Table 3.
Absolute maximum ratings (continued)
Symbol
Parameter
Value
Unit
VESD
Electrostatic discharge (human body model: R=1.5KΩ; C=100pF)
– Input
– Current sense
– CS_DIS
– Output
– VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
VNQ5E250AJ-E
Thermal data
Table 4.
Symbol
Rthj-amb
Thermal data
Parameter
Thermal resistance junction-ambient (MAX)
Rthj-case Thermal resistance junction-case (MAX)
8/37
Doc ID 17360 Rev 3
Max. value
Unit
See Figure 36
°C/W
4.5
°C/W
VNQ5E250AJ-E
2.3
Electrical specifications
Electrical characteristics
Values specified in this section are for 8 V < VCC < 28 V, -40 °C < Tj < 150 °C, unless
otherwise specified.
Table 5.
Power section
Symbol
Parameter
VCC
Operating supply voltage
VUSD
VUSDhyst
RON
Vclamp
IS
IL(off)
VF
Test conditions
Min. Typ. Max. Unit
13
28
V
Undervoltage shutdown
3.5
4
V
Undervoltage shutdown
hysteresis
0.5
On-state resistance
Clamp voltage
4
IOUT = 0.5 A; Tj = 25 °C
250
mΩ
IOUT = 0.5 A; Tj = 150 °C
500
mΩ
IOUT = 0.5 A; VCC = 5 V; Tj = 25 °C
300
mΩ
46
52
V
2(1)
5(1)
µA
8
14
mA
0.01
3
µA
5
µA
0.7
V
IS=20 mA
41
Off-state; VCC = 13 V; Tj = 25 °C;
VIN = VOUT = VSENSE = VCSD = 0 V
Supply current
On-state; VCC=13V; VIN=5V;
IOUT = 0A
Off-state output current (2)
Output - VCC diode
voltage(2)
V
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C
0
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C
0
-IOUT = 0.5 A; Tj = 150 °C
1. PowerMOS leakage included.
2. For each channel.
Table 6.
Symbol
Switching (VCC = 13 V; Tj = 25 °C)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 26 Ω (see Figure 6)
—
10
—
µs
td(off)
Turn-off delay time
RL = 26 Ω (see Figure 6)
—
8
—
µs
(dVOUT/dt)on Turn-on voltage slope RL = 26 Ω
—
0.8
—
V/µs
(dVOUT/dt)off Turn-off voltage slope RL = 26 Ω
—
1
—
V/µs
WON
Switching energy
losses during twon
RL = 26 Ω (see Figure 6)
—
16
—
µJ
WOFF
Switching energy
losses during twoff
RL = 26 Ω (see Figure 6)
—
12
—
µJ
Doc ID 17360 Rev 3
9/37
Electrical specifications
Table 7.
VNQ5E250AJ-E
Logic inputs
Symbol
Parameter
Test conditions
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
VIN = 0.9 V
CS_DIS low level voltage
ICSDL
Low level CS_DIS current
VCSDH
CS_DIS high level voltage
ICSDH
High level CS_DIS current
CS_DIS clamp voltage
Table 8.
IlimH
DC short circuit current
IlimL
Short circuit current
during thermal cycling
TTSD
Shutdown temperature
2.1
V
10
5.5
7
-0.7
µA
2.1
V
10
0.25
µA
V
5.5
7
-0.7
V
V
Test conditions
VCC = 13 V
Min.
Typ.
Max.
Unit
3.5
5
7
A
7
A
Reset temperature
TRS
Thermal reset of
STATUS
VCC = 13 V; TR < Tj < TTSD
1.25
150
175
A
200
TRS + 1 TRS + 5
135
Thermal hysteresis
(TTSD-TR)
Turn-off output voltage
clamp
IOUT = 0.5 A; VIN = 0;
L = 20 mH
Output voltage drop
limitation
IOUT = 0.015;
Tj = -40 °C...150 °C
(see Figure 8)
Doc ID 17360 Rev 3
°C
°C
°C
7
°C
VCC-41 VCC-46 VCC-52
V
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/37
V
1
VCSD = 2.1 V
ICSD = 1 mA
V
V
0.9
VCSD = 0.9 V
µA
V
4.5 V < VCC < 28 V
TR
VON
V
Protections and diagnostics (1)
Parameter
VDEMAG
0.9
µA
ICSD = -1 mA
Symbol
THYST
Unit
0.25
VCSD(hyst) CS_DIS hysteresis voltage
VCSCL
Max.
1
IIN = -1 mA
VCSDL
Typ.
VIN = 2.1 V
IIN = 1 mA
Input clamp voltage
Min.
VNQ5E250AJ-E
Electrical specifications
Table 9.
Symbol
K0
K1
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
Current sense (8 V < VCC < 18 V)
Parameter
Test conditions
Min.
Typ. Max. Unit
IOUT/ISENSE
IOUT = 0.025 A;VSENSE = 0.5 V
Tj = -40 °C...150 °C
295
500
705
IOUT/ISENSE
IOUT = 0.25 A;VSENSE = 0.5 V
Tj = -40 °C...150 °C
Tj = 25 °C...150 °C
360
395
470
470
595
568
Current sense ratio drift
IOUT = 0.25 A;VSENSE = 4 V
Tj = -40 °C...150 °C
IOUT/ISENSE
IOUT = 0.5 A;VSENSE = 4 V
Tj = -40 °C...150 °C
Tj = 25 °C...150 °C
Current sense ratio drift
IOUT = 0.5 A; VSENSE = 4 V
Tj = -40 °C...150 °C
IOUT/ISENSE
IOUT = 1 A; VSENSE = 4 V
Tj = -40 °C...150 °C
Tj = 25 °C...150 °C
Current sense ratio drift
IOUT = 1 A; VSENSE = 4 V
Tj = -40 °C...150 °C
-4
+4
%
IOUT = 0 A; VSENSE = 0 V;
VCSD = 5 V; VIN = 0 V;
Tj = -40 °C...150 °C
0
1
µA
VCSD = 0 V; VIN = 5 V;
Tj = -40 °C...150 °C
0
2
µA
IOUT = 0.5 A; VSENSE = 0 V;
VCSD = 5 V; VIN = 5 V;
Tj = -40 °C...150 °C
0
1
µA
0.5
5
mA
Analog sense leakage
current
-9
425
445
+9
485
485
-6
465
475
IOL
Openload ON-state
current
detectionthreshold
VIN = 5 V; 8 V < VCC < 18 V;
ISENSE = 5 µA
VSENSE
Max analog sense
output voltage
IOUT = 0.5 A; VCSD = 0 V;
RSENSE = 10 KΩ
Analog sense output
voltage in fault
condition(2)
VCC = 13 V; RSENSE = 3.9 KΩ
8
VSENSEH
VCC = 5 V; RSENSE = 3.9 KΩ
4.5
Analog sense output
current in fault
condition(2)
VCC=13V; VSENSE = 5V
ISENSEH
Delay response time
tDSENSE1H from falling edge of
CS_DIS pin
555
540
+6
500
500
%
%
535
525
5
V
V
9
mA
VCC = 5 V; VSENSE = 3.5 V
VSENSE < 4 V;
0.025 A <IOUT < 1 A;
4.5 V < VCC < 18 V;
ISENSE = 90 % of ISENSE max
(see Figure 4)
Doc ID 17360 Rev 3
6
40
100
µs
11/37
Electrical specifications
Table 9.
Symbol
VNQ5E250AJ-E
Current sense (8 V < VCC < 18 V) (continued)
Parameter
Test conditions
Min.
Typ. Max. Unit
Delay response time
tDSENSE1L from rising edge of
CS_DIS pin
VSENSE < 4 V;
0.025 A < IOUT < 1 A;
4.5 V < VCC < 18 V;
ISENSE =10 % of ISENSE max
(see Figure 4)
5
20
µs
Delay response time
tDSENSE2H from rising edge of
INPUT pin
VSENSE < 4 V;
0.025A < IOUT < 1 A;
4.5 V < VCC < 18 V;
ISENSE = 90 % of ISENSE max
(see Figure 4)
50
200
µs
110
µs
150
µs
VSENSE < 4 V;
Delay response time
ISENSE = 90 % of ISENSEMAX;
between rising edge of
ΔtDSENSE2H
4.5 V < VCC < 18 V;
output current and rising
IOUT = 90 % of IOUTMAX
edge of current sense
IOUTMAX = 1.5 A (see Figure 7)
Delay response time
tDSENSE2L from falling edge of
INPUT pin
VSENSE < 4 V;
0.025A < IOUT < 1 A;
4.5 V < VCC < 18 V;
ISENSE = 10 % of ISENSE max
(see Figure 4)
15
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load OFF-state detection.
Table 10.
12/37
Open-load detection (8 V < VCC < 18 V)
Symbol
Parameter
Test conditions
Min.
Typ.
VOL
Open-load off-state voltage
detection threshold
VIN = 0 V; 4.5 V < VCC < 18 V
2
-
4
V
tDSTKON
Output short circuit to VCC
detection delay at turn-off
See Figure 5
180
-
1200
µs
IL(off2)
Off-state output current at
VOUT = 4 V
VIN = 0 V; VSENSE = 0 V
VOUT rising from 0 V to 4 V
-120
-
0
µA
td_vol
Delay response from output
VOUT = 4 V; VIN = 0 V
rising edge to VSENSE rising
VSENSE = 90 % of VSENSEH
edge in open-load
-
20
µs
Doc ID 17360 Rev 3
Max. Unit
VNQ5E250AJ-E
Electrical specifications
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
Figure 5.
tDSENSE1L
tDSENSE1H
tDSENSE2L
Open-load off-state delay timing
OUTPUT STUCK TO VCC
VIN
VOUT > VOL
VSENSEH
VCS
tDSTKON
Figure 6.
Switching characteristics
VOUT
tWon
tWoff
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
INPUT
td(on)
td(off)
t
Doc ID 17360 Rev 3
13/37
Electrical specifications
Figure 7.
VNQ5E250AJ-E
Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
VIN
ΔtDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
Figure 8.
Output voltage drop limitation
Vcc-Vout
Tj=150oC
Tj=25oC
Tj=-40oC
Von
Von/Ron(T)
14/37
Doc ID 17360 Rev 3
Iout
VNQ5E250AJ-E
Electrical specifications
Figure 9.
IOUT/ISENSE vs IOUT
Iout/Isense
750
700
A
650
600
B
550
C
500
450
400
D
350
300
E
250
0
0.2
0.4
0.6
Iout(A)
0.8
1
1.2
D: Min, Tj = 25 °C to 150 °C
E: Min, Tj = -40 °C to 150 °C
A: Max, Tj = -40 °C to 150 °C
B: Max, Tj = 25 °C to 150 °C
C: Typical, Tj = -40 °C to 150 °C
Figure 10. Maximum current sense ratio drift vs load current
dK/K(%)
20
15
10
A
5
0
-5
B
-10
-15
-20
0
0.25
0.5
0.75
1
1.25
Iout(A)
A Max, Tj = -40 °C...150 °C
Note:
B Min, Tj = -40 °C...150 °C
Parameter guaranteed by design; it is not tested.
Doc ID 17360 Rev 3
15/37
Electrical specifications
Table 11.
VNQ5E250AJ-E
Truth table
Input
Output
Sense (VCSD = 0 V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND
(Power limitation)
L
H
L
L
0
VSENSEH
Open load off-state
(with external pull-up)
L
H
VSENSEH
Short circuit to VCC
(external pull-up
disconnected)
L
H
H
H
VSENSEH
< Nominal
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
16/37
Doc ID 17360 Rev 3
VNQ5E250AJ-E
Electrical specifications
Table 12.
ISO 7637-2:
2004(E)
Test pulse
Electrical transient requirements (part 1/3)
Test levels(1)
III
IV
1
-75V
-100V
2a
+37V
3a
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
impedance
Min.
Max.
5000 pulses
0.5s
5s
2 ms, 10Ω
+50V
5000 pulses
0.2s
5s
50µs, 2Ω
-100V
-150V
1h
90ms
100ms
0.1µs, 50Ω
3b
+75V
+100V
1h
90ms
100ms
0.1µs, 50Ω
4
-6V
-7V
1 pulse
100ms, 0.01Ω
+65V
+87V
1 pulse
400ms, 2Ω
(2)
5b
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13.
Electrical transient requirements (part 2/3)
ISO 7637-2:
2004E
Test pulse
III
VI
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
C
C
(2)
5b
Table 14.
Class
Test level results
Electrical transient requirements (part 3/3)
Contents
C
All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 17360 Rev 3
17/37
Electrical specifications
2.4
VNQ5E250AJ-E
Waveforms
Figure 11.
Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 12. Overload or short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
18/37
Doc ID 17360 Rev 3
VNQ5E250AJ-E
Electrical specifications
Figure 13. Intermittent overload
Intermittent Overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH>
VSENSE
VCS_DIS
Figure 14. Off-state open-load with external circuitry
OFF-State Open Load
with external circutry
INPUT
VOUT > VOL
VOUT
VOL
IOUT
VSENSEH >
tDSTK(on)
VSENSE
VCS_DIS
Doc ID 17360 Rev 3
19/37
Electrical specifications
VNQ5E250AJ-E
Figure 15. Short to VCC
Short to VCC
Resistive
Short to VCC
Hard
Short to VCC
VOUT > VOL
VOL
VOUT
IOUT
tDSTK(on)
tDSTK(on)
VCS_DIS
Figure 16. TJ evolution in overload or short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
20/37
Doc ID 17360 Rev 3
VNQ5E250AJ-E
2.5
Electrical specifications
Electrical characteristics curves
Figure 17. Off-state output current
Figure 18. High-level input current
Iloff [nA]
Iih [uA]
300
5
4.5
250
Vin= 2.1V
4
3.5
200
Off State
Vcc= 13V
Vin=Vout= 0
150
3
2.5
2
100
1.5
1
50
0.5
0
-50
-25
0
25
50
75
100
125
150
0
-50
175
-25
0
25
Tc [°C]
50
75
100
125
150
175
Tc [°C]
Figure 19. Input clamp voltage
Figure 20. Input low-level voltage
Vicl [V]
Vil [V]
7
2
6.8
1.8
6.6
1.6
6.4
Iin= 1m A
1.4
6.2
1.2
6
1
5.8
0.8
5.6
0.6
5.4
0.4
5.2
0.2
0
-50
5
-50
-25
0
25
50
75
100
125
150
175
-25
0
25
50
75
100
125
150
175
Tc [°C]
Tc [°C]
Figure 21. Input high-level voltage
Figure 22. Input hysteresis voltage
Vih [V]
Vihyst [V]
4
1
0.9
3.5
0.8
3
0.7
2.5
0.6
2
0.5
0.4
1.5
0.3
1
0.2
0.5
0.1
0
-50
-25
0
25
50
75
100
125
150
175
0
-50
-25
0
25
50
75
100
125
150
175
Tc [°C]
Tc [°C]
Doc ID 17360 Rev 3
21/37
Electrical specifications
VNQ5E250AJ-E
Figure 23. On-state resistance vs Tcase
Figure 24. On-state resistance vs VCC
Ron [mOhm ]
Ron [mOhm ]
2500
500
2250
450
2000
400
Tc= 150°C
350
Tc=
Tc= 125°C
125°C
1750
300
Iout= 0.5A
Vcc= 13V
1500
1250
250
1000
200
750
150
500
100
250
50
0
-50
Tc= -40°C
25°C
Tc= -40°C
0
-25
0
25
50
75
100
125
150
0
175
5
10
15
20
25
30
35
40
Vcc [V]
Tc [°C]
Figure 25. Undervoltage shutdown
Figure 26. Turn-on voltage slope
(dVout/dt)On [V/m s]
Vusd [V]
5000
16
4500
14
4000
12
Vcc= 13V
Rl= 26Ω
3500
10
3000
8
2500
6
2000
1500
4
1000
2
500
0
-50
-25
0
25
50
75
100
125
150
0
-50
175
-25
0
25
Tc [°C]
100
125
150
175
Figure 28. Turn-off voltage slope
Ilim h [A]
(dVout/dt)Off [V/ms ]
10
5000
9
4500
8
4000
Vcc= 13V
7
Vcc= 13V
Rl= 26Ω
3500
6
3000
5
2500
4
2000
3
1500
2
1000
1
500
-25
0
25
50
75
100
125
150
175
Tc [°C]
22/37
75
Tc [°C]
Figure 27. ILIMH vs Tcase
0
-50
50
0
-50
-25
0
25
50
75
Tc [°C]
Doc ID 17360 Rev 3
100
125
150
175
VNQ5E250AJ-E
Electrical specifications
Figure 29. CS_DIS high-level voltage
Figure 30. CS_DIS clamp voltage
Vcsdh [V]
Vcsdcl [V]
4
10
3.5
9
8
3
Iin= 1m A
7
2.5
6
2
5
1.5
4
3
1
2
0.5
1
0
-50
-25
0
25
50
75
100
125
150
175
Tc [°C]
0
-50
-25
0
25
50
75
100
125
150
175
Tc [°C]
Figure 31. CS_DIS low-level voltage
Vcsdl [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
Tc [°C]
Doc ID 17360 Rev 3
23/37
Application information
3
VNQ5E250AJ-E
Application information
Figure 32. Application schematic
+5V
VCC
Rprot
CS_DIS
Dld
ΜCU
Rprot
IINPUT
OUTPUT
Rprot
CURRENT SENSE
GND
RSENSE
Cext
VGND
RGND
DGND
Note:
Channel 2, 3, 4 have the same internal circuit as channel 1.
3.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤ 600mV / (IS(on)max).
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power Dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same RGND.
24/37
Doc ID 17360 Rev 3
VNQ5E250AJ-E
Application information
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2
Solution 2: diode (DGND) in the ground line
A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/O pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHμC ≥ 4.5V
5kΩ ≤ Rprot ≤ 180kΩ.
Recommended values: Rprot =10kΩ, CEXT=10nF.
Doc ID 17360 Rev 3
25/37
Application information
3.4
VNQ5E250AJ-E
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a known ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Table 11):
–
Power limitation activation
–
Overtemperature
–
Short to VCC in off-state
–
Open load in off-state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
VPU
VBAT
VCC
Main MOSn
41V
PU_ CMD
Overtemperature
IOUT/KX
RPU
+
OL OFF
I SENSEH
ILoff2
VOL
Pwr_ Lim
CS_ DIS
OUTn
INPUTn
V SENSEH
CURRENT
SENSEn
RPROT
To uC ADC
26/37
R SENSE
V SENSE
Doc ID 17360 Rev 3
GND
Load
VNQ5E250AJ-E
3.4.1
Application information
Short to VCC and off-state open load detection
Short to VCC
A short circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device off-state. Small or no current is delivered by the current sense
during the on-state depending on the nature of the short circuit.
Off-state open load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module standby mode in order to avoid the
overall standby current consumption to increase in normal conditions, i.e. when load is
connected.
For proper open load detection in off-state, the external pull-up resistor must be selected
according to the following formula:
VOUT
Pull −up _ ON
=
RPD ⋅ VPU − RPU ⋅ RPD ⋅ I L ( off 2)
RPU + RPD
> VOL max = 4V
For the values of VOLmin,VOLmax and IL(off2) see Table 10: Open-load detection
(8 V < VCC < 18 V).
Doc ID 17360 Rev 3
27/37
Application information
3.5
VNQ5E250AJ-E
Maximum demagnetization energy (VCC =13.5V)
Figure 34. Maximum turn-off current versus inductance (for each channel)
10
A
B
C
I (A)
1
0.1
1
10
L (mH)
100
1000
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
28/37
Doc ID 17360 Rev 3
VNQ5E250AJ-E
Package and PCB thermal data
4
Package and PCB thermal data
4.1
PowerSSO-16 thermal data
Figure 35. PowerSSO-16 PC board
.
1. Board finish thickness 1.6 mm +/- 10%, board double layer, board dimension 77 mm x 86 mm, board
material FR4, Cu thickness 0.070 mm (front and back side), thermal vias separation 1.2 mm, thermal via
diameter 0.3 mm +/- 0.08 mm, Cu thickness on vias 0.025 mm, footprint dimension 2.2 mm x 3.9 mm.
Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel ON)
RTHjamb
90
80
70
RTHjamb
60
50
40
30
0
2
4
Doc ID 17360 Rev 3
6
8
10
29/37
Package and PCB thermal data
VNQ5E250AJ-E
Figure 37. PowerSSO-16 thermal impedance junction ambient single pulse (one channel on)
ZTH (°C/W)
100
Cu=8 cm2
Cu=2 cm2
Cu=foot print
10
1
0.0001
0.001
0.01
0.1
1
Time (s)
Equation 1: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
30/37
δ = tp ⁄ T
Doc ID 17360 Rev 3
10
100
1000
VNQ5E250AJ-E
Package and PCB thermal data
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-16
Note:
The fitting model is a simplified thermal tool and is valid for transient evolutions where the
embedded protections (power limitation or thermal cycling during thermal shutdown) are not
triggered.
Table 15.
Thermal parameters
Area/island (cm2)
Footprint
R1 = R7 = R9 = R11 (°C/W)
2
R2 = R8 = R10 = R12 (°C/W)
2.5
R3 (°C/W)
5
R4 (°C/W)
2
8
16
6
6
R5 (°C/W)
30
20
10
R6 (°C/W)
26
20
18
C1 = C7 = C9 = C11 (W.s/°C)
0.0005
C2 = C8 = C10 = C12 (W.s/°C)
0.001
C3 (W.s/°C)
0.01
C4 (W.s/°C)
0.2
0.3
0.3
C5 (W.s/°C)
0.4
1
1
C6 (W.s/°C)
3
5
7
Doc ID 17360 Rev 3
31/37
Package and packing information
VNQ5E250AJ-E
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
PowerSSO-16 package information
Figure 39. PowerSSO-16 package dimensions
32/37
Doc ID 17360 Rev 3
VNQ5E250AJ-E
Package and packing information
Table 16.
PowerSSO-16 mechanical data
Millimeters
Symbol
Min.
Typ.
A
1.25
1.72
A1
0.00
0.10
A2
1.10
1.62
B
0.18
0.36
C
0.19
0.25
D
4.80
5.00
E
3.80
4.00
e
0.50
H
5.80
6.20
h
0.25
0.50
L
0.40
1.27
k
0d
8d
X
1.90
2.50
Y
3.60
4.20
ddd
Note:
Max.
0.10
1
Dimensions D does not include mold flash protrusions or gate burrs.
Mold flash protrusions or gate burrs shall not exceed 0.15 mm in total (both side).
2
Drawings dimensions include single and matrix versions.
Doc ID 17360 Rev 3
33/37
Package and packing information
5.3
VNQ5E250AJ-E
Packing information
Figure 40. PowerSSO-16 tube shipment (no suffix)
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
B
C
A
100
2000
532
1.85
6.75
0.6
All dimensions are in mm.
Figure 41. PowerSSO-16 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
34/37
Doc ID 17360 Rev 3
No components
500mm min
VNQ5E250AJ-E
6
Order codes
Order codes
Table 17.
Device summary
Order codes
Package
PowerSSO-16
Part number (tube)
Part number (tape & reel)
VNQ5E250AJ-E
VNQ5E250AJTR-E
Doc ID 17360 Rev 3
35/37
Revision history
7
VNQ5E250AJ-E
Revision history
Table 18.
36/37
Document revision history
Date
Revision
Changes
19-Apr-2010
1
Initial release.
19-Nov-2010
2
Table 9: Current sense (8 V < VCC < 18 V):
– tDSENSE2H: updated maximun value
Table 4: Thermal data:
– Added Rthj-case row
19-Sep-2013
3
Updated Disclaimer.
Doc ID 17360 Rev 3
VNQ5E250AJ-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT
PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS
EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY
DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2013 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
Doc ID 17360 Rev 3
37/37