HAF2026RJ Silicon N Channel Power MOS FET Power Switching REJ03G1255-0200 Rev.2.00 Jun 02, 2006 Description This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. Features • • • • • Logic level operation (5 to 6 V Gate drive) Built-in the over temperature shut-down circuit High endurance capability against to the shut-down circuit Latch type shut down operation (need 0 voltage recovery) Built-in the current limitation circuit Outline RENESAS Package code: PRSP0008DD-D (Package name: SOP-8 (FP-8DAV)) 8 5 7 6 3 1 2 D 2 Gate Resistor Temperature Sensing Circuit Latch Circuit Current Limitation Circuit Rev.2.00 Jun 02, 2006 page 1 of 8 D 8 4 Temperature Sensing Circuit 1 S D 5 G Gate Shut-down Circuit MOS1 4 D 7 G 1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain Gate Resistor Latch Circuit MOS2 Current Limitation Circuit Gate Shut-down Circuit 3 S 6 HAF2026RJ Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Drain to source voltage VDSS 60 Gate to source voltage VGSS 16 Gate to source voltage VGSS –2.5 Drain current ID 0.6 Body-drain diode reverse drain current IDR 1 Avalanche current IAPNote3 0.6 Avalanche energy EARNote3 1.54 Cannel dissipation PchNote1 1 Cannel dissipation PchNote2 1.5 Cannel temperature Tch 150 Storage temperature Tstg –55 to +150 Notes: 1. 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s 2. 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s 3. Tc = 25°C, Rg ≥ 50 Ω Unit V V V A A A mJ W W °C °C Typical Operation Characteristics (Ta=25°C) Item Symbol VIH VIL IIH1 IIH2 Input voltage Input current (Gate non shut down) IIL IIH(sd)1 Input current (Gate shut down) Shut down temperature Gate operation voltage Drain current (Current limitation) Rev.2.00 Jun 02, 2006 IIH(sd)2 Tsd Vop ID limt page 2 of 8 Min 3.5 — — — — — — — 3.5 0.6 Typ — — — — — 0.53 0.23 175 — — Max — 1.2 100 50 1 — — — 12 1.0 Unit V V µA µA µA mA mA °C V A Test Conditions Vi = 8 V, VDS = 0 Vi = 3.5 V, VDS = 0 Vi = 1.2 V, VDS = 0 Vi = 8 V, VDS = 0 Vi = 3.5 V, VDS = 0 Cannel temperature Vi = 5 V, VDS = 3 V HAF2026RJ Electrical Characteristics (Ta = 25°C) Item Drain current Symbol ID1 ID2 ID3 Drain to source breakdown voltage V(BR)DSS Gate to source breakdown voltage V(BR)GSS V(BR)GSS IGSS1 IGSS2 IGSS3 IGSS4 IGS(OP)1 IGS(OP)2 IDSS1 Gate to source leak current Input current (shut down) Zero gate voltage drain current Gate to source cut off voltage Forward transfer admittance IDSS2 VGS(off) |yfs| Typ — — — — Max — 10 1.0 — Unit A mA A V Test Conditions VGS = 3.5 V, VDS = 2 V VGS = 1.2 V, VDS = 2 V VGS = 5 V, VDS = 3 V ID = 10 mA, VGS = 0 16 –2.5 — — — — — — — — 1.4 0.26 — — — — — — 0.53 0.23 — — — 1.3 — — 100 50 1 –100 — — 10 10 2.5 — V V µA µA µA µA mA mA µA µA V S IG = 800 µA, VDS = 0 IG = –100 µA, VDS = 0 VGS = 8 V, VDS = 0 VGS = 3.5 V, VDS = 0 VGS = 1.2 V, VDS = 0 VGS = –2.4 V, VDS = 0 VGS = 8 V, VDS = 0 VGS = 3.5 V, VDS = 0 VDS = 60 V, VGS = 0 VDS = 48 V, VGS = 0, Ta = 125°C VDS = 10 V, ID = 1 mA ID = 0.5 A, VDS = 10 VNote4 200 150 140 2.9 11 0.9 1 0.9 300 210 — — — — — — mΩ mΩ pF µs µs µs µs V ID = 0.5 A, VGS = 5 VNote4 ID = 0.5 A, VGS = 10 VNote4 VDS = 10 V, VGS = 0, f = 1MHz VGS = 5 V, ID= 0.5 A, RL = 60 Ω Body-drain diode forward voltage VDF — — — — — — — — Body-drain diode reverse recovery time trr — 61 — ns IF = 1 A, VGS = 0, diF/dt = 50 A/µs tos1 — — 85 30 — — ms ms VGS = 5 V, VDD = 16 V VGS = 5 V, VDD = 24 V Static drain to source on state resistance Output capacitance Turn-on delay time Rise time Turn off delay time Fall time Over load shut down note5 operation time RDS(on) Min 0.25 — 0.6 60 RDS(on) Coss td(on) tr td(off) tf tos2 Notes: 4. Pulse test 5. Including the junction temperature rise of the over lorded condition. Rev.2.00 Jun 02, 2006 page 3 of 8 IF = 1 A, VGS = 0 HAF2026RJ Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 10 2.0 0.1 0.03 Ta = 25°C 1 shot Pulse 1 Driver Operation atio n 100 150 0.01 0.01 0.03 0.1 0.3 200 10 30 100 Typical Transfer Characteristics 1.0 2.0 Pulse Test VDS = 10 V Pulse Test 1.6 Drain Current ID (A) Drain Current ID (A) 3 Note 6: When using the glass epoxy board. ( FR4 40 x 40 x 1.6 mm) Typical Output Characteristics 0.8 1 Drain Source Voltage VDS (V) Ambient Temperature Ta (°C) 1.2 m s s 10 50 n 10 e6 per = ot rO Operation in this area is limited by RDS(on) N tio rive 0 Op era 1D PW 0.3 < PW er 1.0 1 ms 1 n tio ra pe riv 3 O 2D Thermal shut down operation area C Drain Current ID (A) 3.0 Test condition. When using the glass epoxy board. (FR4 40 x 40 x 1.6 mm), (PW ≤ 10s) D Channel Dissipation Pch (W) 4.0 10 V 5V VGS = 3.5 V 0.4 0.8 0.6 0.4 75°C 0.2 25°C Tc = -25°C 2 4 6 8 10 2 3 4 5 Gate to Source Voltage VGS (V) Drain to Saturation Voltage vs. Gate to Source Voltage Static Drain to Source State Resistance vs. Drain Current Pulse Test 160 120 ID = 0.5 A 80 40 0.2 A 2 4 6 8 Gate to Source Voltage VGS (V) Rev.2.00 1 Drain to Source Voltage VDS (V) 200 0 0 Drain Source On Sate Resistance RDS(on) (mΩ) Drain to Source Saturation Voltage VDS(on) (mV) 0 Jun 02, 2006 page 4 of 8 10 500 VGS = 5 V 200 100 VGS = 10 V 50 20 10 0.01 0.02 Pulse Test 0.05 0.1 0.2 0.5 Drain Current ID (A) 1 2 HAF2026RJ Forward Transfer Admittance vs. Drain Current 400 ID = 0.5 A, 0.2 A 300 VGS = 5 V 200 ID = 0.5 A, 0.2 A 100 0 –25 VGS = 10 V 0 25 50 75 100 125 150 VDS =10 V 3 Pulse Test 25°C 0.3 75°C 0.1 0.03 0.01 0.003 0.001 0.01 0.03 0.1 0.3 1 Drain Current ID (A) Body to Drain Diode Reverse Recovery Time Switching Characteristics 100 Switching Time t (µs) 200 100 50 20 10 5 2 1 0.01 0.02 di / dt = 50 A / µs VGS = 0, Ta = 25°C 0.05 0.1 0.2 0.5 VGS = 5 V, VDD = 30 V PW = 300 µs, duty < 1 % 30 tr 10 td(on) 3 tf 1 td(off) 0.3 0.1 0.001 0.003 0.01 0.03 1 0.1 0.3 Reverse Drain Current IDR (A) Drain Current ID (A) Reverse Drain Current vs. Source to Drain Voltage Typical capacitance vs. Drain to Source Voltage 1 1000 Pulse Test 0.8 0.6 Tc = –25°C 1 500 VGS = 5 V 0V 0.4 0.2 0 100 10 VGS = 0 f = 1 MHz 1 0.2 0.4 0.6 0.8 1.0 Source to Drain Voltage VSD (V) Rev.2.00 10 Case Temperature Tc (°C) 1000 1.0 Reverse Drain Current IDR (A) Pulse Test Forward Transfer Admittance |yfs| (S) 500 Capacitance Coss (pF) Reverse Recovery Time trr (ns) Drain Source On State Resistance RDS(on) (mΩ) Drain to Source On State Resistance vs. Temperature Jun 02, 2006 page 5 of 8 0 10 20 30 40 Drain to Source VDS (V) 50 HAF2026RJ Shutdown Case Temperature vs. Gate to Source Voltage Shutdown Case Temperature Tc (°C) Gate to Source Voltage vs. Shutdown Time of Load-Short Test Gate to Source Voltage VGS (V) 12 10 VDD = 16 V 8 6 24 V 4 2 0 0.001 0.01 0.1 1 200 180 160 140 120 100 0 Shutdown Time of Lord-Short Test PW (S) ID = 0.2 A 2 4 6 8 10 Gate to Source Voltage VGS (V) Repetitive Avalanche Energy EAR (mJ) Avalanche Energy vs. Channel Temperature Derating 2.0 IAP = 0.6 A VDD = 25 V duty < 0.1 % Rg > 50 Ω 1.5 1 0.5 0 25 50 75 100 125 150 Channel Temperature Tch (°C) Avalanche Test Circuit Avalanche Waveform EAR = L VDS Monitor 1 2 VDSS • L • IAP2 • VDSS – VDD IAP Monitor V(BR)DSS IAP Rg D. U. T VDS VDD ID Vin 5V 50 Ω 0 Rev.2.00 Jun 02, 2006 page 6 of 8 VDD Normalized Transient Thermal Impedance γs (t) HAF2026RJ Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation) 10 1 D=1 0.5 0.1 0.1 0.05 0.2 0.02 0.01 θch-f(t) = γs (t) • θch - f θch-f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm) 0.01 e uls p ot PDM h 0.001 1s D= PW T PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Normalized Transient Thermal Impedance γs (t) Pulse Width PW (S) Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) 10 1 D=1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 θch-f(t) = γs (t) • θch - f θch-f = 166°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm) 0.01 e uls 0.001 PDM p ot D= h 1s PW T PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor 90% D.U.T. RL Vin Vout Vin 5V 50 Ω VDD = 30 V Jun 02, 2006 page 7 of 8 10% 10% 90% td(on) Rev.2.00 10% tr 90% td(off) tf HAF2026RJ Package Dimensions JEITA Package Code P-SOP8-3.95 × 4.9-1.27 RENESAS Code PRSP0008DD-D Previous Code FP-8DAV MASS[Typ.] 0.085g F Package Name SOP-8 *1 D bp 1 c *2 E Index mark HE 5 8 4 Z Terminal cross section (Ni/Pd/Au plating) * 3 bp x M NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. e Reference Symbol D E A2 A1 A bp b1 c c1 A1 A L1 L y HE e x y Z L L1 Detail F Dimension in Millimeters Min 0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 Quantity 2500 pcs Shipping Container Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.2.00 Jun 02, 2006 page 8 of 8 0.25 0° 8° 5.80 6.10 6.20 1.27 0.25 0.1 0.75 0.40 0.60 1.27 1.08 Ordering Information Part Name HAF2026RJ-EL-E Nom Max 4.90 5.3 3.95 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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