HAT1126R, HAT1126RJ Silicon P Channel Power MOS FET High Speed Power Switching REJ03G0406-0100 Rev.1.00 Sep.10.2004 Features • • • • Low on-resistance Capable of 4.5 V gate drive High density mounting “J” is for Automotive application High temperature D-S leakage guarantee Avalanche rating Outline SOP-8 7 8 D D 5 6 D D 2 G 8 4 G 5 7 6 3 1 2 S1 4 1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain S3 MOS1 MOS2 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Symbol VDSS VGSS ID ID (pulse)Note1 Ratings HAT1126R HAT1126RJ –60 ±20 –6.0 –48 –60 ±20 –6.0 –48 Avalanche current IAPNote4 — –6.0 Note4 Avalanche energy EAR — 3.08 Channel dissipation PchNote2 2 2 Channel dissipation PchNote3 3 3 Channel temperature Tch 150 150 Storage temperature Tstg –55 to +150 –55 to +150 Notes: 1. PW ≤ 10µs, duty cycle ≤ 1% 2. 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10 s 3. 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10 s 4. Value at Tch = 25°C, Rg ≥ 50 Ω Rev.1.00 Sep. 10, 2004 page 1 of 7 Unit V V A A A mJ W W °C °C HAT1126R, HAT1126RJ Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V(BR)DSS Min –60 Typ — Max — Unit V Unit ID = –10 mA, VGS = 0 Gate to Source breakdown voltage V(BR)GSS Zero gate voltage drain current IDSS HAT1126R IDSS Zero gate voltage drain current HAT1126RJ IDSS Gate to source leak current IGSS Gate to source cutoff voltage VGS(off) Forward transfer admittance |yfs| Static drain to source on state RDS(on) resistance RDS(on) Input capacitance Ciss Output capacitance Coss Reverse transfer capacitance Crss Total gate charge Qg Gate to source charge Qgs Gate to drain charge Qgd ±20 — — — — –1.0 4.0 — — — — — — — — — — — — — — 7.0 40 60 2300 230 140 37 6.5 8 — –1 — –10 ±10 –2.5 — 50 85 — — — — — — V µA µA µA µA V S mΩ mΩ pF pF pF nC nC nC IG = ±100 µA, VDS = 0 VDS = –60 V, VGS = 0 VDS = –48 V, VGS = 0 Ta = 125°C td(on) tr td(off) tf VDF — — — — — 20 15 55 10 –0.85 — — — — –1.1 ns ns ns ns V VGS = –10 V, ID= –3.0 A VDD ≅ –30 V RL = 10 Ω RG = 4.7 Ω trr — 30 — ns Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Notes: 5. Pulse test Rev.1.00 Sep. 10, 2004, page 2 of 7 VGS = ±16 V, VDS = 0 VDS = –10 V, ID = –1 mA ID = –3.0 ANote5, VDS = –10 V ID = –3.0 ANote5, VGS = –10 V ID = –3.0 ANote5, VGS = –4.5 V VDS = –10 V, VGS = 0 f = 1 MHz VDD = –25 V VGS = –10 V ID = –6.0 A IF = –6.0 A, VGS = 0Note5 IF = –6.0 A, VGS = 0 diF/dt = 100 A / µs HAT1126R, HAT1126RJ Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 10 µs –100 10 0 (A) Test condition. When using the glass epoxy board. (FR4 40 x 40 x 1.6 mm), (PW ≤ 10s) –10 ID C ive Op er 50 ion at er Op Dr 1.0 0 ive 1 pe –1 ion Ambient Temperature 150 –0.01 –0.01 200 –0.1 –1 –10 –100 (A) –3 V Drain Current –4 –2 ID = –5 A –200 –3 A –100 –1 A 0 –10 Gate to Source Voltage Rev.1.00 Sep. 10, 2004, page 3 of 7 –15 VGS –20 (V) Drain to Source On State Resistance –400 RDS(on) (mΩ) Drain to Source Saturation Voltage vs. Gate to Source Voltage –300 –6 –4 0 –4 –5 VDS (V) Pulse Test –8 –2 VGS = –2.5 V –1 –2 –3 Drain to Source Voltage VDS = –10 V Pulse Test ID (A) ID Drain Current < No 10 te6 s) Typical Transfer Characteristics Pulse Test –6 Drain to Source Saturation Voltage VDS(on) (mV) s –10 –10 V –4 V –5 m (P Drain to Source Voltage VDS (V) Note 6: When using the glass epoxy board. ( FR4 40 x 40 x 1.6 mm) Ta (°C) –8 0 10 W Operation in this area is limited by R DS(on) µs Ta = 25°C 1 shot Pulse Typical Output Characteristics –10 = tio n –0.1 at 100 O ra Drain Current Dr Channel Dissipation 2 2.0 PW D s m 3.0 1 Pch (W) 4.0 25°C Tc = 75°C −25°C –1 –2 –3 Gate to Source Voltage –4 –5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current 1000 Pulse Test 500 200 100 VGS = –4.5 V 50 –10 V 20 10 –1 –3 –10 Drain Current –30 ID (A) –100 Static Drain to Source on State Resistance vs. Temperature 160 Pulse Test 120 –5 A –1 A 80 ID = –1, –3, –5 A –10 V 0 –50 –25 0 25 50 75 Case Temperature 100 125 Tc Tc = –25°C 10 3 25°C 1 0.1 0.01 –0.01 –0.03 –0.1 –0.3 –1 –3 10000 Capacitance C (pF) 10 5 di / dt = 50 A / µs VGS = 0, Ta = 25°C 2 –0.3 –1 –3 Reverse Drain Current IDR Typical Capacitance vs. Drain to Source Voltage 300 Coss 100 Crss 30 V = 0 GS f = 1 MHz 10 0 –10 –10 (A) –12 –80 ID = –6 A 16 VGS –16 VDD = –50V –25V –10V 32 Gate Charge Rev.1.00 Sep. 10, 2004, page 4 of 7 48 64 Qg (nc) –20 160 VGS (V) Switching Time t (ns) –8 VDS –40 –50 (V) Switching Characteristics –4 –40 –30 1000 Gate to Source Voltage (V) –20 –20 Drain to Source Voltage VDS 0 VDD = –50 V –25 V –10 V Ciss 1000 Dynamic Input Characteristics 0 –10 Drain Current ID (A) 3000 1 –0.1 Drain to Source Voltage VDS VDS = –10 V Pulse Test 0.03 (°C) 20 –100 0 75°C 0.3 50 –60 Forward Transfer Admittance vs. Drain Current 30 150 Body-Drain Diode Reverse Recovery Time 100 Reverse Recovery Time trr (ns) –3 A VGS = –4.5 V 40 100 Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (mΩ) HAT1126R, HAT1126RJ 300 100 30 td(off) tf tr td(on) 10 3 1 –0.1 VGS = –10 V, VDD = –30 V PW = 5 µs, RG = 4.7 Ω, duty ≤ 1 % –0.3 –1 Drain Current ID –3 (A) –10 HAT1126R, HAT1126RJ Reverse Drain Current IDR (A) –10 –10 V Normalized Transient Thermal Impedance γs (t) 1 Pulse Test –8 –6 –5 V –4 VGS = 0, 5 V –2 0 10 Reverse Drain Current vs. Source to Drain Voltage –0.4 –0.8 –1.2 Source to Drain Voltage –1.6 –2.0 VSD (V) Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation) D=1 0.5 0.1 0.2 0.1 0.05 0.01 θch – f(t) = γs (t) • θch – f θch – f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6mm) 0.02 0.01 lse 0.001 PDM u tp D= ho 1s PW T PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Normalized Transient Thermal Impedance γs (t) 10 1 Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) D=1 0.5 0.1 0.2 0.1 0.05 0.01 θch – f(t) = γs (t) • θch – f θch – f = 166°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.02 0.01 0.001 1s ho t ls pu PDM e D= PW T PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 Pulse Width PW (S) Rev.1.00 Sep. 10, 2004, page 5 of 7 10 100 1000 10000 HAT1126R, HAT1126RJ Avalanche Test Circuit Avalanche Waveform V DS Monitor 1 2 EAR = L VDSS 2 L • I AP • VDSS - V DD I AP Monitor Rg V (BR)DSS I AP VDD D. U. T V DS ID Vin -15 V 50Ω 0 VDD Switching Time Test Circuit Switching Time Waveform Vin Vout Monitor Vin Monitor Rg 10% D.U.T. 90% RL 90% 90% Vin -10 V V DD = -10 V Vout td(on) Rev.1.00 Sep. 10, 2004, page 6 of 7 10% tr 10% td(off) tf HAT1126R, HAT1126RJ Package Dimensions As of January, 2003 Unit: mm 3.95 4.90 5.3 Max 5 8 1 1.75 Max *0.22 ± 0.03 0.20 ± 0.03 4 0.75 Max + 0.10 6.10 – 0.30 1.08 *0.42 ± 0.08 0.40 ± 0.06 0.14 – 0.04 + 0.11 0˚ – 8˚ 1.27 + 0.67 0.60 – 0.20 0.15 0.25 M *Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms — 0.085 g Ordering Information Part Name HAT1126R-EL-E HAT1126RJ-EL-E Quantity 2500 pcs 2500 pcs Shipping Container Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.1.00 Sep. 10, 2004, page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. http://www.renesas.com RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 © 2004. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .2.0