Power Loss Simulation Manual

Ver.5
User's Manual
Publication Date: April 2014
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LIST of CONTENTS
1
2
3
4
5
Introduction ................................................................................................................................................................. 4
1.1
Features of Mitsubishi Power Module Loss Simulator ....................................................................................... 4
1.2
Hardware Requirements ..................................................................................................................................... 4
1.3
Definition ............................................................................................................................................................. 4
1.4
Installation........................................................................................................................................................... 4
1.4.1 Decompression ............................................................................................................................................... 4
1.4.2 Setup............................................................................................................................................................... 5
1.5
Uninstallation ...................................................................................................................................................... 8
Description of the Windows ........................................................................................................................................ 9
2.1
Interface language setup .................................................................................................................................... 9
2.1.1 Language options ........................................................................................................................................... 9
2.1.2 Selecting the language ................................................................................................................................... 9
2.1.3 Language selection timing ............................................................................................................................ 10
2.2
Main window ..................................................................................................................................................... 11
2.3
Version .............................................................................................................................................................. 12
2.4
Power loss simulation (2 Level) ........................................................................................................................ 13
2.4.1 2Level topology selection window ................................................................................................................ 13
2.4.2 2Level device & conditions input window ..................................................................................................... 14
2.4.3 Module selection window .............................................................................................................................. 15
2.4.4 2Level result window .................................................................................................................................... 16
2.4.5 2Level graph window .................................................................................................................................... 17
2.4.6 Add device .................................................................................................................................................... 18
2.4.7 Save as Image file ........................................................................................................................................ 18
2.5
Power loss simulation (3 Level) ........................................................................................................................ 19
2.5.1 3Level topology selection ............................................................................................................................. 19
2.5.2 3Level device & conditions input window ..................................................................................................... 20
2.5.3 Module selection window .............................................................................................................................. 21
2.5.4 3Level result window .................................................................................................................................... 22
2.5.5 3Level graph window .................................................................................................................................... 23
2.5.6 Add device .................................................................................................................................................... 24
2.5.7 Save as Image file ........................................................................................................................................ 24
Procedure for sinusoidal (3 Phase) calculation ........................................................................................................ 25
3.1
Application start-up ........................................................................................................................................... 25
3.2
New design calculation ..................................................................................................................................... 26
3.2.1 Main window ................................................................................................................................................. 26
3.2.2 Select Topology Window ............................................................................................................................... 26
3.2.3 Device & conditions input window ................................................................................................................ 27
3.2.4 Result window ............................................................................................................................................... 28
3.2.5 Graph window ............................................................................................................................................... 29
3.3
Opening previous designs ................................................................................................................................ 31
3.3.1 Open the last saved design .......................................................................................................................... 31
3.3.2 Open the saved design in folders ................................................................................................................. 31
Loss calculation in chopper (Down/Motor Lock, Boost) configuration ..................................................................... 32
4.1
Application start-up ........................................................................................................................................... 32
4.2
New design calculation ..................................................................................................................................... 33
4.2.1 Main window ................................................................................................................................................. 33
4.2.2 Select topology window ................................................................................................................................ 33
4.2.3 Device & conditions input window ................................................................................................................ 34
4.2.4 Result window ............................................................................................................................................... 37
4.2.5 Graph window ............................................................................................................................................... 38
4.3
Opening previous designs ................................................................................................................................ 40
4.3.1 Open the latest saved design ....................................................................................................................... 40
4.3.2 Open the saved design in folders ................................................................................................................. 40
Loss calculation in I Type NPC configration ............................................................................................................. 41
5.1
Application Start-up .......................................................................................................................................... 41
5.2
New design calculation ..................................................................................................................................... 42
5.2.1 Main window ................................................................................................................................................. 42
5.2.2 Select Topology Window ............................................................................................................................... 42
5.2.3 Device & conditions input window ................................................................................................................ 43
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5.2.4 Result window ............................................................................................................................................... 45
5.2.5 Graph window ............................................................................................................................................... 46
5.3
Opening previous designs ................................................................................................................................ 48
5.3.1 Open the last saved design .......................................................................................................................... 48
5.3.2 Open the saved design in folders ................................................................................................................. 48
6
Loss calculation in T Type NPC configration ............................................................................................................ 49
6.1
Application start-up ........................................................................................................................................... 49
6.2
New design calculation ..................................................................................................................................... 50
6.2.1 Main window ................................................................................................................................................. 50
6.2.2 Select topology selection window ................................................................................................................. 50
6.2.3 Device & conditions input window ................................................................................................................ 51
6.2.4 Result window ............................................................................................................................................... 53
6.2.5 Graph window ............................................................................................................................................... 54
6.3
Opening previous designs ................................................................................................................................ 56
6.3.1 Open the latest saved design ....................................................................................................................... 56
6.3.2 Open the saved design in folders ................................................................................................................. 56
7
Topology (Modulation method) ................................................................................................................................. 57
7.1
2-level inverter .................................................................................................................................................. 57
7.1.1 Sinusoidal modulation ................................................................................................................................... 57
7.1.2 SVPWM(Space Vector PWM) modulation .................................................................................................... 59
7.1.3 2 phase modulation ...................................................................................................................................... 60
7.1.4 2 phase II modulation ................................................................................................................................... 61
7.1.5 High-side chopping ....................................................................................................................................... 63
7.1.6 First half chopping ........................................................................................................................................ 64
7.1.7 Down chopper / motor lock operation ........................................................................................................... 65
7.1.8 Boost chopper operation............................................................................................................................... 65
7.2
3-level inverter .................................................................................................................................................. 66
7.2.1 I Type NPC.................................................................................................................................................... 66
7.2.2 T Type (AC switch) NPC ............................................................................................................................... 69
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1
Introduction
1.1 Features of Mitsubishi Power Module Loss Simulator
The power loss simulation software for inverter systems referred in this document is named "Melcosim".
1.2 Hardware Requirements
(1) OS
Microsoft® Windows® Windows7 Professional(32bit, 64bit)
(2) HDD
50MB or more (except Microsoft® .NET Framework).
(3) Memory
500MB or more
(4) Library
Microsoft .NET Framework3.5 or later
1.3 Definition
This document explains the operation of the Mitsubishi Power Module Loss Simulator "Melcosim"
for 2Level inverter and 3-Level inverter.
* Windows is a registered trademark of Microsoft Corporation in the United States and other countries.
Mitsubishi Power Module Loss Simulator is a Microsoft .NET Framework-based application
1.4 Installation
1.4.1
Decompression
Download from the Mitsubishi Electric Homepage and decompress "Melcosim Ver.5 Installer.zip" into
an arbitrary folder.
The downloaded ZIP file should contain three :
- Melcosim Ver.5 Installer.msi
- Readme.txt
- setup.exe
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1.4.2
Setup
Execute "setup.exe".
Click the [Next >] Button
Change the installion folder, if necessary by clicking on “Browse”. (A default folder is proposed under
"Program Files".
Select the folder and click the [Next>] Button
Click the [Next>] Button for installing.
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Installing...
Click the [Close] Button to End.
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A short-cut Icon for the Melcosim Ver.5 will be generated on the Desktop after installation.
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1.5 Uninstallation
Select "Programs and Features" in Windows menu "Control Panel".
Select "Melcosim Ver.5" and then click "Uninstall"
Select "Yes", then it will start uninstall.
After the uninstallation, please confirm to erase " Melcosim Ver.5".
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2
Description of the Windows
2.1 Interface language setup
This software selects the interface language out ofseven languages by using "PowerLossSimLangSetting.exe".
2.1.1
Language options
The following languages are available:.
- English (default)
- Japanese
- German
- Chinese
- Spanish
- Portuguese
- Korean
2.1.2
Selecting the language
Click "Melcosim Ver.5 Setup Language" in the Start Menu for executing "PowerLossSimLangSetting.exe"
which starts the language selection tool.
Select your preferred language.
Click the the [OK] button of the dialog box and click the [Close] button of the ""PowerLossSimLangSetting.exe".
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2.1.3
Language selection timing
The language setup program "PowerLossSimLangSetting.exe" can be executed regardless if "Melcosim" is
already running or not. Hence, the language selection tool can be started at any time to change the current
language.
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2.2 Main window
The shown main window of Melcosim informs the actually installed version of the User Guide and Software
version information. It furthermore provides the selection options for the type of new design on the left side
of the screen and also a small file manager providing easy access to recently opened files.
(1)
(6)
(7)
(2)
(8)
(9)
(3)
(4)
(5)
(10)
(1) [2 Level New Design]
New 2 Level simulation (refer to 2.4).
(7) [Design2]
Read second latest stored calculation conditions.
(2) [3 Level New Design]
New 3 Level simulation (refer to 2.5).
(8) [Design3]
Read third latest stored calculation conditions.
(3) [Open English User Guide]
Access to the English User's Manual.
(9) [Open]
Open other stored calculation conditions from
selecting window.
(4) [Open Japanese User Guide]
Access to the Japanese User's Manual
(10) [Close]
Exit simulator (Close all windows).
(5) [About Melcosim]
Confirm version of this software and data
(refer to 2.3).
(6) [Design1]
Read latest stored calculation conditions.
Include 2 Level conditions and 3 Level conditions.
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2.3 Version
This screen confirms the program version and the data file version.
(1)
(1)[OK]
Close this window.
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2.4 Power loss simulation (2 Level)
2.4.1
2Level topology selection window
Bellows screen shows the window for selecting the topology topology.
(1)
(2)
(3)
(4)
(6)
(8)
(5)
(7)
(1) [Open] (Ctrl + O)
Open stored calculation conditions from the next
popping up selection window.
(2) [Save] (Ctrl + S)
Save calculation conditions.
(5) [Topology and modulation technique] selction
Select a suitable calculation method for the used
topology.
(refer to 7)
(6) [Selected Topology] structure
Show the selected topology and schematic.
(3) [Save As](Ctrl + A)
Save calculation conditions as a new file.
(7) [Comment]
Comment for this window.
(4) [Stage]TAB
Select window
(8) [NEXT]Button (Ctrl + N)
Set a selected topology and jump to the "Device &
Conditions Input" TAB (refer to 2.4.2).
(*1) Selected algorithm is emphasized.
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2.4.2
2Level device & conditions input window
Select Power Modules and input parameters for the power loss calculation.
(1) (2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(1) [Open] (Ctrl + O)
Open stored calculation conditions from a popping
up selection window.
(8) [Common Conditions]
Set common conditions
(9) [Tr1 Conditions] - [Tr2 Conditions]
Set Gate resistor value.
Gate resistance of Tr1 is same as Tr2 to Tr6 in
Sinusoidal, SVPWM, 2 phase, 2phase II and
First-half chopping topology.
Gate resistance of Tr1 is same as Tr3 and Tr5, gate
rresistance of Tr2 is same as Tr4 and Tr6 for 1in1
device in High-side chopping.
Default data are input after selecting the module.
These fields are invalid for IPMs.
(2) [Save] (Ctrl + S)
Save calculation conditions.
(3) [Save As](Ctrl + A)
Save calculation conditions as new file.
(4) [Stage]TAB
Select Window.
(5) [Select Module]
Open a selection window (refer to 2.4.3).
(10) [Comment]
Comment for this window.
(6) [Link to Data sheet]
Download the datasheet of the selected module
from WEB site. (internet connection required).
(7) [Keep Conditions] Check Box
Freezing common conditions when this box is
checked.
(These common conditions are maintained when
re-selecting a module.)
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(11) [EXECUTE] (Ctrl + E)
Execute calculation and jump to the [Result] TAB
(refer to 2.4.4)
with generating the [Graph] TAB (refer to 2.4.5).
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2.4.3
Module selection window
(2)
(3)
(1)
(2)
(3)
(4)
(7)
(9)
(8)
(1)
(10)
(5)
(11)
(6)
(12)
(12)
(1) [×] (ESC)
Close this window without module selection.
(2) [Series]
Module selection through module series (left window)
(3) [Current/Voltage]
Module selection through current/voltage ratings (right window)
[Series] Selection through the IGBT/IPM series
(4) [Division]
Select Division (IGBT , IPM etc.) (*1)
(5) [Series]
Select Series (NX-series, A-series etc.) (*1)
(6) [Module]
Select target module
[Current/Voltage] Selection through the current / voltage rating
(7) [Current Min]
Chose minimum value of Current rating. (*1)
(8) [Current Max]
Chose maximum value of Current rating. (*1)
(9) [Voltage Min]
Chose minimum value of Voltage rating. (*1)
(10) [Voltage Max]
Chose maximum value of Voltage rating. (*1)
(11) [Module]
Select target module.
(12) [OK]
Confirm the target module.
*1: Applicable module types in (6) or (11) are refined by each input.
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2.4.4
2Level result window
The calculation results are shown in this window along with the input calculation conditions.
(1) (2)
(3)
(4)
(5)
(6)
(7)
(8)
(1) [Open] (Ctrl + O)
Open stored calculation conditions from a popping
up selection window.
(2) [Save] (Ctrl + S)
Save calculation conditions.
(5) [Transistor (IGBT/MOSFET)] TAB
Simulation result for each Transistor.
Display the result for each Transistor by selecting
TAB.
(6) [Diode] TAB
Simulation result for each Diode
Display the result for each Diode by selecting TAB.
(3) [Save As](Ctrl + A)
Save calculation conditions as a new file.
(7) [Save Result as CSV]
Save calculation result in "CSV" format.
(4) [Stage]TAB
Select window.
(8) [Module]
Simulation result for each Module(Inverter part).
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2.4.5
2Level graph window
Several graphs of the calculation result can be selected and shown in this window.
(1) (2)
(3)
(4)
(12)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(1) [Open] (Ctrl + O)
Open stored calculation conditions from a popping
up selection window.
(2) [Save] (Ctrl + S)
Save calculation conditions.
(6) [Set Range]
Set MIN and MAX of x-Axis, y-Axis and
y2(right)-Axis.
Manual zooming by Click and Drag on the graph
are available.
(7) [RESET]
Reset range setting and zooming.
(3) [Save As](Ctrl + A)
Save calculation conditions as a new file.
(8) [Add Device]
Add or remove elements of the modulefor the
graph.
(refer to 2.4.6)
(4) [Stage]TAB
Selection window.
(5) [Graph Type] List Box
Selection of graph type (data combinations)
1: Current - Angle
2: Power Loss - Time
3: Power Loss - Current
4: Current (max) - fc
5: Temperature (ave.) - Current
6: Temperature ripple - Time
7: Temperature Rise (ave.& max.) - Current
8: Io(A), P(W) - Time
9: Io(A), P(W) - Angle
10: Tc(max) - Current
(9) [Copy to Clipboard]
Copy the graph to clipboard in "PNG" format.
(10) [Save as Image file]
Save the graph in "PNG" format.
(refer to 2.4.7)
(11) [Save Graph as CSV file]
Save graph data in "CSV" format.
(12) [Expand Graph Area]
Click this area and move scroll bar for expanding
graph width.
Maximize window and expand graph width is
recommended for getting better graph resolution.
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2.4.6
Add device
(2)
Select adding or removing elemental devices.
(3)
(1)
(4)
(5)
(1) [×] (ESC)
Cancel device’s element selection
(2) [Add]
Add elements of the device from the device list.
(3) [Remove]
Remove elements of the device from the selected devices list.
(4) [Current]
With Io waveform for phase angle confirmation.
(5) [OK]
Confirm selection.
2.4.7
Save as Image file
Save the graph in "PNG" format with simulation condition data in same name "CSV" file.
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2.5 Power loss simulation (3 Level)
2.5.1
3Level topology selection
Bellows screen shows the window for selecting the topology topology.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(1) [Open] (Ctrl + O)
Open stored calculation conditions from a popping
up selection window.
(5) [Topology]
Click on the button or schematic area to select the
calculation topology (*1)
(2) [Save] (Ctrl + S)
Save calculation conditions.
(6) [Schematic]
Click on the button or schematic area to select the
calculation topology. (*1)
(3) [Save As](Ctrl + A)
Save calculation conditions as a new file.
(7) [Comment]
Comment for this window.
(4) [Stage]TAB
Select window.
(8) [NEXT>>] (Ctrl + N)
Set a selected topology and jump to the "Device &
Conditions Input" TAB. (refer to 2.5.2)
(*1) Selected circuit name and schematic displays are emphasized.
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2.5.2
3Level device & conditions input window
Selection of the Mitsubishi Power Modules and input parameters for the loss calculation.
(1)
(2)
(3)
(6)
(4)
(7)
(8)
(9)
(10)
(11)
(5)
(1) [Open] (Ctrl + O)
Open stored calculation conditions from popping up
selection window.
(8) [Common Conditions]
Set common conditions
(9) [Tr1 Conditions] – [Tr4 Conditions]
Set Gate resistances
Gate resistances of Tr3 and Tr4 are same as Tr2
and Tr1 respectively.
Default data is input after selecting Tr1 module.
(2) [Save] (Ctrl + S)
Save calculation conditions.
(3) [Save As](Ctrl + A)
Save calculation conditions as a new file.
(10) [Comment]
Comment for this window.
(4) [Stage]TAB
Select Window.
(11) [EXECUTE] (Ctrl + E)
Execute calculation and jump to the [Result] TAB
(refer to 2.5.4).
with generating the [Graph] TAB (refer to 2.5.5)
(5) [Select Module]
Open a selection window (refer to 2.5.3)
(6) [Link to Data sheet]
Download the datasheet of the selected module
from WEB site. (internet connection needed).
(7) [Keep Conditions] Check Box
Freezing common conditions when this box is
checked.
(These common conditions are maintained when
re-selecting a module.)
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2.5.3
Module selection window
(2)
(3)
(1)
(2)
(3)
(4)
(7)
(9)
(8)
(1)
(10)
(5)
(11)
(6)
(12)
(12)
(1) [×] (ESC)
Close this window without module selection.
(2) [Series]
Module selection through module series (left window)
(3) [Current/Voltage]
Module selection through current/voltage ratings (right window)
[Series] Selection through the IGBT/IPM series
(4) [Division]
Select Division (IGBT , IPM etc.) (*1)
(5) [Series]
Select Series (NX-series, A-series etc.) (*1)
(6) [Module]
Select target module
[Current/Voltage] Selection through the current / voltage rating
(7) [Current Min]
Chose minimum value of Current rating. (*1)
(8) [Current Max]
Chose maximum value of Current rating. (*1)
(9) [Voltage Min]
Chose minimum value of Voltage rating. (*1)
(10) [Voltage Max]
Chose maximum value of Voltage rating. (*1)
(11) [Module]
Select target module.
(12) [OK]
Confirm the target module.
*1: Applicable module types in (6) or (11) are refined by each input.
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2.5.4
3Level result window
The calculation results are shown in this window along with the input calculation conditions.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(1) [Open] (Ctrl + O)
Open stored calculation conditions from a popping
up selection window.
(2) [Save] (Ctrl + S)
Save calculation conditions.
(5) [Transistor (IGBT/MOSFET)] TAB
Simulation result for each Transistor.
Display the result for each Transistor by selecting
TAB.
(6) [Diode] TAB
Simulation result for each Diode.
Display the result for each Diode by selecting TAB.
(3) [Save As](Ctrl + A)
Save calculation conditions as a new file.
(7) [Save Result as CSV]
Save calculation result in "CSV" format.
(4) [Stage]TAB
Select window.
(8) [Module]
Simulation result for each Module (Inverter part).
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2.5.5
3Level graph window
Several graphs of the calculation result can be selected and shown in this window.
(1) (2)
(3)
(4)
(12)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(1) [Open] (Ctrl + O)
Open stored calculation conditions from a popping
up selection window.
(2) [Save] (Ctrl + S)
Save calculation conditions.
(6) [Set Range]
Set MIN and MAX of x-Axis, y-Axis and
y2(right)-Axis.
Manual zooming by Click and Drag on the graph
are available.
(7) [RESET]
Reset range setting and zooming.
(3) [Save As](Ctrl + A)
Save calculation conditions as a new file.
(8) [Add Device]
Add or remove elemental devices for the graph.
(refer to 2.5.6)
(4) [Stage]TAB
Selection window.
(9) [Copy to Clipboard]
Copy the graph to clipboard in "PNG" format.
(5) [Graph Type] List Box
Select graph type
1: Current - Angle
2: Power Loss - Time
3: Power Loss - Current
4: Current (max) - fc
5: Temperature (ave.) - Current
6: Temperature ripple - Time
7: Temperature Rise (ave.& max.) - Current
8: Io(A), P(W) - Time
9: Io(A), P(W) - Angle
10: Tc(max) - Current
(10) [Save as Image file]
Save the graph in "PNG" format.
(refer to 2.5.7)
(11) [Save Graph as CSV file]
Save graph data in "CSV" format.
(12) [Expand Graph Area]
Click this area and move scroll bar for expanding
graph width.
Maximize window and expand graph width is
recommended for getting better graph resolution.
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2.5.6
Add device
(2)
Select adding or removing elemental devices.
(3)
(1)
(4)
(5)
(1) [×] (ESC)
Cancel selecting devices.
(2) [Add]
Add elements of the device from the device list.
(3) [Remove]
Remove elements of the device from the selected devices list.
(4) [Current]
With Io waveform for phase angle confirmation.
(5) [OK]
Confirm selection.
2.5.7
Save as Image file
Save the graph in "PNG" format with simulation condition data in same name "CSV" file.
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3
Procedure for sinusoidal (3 Phase) calculation
Selection of "2 Phase" modulation is carried out by clicking the corresponding button in 3.2.2 for
2 phase modulation. All other procedurer the same as for sinusoidal modulation.
3.1 Application start-up
When the software starts up, a message window pops-up showing the validity date of the software.
Click OK, then move to the main window in the case that the expiration date is still valid.
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3.2 New design calculation
3.2.1
Main window
Click the [2 Level New Design] button.
3.2.2
Select Topology Window
Click the button for the selection of "Sinusoidal" and click the [NEXT>>] button or
the [Device & Conditions Input] tab.
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3.2.3
Device & conditions input window
Select a module, set common conditions and gate resistors.
Common Conditions are set automatically to default conditions
when a power module has been selected.
After selection of all devices and setting conditions, click the [EXECUTE>>] button.
NOTE) In case a device or data has not been input into the conditions, the [EXECUTE>>] button is not available.
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3.2.4
Result window
A few seconds later, the result window will be opened automatically with calculation results.
Simulation Results
Conditions
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3.2.5
Graph window
Calculation results are shown visually in the graph window.
Adding or removing elements of the device is possible.
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The calculation conditions will be saved by using the [Save] or the [Save As] buttons at upper left side of the
screen.
Saving in graphic format is possible by the [Copy to Clipboard] or the [Save as Image file] buttons while
saving text data is possible by the [Save Graph as CSV file] button.
Saving of graph and conditions in txt data format is facilitated by clicking on the [Save as Image file]
For example: It is possible to open the CSV file of text data and then paste PNG data of graph.
Maximize window and expand graph width is recommended for getting better graph resolution.
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3.3 Opening previous designs
3.3.1
Open the last saved design
In “Design1”, “Design2” and “Design3” the three most recent designs are stored.
Those files include 2 Level conditions and 3 Level conditions.
3.3.2
Open the saved design in folders
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4
Loss calculation in chopper (Down/Motor Lock, Boost) configuration
4.1 Application start-up
When the software starts up, a message window pops-up showing the validity date of the software.
Click OK, then move to the main window in the case that the expiration date is still valid.
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4.2 New design calculation
4.2.1
Main window
Click the [2 Level New Design] button.
4.2.2
Select topology window
Click the button for the selection of "Sinusoidal" and click the [NEXT>>] button or
the [Device & Conditions Input] tab.
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4.2.3
Device & conditions input window
Select a module, set common conditions and gate resistor values.
Common conditions are set automatically to default conditions
when a power module has been selected.
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After selecting all devices and set conditions, click the [EXECUTE>>] button.
The duty is calculated from the input voltage Vi and the output voltage Vo.
The Input current Ii is calculated automatically from Io and the duty respectively.
NOTE) In case of no-selection device or no data in conditions, the [EXECUTE>>] button is not available.
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Show up the [Select Device] button for FRDi in case on selecting 1in1module for Transistor.
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4.2.4
Result window
A few seconds later, the result window will be opened automatically with calculation results.
Simulation Results
Conditions
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4.2.5
Graph window
Calculation results are shown visually in the graph window.
Adding or removing elements of the device is possible.
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The calculation conditions will be saved by using the [Save] or the [Save As] buttons at upper left side of the
screen.
Saving in graphic format is possible by the [Copy to Clipboard] or the [Save as Image file] buttons while
saving text data is possible by the [Save Graph as CSV file] button.
Saving of graph and conditions in txt data format is facilitated by clicking on the [Save as Image file]
For example: It is possible to open the CSV file of text data and then paste PNG data of graph into that file.
Maximize the window and expand graph width is recommended for getting better graph resolution.
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4.3 Opening previous designs
4.3.1
Open the latest saved design
In “Design1”, “Design2” and “Design3” the three most recent designs are stored.
Those files include 2 Level conditions and 3 Level conditions.
4.3.2
Open the saved design in folders
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5
Loss calculation in I Type NPC configration
5.1 Application Start-up
When the software starts up, a message window pops-up showing the validity date of the software.
Click OK, then move to the main window in the case that the expiration date is still valid.
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5.2 New design calculation
5.2.1
Main window
Click the [3Level New Design] button.
5.2.2
Select Topology Window
Click on the button or schematic area for the selection of "I Type NPC (1)" or "I Type NPC (2)" and click
the [NEXT>>] button or the [Device & Conditions Input] tab.
Select " I Type NPC(2)" for applying 2 in1 or chopper module.
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5.2.3
Device & conditions input window
Select a module and set common conditions and gate resistor values.
Common Conditions are set automatically when selecting the high side
power module.
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After selecting all devices and having set all conditions, click the [EXECUTE>>] button.
NOTE) In case of incomplete device or data conditions, the [EXECUTE>>] button is not available.
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5.2.4
Result window
A few seconds later, the result window will be opened automatically with calculation results.
Conditions
Simulation Results
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5.2.5
Graph window
The calculation results are shown visually in the graph window.
Adding or removing elements of the devices is possible.
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The calculation conditions will be saved by using the [Save] or the [Save As] buttons at the upper left.
Saving in graphic format is possible by the [Copy to Clipboard] or the [Save as Image file] buttons while
saving text data is possible by the [Save Graph as CSV file] button.
Saving of graph and conditions in txt data format is facilitated by clicking on the [Save as Image file]
For example.) It is possible to open the CSV file of text data and then paste PNG data of graph into tha file.
Maximize the window and expand graph width is recommended for getting better graph resolution.
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5.3 Opening previous designs
5.3.1
Open the last saved design
In “Design1”, “Design2” and “Design3” the three most recent designs are stored.
Those files include 2 Level conditions and 3 Level conditions.
5.3.2
Open the saved design in folders
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6
Loss calculation in T Type NPC configration
6.1 Application start-up
When the software starts up, a message window pops-up showing the validity date of the software.
Click OK , then move to the main window in the case that the expiration date is still valid.
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6.2 New design calculation
6.2.1
Main window
Click on the [3 Level New Design] button.
6.2.2
Select topology selection window
Click on the button of the [T Type (AC switch) NPC] or on the schematic area and click the [NEXT>>] button
or the [Device & Conditions Input] tab.
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6.2.3
Device & conditions input window
Select a module and set common conditions and gate resistor values.
Common default conditions are set automatically when selecting the high
side power module.
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After selecting all devices and having set all conditions, click the [EXECUTE>>] button.
NOTE) In case of incomplete device or data conditions, the [EXECUTE>>] button is not available.
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6.2.4
Result window
A few second later, result window will be opened automatically with calculation results.
Conditions
Simulation Results
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6.2.5
Graph window
Calculation results are shown visually in the graph window.
Adding or removing elements of the device is possible.
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The calculation conditions will be saved by using the [Save] or the [Save As] buttons at upper left side of the
screen.
Saving in graphic format is possible by the [Copy to Clipboard] or the [Save as Image file] buttons while
saving text data is possible by the [Save Graph as CSV file] button.
Saving of graph and conditions in txt data format is facilitated by clicking on the [Save to Image file]
For example: It is possible to open the CSV file of text data and then paste PNG data of graph into that file.
Maximize the window and expand graph width is recommended for getting better graph resolution.
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6.3 Opening previous designs
6.3.1
Open the latest saved design
In “Design1”, “Design2” and “Design3” the three most recent designs are stored.
Those files include 2 Level conditions and 3 Level conditions.
6.3.2
Open the saved design in folders
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7
Topology (Modulation method)
7.1 2-level inverter
7.1.1
Sinusoidal modulation
The most basic modulation method creates a sinusoidal output waveform of each phase.
The reference voltage for U-phase, V-phase and W-phase as follow.
VCC æ
1ö
ç sin q + ÷
2 è
2ø
V ì æ
2p ö 1 ü
= M CC ísin çq ÷+ ý
2 î è
3 ø 2þ
V ì æ
2p ö 1 ü
= M CC ísin çq +
÷+ ý
2 î è
3 ø 2þ
VU _ ref = M
VV _ ref
VW _ ref
M: Modulation ratio, VCC: DC bus voltage
VU_ref
VV_ref
VW_ref
Interphase voltage also sinusoidal.
VU -V = VU _ ref - VV _ ref = M
VCC
V
2p ö
3
pö
æ
æ
sin q - M CC sin çq M × VCC sin çq + ÷
÷=
2
2
3 ø 2
6ø
è
è
Outut current Io is calculated by cosΦ from reference voltage.
VU_ref
IU
Φ
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The corresponding PWM Duty is simply calculated by comparing the count value of an up-down counter of micro
controller with a reference voltage which is sinusoidal in this case.
Dead time as applied between high and low side in real PWM halfbridge switching operations is not considered for
the loss simulation.
Sinusoidal ref.
Io
Triangle
Duty ref.
High-side PWM
Low-side PWM
The power loss is calculated by the following analytical equation taking into account the interval mean values of the
saturation voltages / forward voltage drops and currents being integrated / summed up over the entire cycle. By
consideration of the duty cycle in that equation the mean power of each device can be calculated as follows:
PDC (IGBT ) =
PSW (IGBT ) =
å (I
2p
phase = 0
)
PDC ( FWDi ) =
, C ´ VCE ( sat ) @ I C ´ Duty (on ) å (E
2p
phase = 0
on @ I C
)
+ Eoff @ I C , PSW ( FWDi ) =
å (I
2p
phase = 0
C
)
´ VEC @ I C ´ Duty (off )
2p
åE
phase = 0
Current of IGBT
rr @ I C
Current of FWDi
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7.1.2
SVPWM(Space Vector PWM) modulation
The reference voltage of SVPWM is shown in the following drawing.
VU_ref
VV_ref
VW_ref
While the reference voltage of each phase does not show a sinusoidal waveform the inter phase voltage has got
the desired sinusoidal voltage waveform shape.
V U_ref -V V_ref
V V_ref -V W_ref
V W_ref -VU_ref
From that the out current Io is calculated by a cosΦ from the reference voltage.
VU_ref
IU
Φ
The modulation ratio of this SVPWM is defined to be even output voltage with sinusoidal modulation.
So, maximum modulation ratio is 1.1547( = 2 3 ).
Refer to 7.1.1 for PWM duty calculation.
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7.1.3
2 phase modulation
In two phase are modulation one phase is fixed and and the two remaining phases are performing the PWM.
This approach may save switching loss compared with classical 3-switch modulation.
The reference voltage is not sinusoidal waveform but the interphase voltage has got a sinusoidal waveform shape.
VU_ref
VV_ref
VW_ref
V U_ref -V V_ref
V V_ref -V W_ref
V W_ref -VU_ref
Ouput current Io is calculated by cosΦ from the reference voltage.
VU_ref
IU
Φ
The modulation ratio of this 2 phase modulation approach is defined to be even output voltage
with sinusoidal modulation.
So, maximum modulation ratio is 1.1547( = 2 3 ).
Refer to 7.1.1 forPWM duty calculation.
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7.1.4
2 phase II modulation
This is a space vector modulation scheme where two phases are modulating and the remaining phases
is not performing PWM.
VU_ref
VV_ref
VW_ref
This reference voltage is for the PWM duty of the upper-arm switches and its complement PWM duty is
applied for the lower-arm switching elements.
Power loss and temperature rising for upper-arm and lower-arm is different.
UP_Duty
UN_Duty
The reference voltage is not sinusoidal waveform but interphase voltage is sinusoidal waveform.
V U_ref -V V_ref
V V_ref -V W_ref
V W_ref -VU_ref
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The output current Io is calculated by cosΦ from reference voltage.
VU_ref
IU
Φ
The modulation ratio of this 2 phase II modulation approach is defined to be even output voltage
with sinusoidal modulation.
So, maximum modulation ratio is 1.1547( = 2 3 ).
Refer to 7.1,1 for PWM duty calculation.
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High-side chopping
7.1.5
In this PWM scheme the upper-arm is chopping for 120 degrees (π/3) of 360 degrees(2π) and
the lower-arm turns on in for 120 degrees(π/3) of 360 degrees(2π) with a shift of 180 degrees(π)
to the upper-arm.
There is a constant duty in one cycle.
Tr1(UP)
Tr3(VP)
Tr5(WP)
Tr2(UN)
Tr4(VN)
Tr6(WN)
The output current Io is defined as rectangular current wave shape as follows.
IU
The power loss of the upper-arm IGBT is the sum of DC loss and switching loss.
For this PWM scheme the following equations provide the base for the loss calculation:
PDC ( IGBT _ UP ) = I C ´ VCE ( sat ) ´ Duty (on )　, PSW ( IGBT _ UP ) = (Eon + Eoff )´ f SW
1
PIGBT _ UP = ´ (PDC ( IGBT _ UP ) + PSW ( IGBT _ UP ) )
3
The power loss of the upper-arm’s FWDi is nearly zero.
PFWDi _ UP = 0
Lower-arm’s IGBT power loss is DC only.
1
PIGBT _ UN = ´ I C ´ VCE ( sat )
3
The power loss of the lower-arm’s FWDi is the sum of DC loss and switching loss.
PDC ( FWDi _ UN ) = I C ´ VEC ´ Duty (off )　, PSW ( FWDi _ UN ) = Err ´ f SW
1
PFWDi _ UN = ´ (PDC ( FWDi _ UN ) + PSW ( FWDi _ UN ) )
3
Then the power loss and temperature rise for upper-arm and lower-arm is different.
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7.1.6
First half chopping
This PWM scheme incorporates a current conducting period of 120degrees and a chopping operation in the first 60
degrees of the cycle.
There is a constant duty in one cycle.
Tr1(UP)
Tr3(VP)
Tr5(WP)
Tr2(UN)
Tr4(VN)
The output current Io is defined as rectangular current wave shape as follows.
IU
The power loss of the upper-arm IGBT is the sum of DC loss and switching loss. For this PWM scheme the
following equations provide the base for the loss calculation:
PDC ( IGBT _ chopping ) = I C ´ VCE ( sat ) ´ Duty (on )　, PSW ( IGBT ) = (Eon + Eoff )´ f SW , PDC ( IGBT _ flat ) = I C ´ VCE ( sat )
1
PIGBT = ´ (PDC ( IGBT _ chopping ) + PSW ( IGBT ) + PDC ( IGBT _ flat ) )
6
Power loss of FWDi is sum of DC loss and switching loss.
PDC ( FWDi ) = I C ´ VEC ´ Duty (off )　, PSW ( FWDi ) = Err ´ f SW
1
PFWDi = ´ (PDC ( FWDi ) + PSW ( FWDi ) )
6
A balanced power loss are generated in upper-arm and lower-arm by this PWM approach.
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7.1.7
Down chopper / motor lock operation
In down chopper (buck) and rotor lock operation the power loss and temperature rise is calculated in the same way.
The duty is calculated from the input voltage Vi and the output voltage Vo.
The Input current Ii is calculated automatically from Io and the duty respectively.
Duty =
VO
, Ii = Duty ´ I O
Vi
Vo is recalculated whenever the input “Duty” is changed. Hence,
VO £ Vi is the simulation range in buck converter.
7.1.8
Boost chopper operation
The boost chopper’s mode calculation power loss and temperature rise is calculated as follows:.
The duty is calculated from the input voltage Vi and the output voltage Vo.
The input current Ii is calculated automatically from Io and the duty respectively.
Duty =
VO - Vi
I
, I i = O
Vi
Duty
Vo is recalculated whenever a value is written to the “Duty” entry field. Hence,
Vi £ VO is the simulation range in buck converter.
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7.2 3-level inverter
I Type NPC
7.2.1
The most basic modulation method creates a sinusoidal output
waveform of each phase by using 3-level inverter topology.
Free Wheeling Diodes (Di1 to Di4) are anti-parallel connection to
IGBTs (Tr1 to Tr4) and they are connected serially with Diodes (Di5,
Di6) as right drawing (one-leg).
The fuature of this topology is able to use half rating voltage devices
and half dv/dt from 2-level inverter.
The reference voltage for U-phase, V-phase and W-phase as follow
same as 2-level inverter.
VCC æ
1ö
ç sin q + ÷
2 è
2ø
V ì æ
2p
= M CC ísin çq 2 î è
3
VU _ ref = M
VV _ ref
VW _ ref
ö 1ü
÷+ ý
ø 2þ
V ì æ
2p ö 1 ü
= M CC ísin çq +
÷+ ý
2 î è
3 ø 2þ
M: Modulation ratio, VCC: DC bus voltage
VU_ref
VV_ref
VW_ref
Interphase voltage also sinusoidal.
VU -V = VU _ ref - VV _ ref = M
VCC
V
2p ö
3
pö
æ
æ
sin q - M CC sin çq M × VCC sin çq + ÷
÷=
2
6ø
2
3 ø 2
è
è
Outut current Io is calculated by cosΦ from reference voltage.
VU_ref
IU
Φ
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The corresponding PWM Duty is simply calculated by comparing the count value of double up-down counter of
micro controller with a reference voltage which is sinusoidal in this case.
Dead time as applied between Tr1 and Tr3, Tr2 and Tr4 in real PWM switching operations is not considered for the
loss simulation.
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The power loss is calculated by the following analytical equation taking into account the interval mean values of the
saturation voltages / forward voltage drops and currents being integrated / summed up over the entire cycle. By
consideration of the duty cycle in that equation the mean power of each device can be calculated as follows:
PDC (IGBT ) =
PSW (IGBT ) =
å (I
2p
phase = 0
)
PDC ( FWDi ) =
, C ´ VCE ( sat ) @ I C ´ Duty (on ) å (E
2p
phase = 0
on @ I C
)
PSW ( FWDi ) =
+ Eoff @ I C , å (I
2p
phase = 0
C
)
´ VEC @ I C ´ Duty (off )
2p
åE
phase = 0
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7.2.2
T Type (AC switch) NPC
This is the one of modulation methods for sinusoidal
output waveform of each phase by using 3-level inverter
topology.
Free Wheeling Diodes (Di1 and Di2) are connected to
IGBTs (Tr1 and Tr2) anti-parallelly, and these are
factored in 2-level inverter connection and these chips
are connected serially with IGBTs (Tr3 and Tr4) with
anti-parallel Free Wheering Diodes (Di3 and Di4) as
shown in right figure (one-leg).
The reference voltage for U, V and W-phase are shown
in following figure same as 2-level inverter.
However, this circuit is comprised of number of power
chips less than I TypeNPC 3-level inverter, the chops for
Tr1, Tr2, FWDi1 and FWDi2 must be celected same as
for 2-level inverter in withstand voltage.
Command has been changed to system which
sinusoidal modulation (7.2.1) of I Type 3-level inverter
circuit, Tr2 and Tr4 have been exchanged.
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The current waveforms for loss simulation are shown as following figure.
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Keep safety first in your circuit designs!
Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more
reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead
to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit
designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of
non-flammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
•These materials are intended as a reference to assist our customers in the selection of the Mitsubishi
semiconductor product best suited to the customer’s application; they do not convey any license under any
intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party.
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examples contained in these materials.
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represents information on products at the time of publication of these materials, and are subject to change by
Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore
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The information described here may contain technical inaccuracies or typographical errors. Mitsubishi Electric
Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or
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Please also pay attention to information published by Mitsubishi Electric Corporation by various means, including
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•When using any or all of the information contained in these materials, including product data, diagrams, charts,
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•Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system
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Any diversion or re-export contrary to the export control laws and regulations of Japan and/or the country of
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•Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for
further details on these materials or the products contained therein.
© 2014 MITSUBISHI ELECTRIC CORPORATION. ALL RIGHTS RESERVED.
DIPIPM and CSTBT are registered trademarks of MITSUBISHI ELECTRIC CORPORATION.
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