MC9RS08KB12 Data Sheet

Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9RS08KB12
Rev. 5, 1/2012
MC9RS08KB12
MC9RS08KB12 Series
Covers:MC9RS08KB12
MC9RS08KB8
MC9RS08KB4
MC9RS08KB2
• 8-Bit RS08 Central Processor Unit (CPU)
– Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature
range of –40 °C to 85 °C
– Subset of HC08 instruction set with added BGND
instruction
– Single Global interrupt vector
• On-Chip Memory
– Up to 12 KB flash read/program/erase over full
operating voltage and temperature,
12 KB/8 KB/4 KB/2 KB flash are optional
– Up to 254-byte random-access memory (RAM),
254-byte/126-byte RAM are optional
– Security circuitry to prevent unauthorized access to flash
contents
• Power-Saving Modes
– Wait mode — CPU shuts down; system clocks continue
to run; full voltage regulation
– Stop mode — CPU shuts down; system clocks are
stopped; voltage regulator in standby
– Wakeup from power-saving modes using RTI, KBI,
ADC, ACMP, SCI and LVD
• Clock Source Options
– Oscillator (XOSC) — Loop-control Pierce oscillator;
crystal or ceramic resonator range of 31.25 kHz to
39.0625 kHz or 1 MHz to 16 MHz
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 2% deviation over temperature and voltage;
supporting bus frequencies up to 10 MHz
• System Protection
– Watchdog computer operating properly (COP) reset
with option to run from dedicated 1 kHz internal low
power oscillator
– Low-voltage detection with reset or interrupt
– Illegal opcode detection with reset
– Illegal address detection with reset
– Flash-block protection
20-Pin SOIC
Case 751D
24-Pin QFN
Case 1982-01
16-Pin TSSOP
Case 948F
16-Pin SOIC N/B
Case 751B
8-Pin DFN
Case 1452-02
• Development Support
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
• Peripherals
– ADC — 12-channel, 10-bit resolution; 2.5 μs
conversion time; automatic compare function;
1.7 mV/°C temperature sensor; internal bandgap
reference channel; operation in stop; hardware trigger
– ACMP — Analog comparator; full rail-to-rail supply
operation; option to compare to fixed internal bandgap
reference voltage; can operate in stop mode
– TPM — One 2-channel timer/pulse-width modulator
module; selectable input capture, output compare, or
buffered edge- or center-aligned PWM on each channel
– IIC — Inter-integrated circuit bus module capable of
operation up to 100 kbps with maximum bus loading;
capable of higher baud rates with reduced loading
– SCI — One serial communications interface module
with optional 13-bit break; LIN extensions
– MTIM — Two 8-bit modulo timers; optional clock
sources
– RTI — One real-time clock with optional clock sources
– KBI — Keyboard interrupts; up to 8 ports
• Input/Output
– 18 GPIOs in 24- and 20-pin packages; 14 GPIOs in 16-pin
package; 6 GPIOs in 8-pin package; including one
output-only pin and one input-only pin
– Hysteresis and configurable pullup device on all input
pins; configurable slew rate and drive strength on all
output pins
• Package Options
– MC9RS08KB12/MC9RS08KB8/MC9RS08KB4
— 24-pin QFN, 20-pin SOIC, 16-pin SOIC NB or
TSSOP
– MC9RS08KB2
— 8-pin SOIC or DFN
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2008-2012. All rights reserved.
8-Pin SOIC
Case 751
Table of Contents
1
2
3
MCU Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Parameter Classification. . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . 7
3.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.5 ESD Protection and Latch-Up Immunity. . . . . . . . . . . . . 8
3.6 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.7 Supply Current Characteristics. . . . . . . . . . . . . . . . . . . 23
3.8 External Oscillator (XOSC) Characteristics . . . . . . . . . 26
3.9 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4
5
3.9.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . .27
3.9.2 TPM/MTIM Module Timing . . . . . . . . . . . . . . . .28
3.10 Analog Comparator (ACMP) Electrical . . . . . . . . . . . . .28
3.11 Internal Clock Source Characteristics. . . . . . . . . . . . . .29
3.12 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .29
3.13 Flash Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .33
3.14 EMC Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
3.14.1 Radiated Emissions . . . . . . . . . . . . . . . . . . . . . .35
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Mechanical Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will
be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://freescale.com/
The following revision history table summarizes changes contained in this document.
Revision
Date
Description of Changes
1
4/13/2009
Updated on shared review comments, added package information.
2
5/22/2009
Completed most of the TBDs, corrected the block diagram.
3
8/31/2009
Completed all the TBDs.
Changed VLVD and added RPD in the Table 7.
Changed SIDD, ADC adder from stop, RTI adder from stop with 1 kHz clock source
enabled and LVI adder from stop at 5 V in the Table 8.
4
6/23/2011
Split the 10-Bit ADC Characteristics to Table 15 and Table 16 for the VDDAD
ranges.
Corrected the note 4 in the Table 8.
5
1/30/2012
Added 24-pin QFN package.
Related Documentation
Find the most current versions of all documents at: http://www.freescale.com
Reference Manual
(MC9RS08KB12RM)
Contains extensive product information including modes of operation, memory,
resets and interrupts, register definition, port pins, CPU, and all module
information.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
2
Freescale Semiconductor
MCU Block Diagram
1
MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9RS08KB12 MCU.
VREFH
VREFL
VDDAD
VSSAD
12-CH 10-BIT
ANALOG-TO-DIGITAL
CONVERTER(ADC)
ANALOG COMPARATOR
(ACMP)
ADP[3:0]
ADP[7:4]
ADP[11:8]
ACMP+
ACMPACMPO
RS08 CORE
8-BIT KEYBOARD
RESET
INTERRUPT(KBI)
BDC
CPU
SERIAL COMMUNICATION
INTERFACE (SCI)
RS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
COP
RTI
WAKEUP
LVD
KBIP[3:0]
KBIP[7:4]
2-CH TIMER/PWM
MODULE (TPM)
MODULO TIMER
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
PORT A
VDD
VSS
TxD
RxD
PTA2/KBIP2/SDA/RxD/ADP2
PTA3/KBIP3/SCL/TxD/ADP3
PTA4/ACMPO/BKGD/MS2
PTA5/TCLK/RESET/VPP1
TPMCH0
TPMCH1
TCLK
TCLK
PTB0/KBIP4/RxD/ADP4
(MTIM1)
PTB1/KBIP5/TxD/ADP5
USER FLASH
MC9RS08KB12 = 12 KB
MC9RS08KB8 = 8 KB
MC9RS08KB4 = 4 KB
MC9RS08KB2 = 2 KB
MODULO TIMER
(MTIM2)
INTER-INTEGRATED
USER RAM
MC9RS08KB12/KB8 = 254 BYTES
MC9RS08KB4/KB2 = 126 BYTES
CIRCUIT MODULE (IIC)
TCLK
SCL
SDA
PTB2/KBIP6/ADP6
PORT B
VPP
PTB3/KBIP7/ADP7
PTB4/TPMCH0
PTB5/TPMCH1
PTB6/SDA/XTAL
PTB7/SCL/EXTAL
XTAL
20 MHz INTERNAL CLOCK
SOURCE (ICS)
EXTAL
PTC0/ADP8
PORT C
LOW-POWER OSCILLATOR
31.25 kHz to 39.0625 kHz
1 MHz to 16 MHz
(XOSC)
VDD
VSS
PTC1/ADP9
PTC2/ADP10
PTC3/ADP11
VOLTAGE REGULATOR
NOTES:
1. PTA5/TCLK/RESET/VPP is an input-only pin when used as port pin
2. PTA4/ACMPO/BKGD/MS is an output-only pin when used as port pin
Figure 1. MC9RS08KB12 Series Block Diagram
2
Pin Assignments
This section shows the pin assignments in the packages available for the MC9RS08KB12 series.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
3
Pin Assignments
Table 1. Pin Availability by Package Pin-Count
Pin Number
<-- Lowest
24
20
16
8
1
3
3
3
2
—
—
—
3
4
4
4
Port Pin
Alt 1
Priority
--> Highest
Alt 2
Alt 3
Alt 4
VDD
NC
VSS
1
4
5
5
—
PTB7
SCL
5
6
6
—
PTB6
SDA1
EXTAL
XTAL
2
6
7
7
—
PTB5
TPMCH1
7
8
8
—
PTB4
TPMCH02
8
9
—
—
PTC3
ADP11
9
10
—
—
PTC2
ADP10
10
11
—
—
PTC1
ADP9
11
12
—
—
PTC0
ADP8
12
13
9
—
PTB3
KBIP7
13
14
10
—
PTB2
KBIP6
ADP7
ADP6
14
15
11
—
PTB1
KBIP5
TxD3
15
16
12
—
PTB0
KBIP4
RxD3
ADP4
TxD3
ADP3
ADP5
16
17
13
5
PTA3
KBIP3
SCL1
17
18
14
6
PTA2
KBIP2
SDA1
RxD3
ADP2
ADP1
ACMP–
18
19
15
7
PTA1
KBIP1
TPMCH12
19
20
16
8
PTA0
KBIP0
TPMCH02
ADP0
ACMP+
20
—
—
—
NC
21
—
—
—
NC
22
—
—
—
NC
23
1
1
1
PTA5
TCLK
RESET
VPP
24
2
2
2
PTA4
BKGD
MS
ACMPO
1
IIC pins can be remapped to PTB6 and PTB7, default reset location is PTA2 and PTA3. It can be
configured only once.
2 TPM pins can be remapped to PTB4 and PTB5, default reset location is PTA0 and PTA1.
3 SCI pins can be remapped to PTA2 and PTA3, default reset location is PTB0 and PTB1. It can be
configured only once.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
4
Freescale Semiconductor
VDD
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
NC
NC
NC
Pin 1 indicator
PTA5/TCLK/RESET/Vpp
PTA4/ACMPO/BKGD/MS
Pin Assignments
24 23 22 21 20 19
18 PTA1/KBIP1/TPMCH1/ADP1/ACMP–
17 PTA2/KBIP2/SDA/RxD/ADP2
3
16 PTA3/KBIP3/SCL/TxD/ADP3
PTB7/SCL/EXTAL
4
15 PTB0/KBIP4/RxD/ADP4
PTB6/SDA/XTAL
5
14 PTB1/KBIP5/TxD/ADP5
PTB5/TPMCH1
6
13 PTB2/KBIP6/ADP6
10 11 12
PTB3/KBIP7/ADP7
9
PTC0/ADP8
PTC3/ADP11
PTB4/TPMCH0
7 8
PTC1/ADP9
VSS
PTC2/ADP10
NC
1
2
Figure 2. MC9RS08KB12 Series 24-Pin QFN Package
PTA5/TCLK/RESET/VPP
1
20
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTA4/ACMPO/BKGD/MS
2
19
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
VDD
3
18
PTA2/KBIP2/SDA/RxD/ADP2
VSS
4
17
PTA3/KBIP3/SCL/TxD/ADP3
PTB7/SCL/EXTAL
5
16
PTB0/KBIP4/RxD/ADP4
PTB6/SDA/XTAL
6
15
PTB1/KBIP5/TxD/ADP5
PTB5/TPMCH1
7
14
PTB2/KBIP6/ADP6
PTB4/TPMCH0
8
13
PTB3/KBIP7/ADP7
PTC3/ADP11
9
12
PTC0/ADP8
PTC2/ADP10
10
11
PTC1/ADP9
Figure 3. MC9RS08KB12 Series 20-Pin SOIC Package
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
5
Electrical Characteristics
PTA5/TCLK/RESET/VPP
1
16
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTA4/ACMPO/BKGD/MS
2
15
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
VDD
3
14
PTA2/KBIP2/SDA/RxD/ADP2
VSS
4
13
PTA3/KBIP3/SCL/TxD/ADP3
PTB7/SCL/EXTAL
5
12
PTB0/KBIP4/RxD/ADP4
PTB6/SDA/XTAL
6
11
PTB1/KBIP5/TxD/ADP5
PTB5/TPMCH1
7
10
PTB2/KBIP6/ADP6
PTB4/TPMCH0
8
9
PTB3/KBIP7/ADP7
Figure 4. MC9RS08KB12 Series 16-Pin SOIC NB/TSSOP Package
PTA5/TCLK/RESET/VPP
1
8
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTA4/ACMPO/BKGD/MS
2
7
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
VDD
3
6
PTA2/KBIP2/SDA/RxD/ADP2
VSS
4
5
PTA3/KBIP3/SCL/TxD/ADP3
Figure 5. MC9RS08KB12 Series 8-Pin SOIC/DFN Package
3
Electrical Characteristics
3.1
Introduction
This chapter contains electrical and timing specifications for the MC9RS08KB12 series of
microcontrollers available at the time of publication.
3.2
Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the
customer a better understanding the following classification is used and the parameters are tagged
accordingly in the tables where appropriate:
Table 2. Parameter Classifications
P
Those parameters are guaranteed during production testing on each individual device.
C
Those parameters are achieved by the design characterization by measuring a statistically relevant
sample size across process variations.
T
Those parameters are achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted. All values shown in the typical column are within this
category.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
6
Freescale Semiconductor
Electrical Characteristics
Table 2. Parameter Classifications
D
Those parameters are derived mainly from simulations.
NOTE
The classification is shown in the column labeled “C” in the parameter
tables where appropriate.
3.3
Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not
guaranteed. Stress beyond the limits specified in Table 3 may affect device reliability or cause permanent
damage to the device. For functional operating conditions, refer to the remaining tables in this chapter.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (for instance, VSS or VDD) or the programmable pull-up
resistor associated with the pin is enabled.
Table 3. Absolute Maximum Ratings
Rating
Symbol
Value
Unit
Supply voltage
VDD
–0.3 to 5.8
V
Maximum current into VDD
IDD
120
mA
Digital input voltage
VIn
–0.3 to VDD + 0.3
V
Instantaneous maximum current
Single pin limit (applies to all port pins)1, 2, 3
ID
±25
mA
Tstg
–55 to 150
°C
Storage temperature range
1
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two
resistance values.
2 All functional non-supply pins are internally clamped to V
SS and VDD except the RESET/VPP pin which is internally
clamped to VSS only.
3 Power supply must maintain regulation within operating V
DD range during instantaneous and operating maximum
current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD
and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater
than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are:
if no system clock is present, or if the clock rate is very low which would reduce overall power consumption.
3.4
Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package
thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in
on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the
MCU design. In order to take PI/O into account in power calculations, determine the difference between
actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
7
Electrical Characteristics
unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very
small.
Table 4. Thermal Characteristics
Rating
Symbol
Value
Unit
TA
TL to TH
–40 to 85
°C
Maximum junction temperature
TJMAX
150
°C
Thermal resistance 24-pin QFN
θJA
113
°C/W
Thermal resistance 20-pin SOIC
θJA
83
°C/W
Thermal resistance 16-pin SOIC NB
θJA
103
°C/W
Thermal resistance 16-pin TSSOP
θJA
29
°C/W
Thermal resistance 8-pin SOIC
θJA
150
°C/W
Thermal resistance 8-pin DFN
θJA
110
°C/W
Operating temperature range (packaged)
The average chip-junction temperature (TJ) in °C can be obtained from:
TJ = TA + (PD × θJA)
Eqn. 1
where:
TA = Ambient temperature, °C
θJA = Package thermal resistance, junction-to-ambient, °C /W
PD = Pint + PI/O
Pint = IDD × VDD, Watts chip internal power
PI/O = Power dissipation on input and output pins user determined
For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ
(if PI/O is neglected) is:
PD = K ÷ (TJ + 273°C)
Eqn. 2
Solving Equation 1 and Equation 2 for K gives:
K = PD × (TA + 273°C) + θJA× (PD)2
Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring
PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by
solving Equation 1 and Equation 2 iteratively for any value of TA.
3.5
ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
8
Freescale Semiconductor
Electrical Characteristics
During the device qualification ESD stresses were performed for the human body model (HBM) and the
charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Table 5. ESD and Latch-Up Test Conditions
Model
Human
body
Description
Symbol
Value
Unit
Series resistance
R1
1500
Ω
Storage capacitance
C
100
pF
Number of pulses per pin
—
1
—
Minimum input voltage limit
—
–2.5
V
Maximum input voltage limit
—
7.5
V
Latch-up
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
9
Electrical Characteristics
Table 6. ESD and Latch-Up Protection Characteristics
No.
1
3.6
Rating1
Symbol
Min
Max
Unit
1
Human body model (HBM)
VHBM
±2000
—
V
2
Charge device model (CDM)
VCDM
±500
—
V
3
Latch-up current at TA = 85 °C
ILAT
±100
—
mA
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
DC Characteristics
This section includes information about power supply requirements, I/O pin characteristics, and power
supply current in various operating modes.
Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient)
No.
C
Parameter
1
—
Supply voltage (run, wait and stop modes.)
0 < fBus <10 MHz
2
C
Minimum RAM retention supply voltage applied to
VDD
3
P
4
C
Power on RESET (POR) voltage
5
C
6
Symbol
Min
Typical
Max
Unit
VDD
1.8
—
5.5
V
VRAM
0.81
—
—
V
VLVD
1.80
1.88
1.86
1.94
1.95
2.05
V
Low-voltage detection threshold
(VDD falling)
(VDD rising)
VPOR1
0.9
—
1.7
V
Input high voltage (VDD > 2.3V) (all digital inputs)
VIH
0.70 × VDD
—
—
V
C
Input high voltage (1.8 V ≤ VDD ≤ 2.3 V) (all digital
inputs)
VIH
0.85 × VDD
—
—
V
7
C
Input low voltage (VDD > 2.3 V) (all digital inputs)
VIL
—
—
0.30 × VDD
V
8
C
Input low voltage (1.8 V ≤ VDD ≤ 2.3 V)
(all digital inputs)
VIL
—
—
0.30 × VDD
V
9
C
Input hysteresis (all digital inputs)
Vhys1
0.06 × VDD
—
—
V
10
P
Input leakage current (per pin)
VIn = VDD or VSS, all input only pins
|IIn|
—
0.025
1.0
μA
11
P
High impedance (off-state) leakage current (per
pin)
VIn = VDD or VSS, all input/output
|IOZ|
—
0.025
1.0
μA
12
P
Internal pullup resistors2(all port pins)
RPU
20
45
65
kΩ
13
P
Internal pulldown resistors2(all port pins)
RPD
20
45
65
kΩ
VDD – 0.8
—
—
—
—
—
—
—
—
—
—
—
—
—
40
14
15
C
C
Output high voltage — Low drive (PTxDSn = 0)
5 V, ILoad = 2 mA
3 V, ILoad = 1 mA
1.8 V, ILoad = 0.5 mA
Output high voltage — High drive (PTxDSn = 1)
5 V, ILoad = 5 mA
3 V, ILoad = 3 mA
1.8 V, ILoad = 2 mA
Maximum total IOH for all port pins
VOH
VDD – 0.8
|IOHT|
—
V
mA
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
10
Freescale Semiconductor
Electrical Characteristics
Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient) (continued)
No.
16
17
C
C
C
Parameter
Symbol
Output low voltage — Low drive (PTxDSn = 0)
5 V, ILoad = 2 mA
3 V, ILoad = 1 mA
1.8 V, ILoad = 0.5 mA
Min
Typical
Max
—
—
—
—
—
—
0.8
—
—
—
—
—
—
0.8
—
—
40
mA
—
—
—
—
0.2
0.8
mA
—
—
7
pF
VOL
Output low voltage — High drive (PTxDSn = 1)
5 V, ILoad = 5 mA
3 V, ILoad = 3 mA
1.8 V, ILoad = 2 mA
IOLT
Maximum total IOL for all port pins
Unit
V
3 , 4 , 5 ,6
18
19
1
2
3
4
5
6
C
C
DC injection current
VIn < VSS, VIn > VDD
Single pin limit
Total MCU limit, includes sum of all stressed pins
CIn
Input capacitance (all non-supply pins)
This parameter is characterized and not tested on each device.
Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown.
All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP which is internally clamped to
VSS only.
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
This parameter is characterized and not tested on each device.
VOH vs. IOH (High Drive) at Vdd=5.5V
5.60
5.40
VOH (V)
5.20
85C
5.00
25C
4.80
-40C
4.60
4.40
4.20
1
2
3
4
5
6
7
8
9
11
13
15
17
IOH (mA)
Figure 6. Typical VOH vs. IOH
VDD = 5.5 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
11
Electrical Characteristics
VOH vs. IOH (Low Drive) at Vdd=5.5V
6.00
VOH (V)
5.00
4.00
85C
25C
3.00
-40C
2.00
1.00
0.00
1
2
3
4
5
6
IOH (mA)
Figure 7. Typical VOH vs. IOH
VDD = 5.5 V (Low Drive)
VOH vs. IOH (High Drive) at Vdd=3.0V
3.50
3.00
VOH (V)
2.50
85C
2.00
25C
1.50
-40C
1.00
0.50
0.00
1
2
3
4
5
6
7
8
9
10
IOH (mA)
Figure 8. Typical VOH vs. IOH
VDD = 3.0 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
12
Freescale Semiconductor
Electrical Characteristics
VOH vs. IOH (Low Drive) at Vdd=3.0V
3.00
VOH (V)
2.50
2.00
85C
1.50
25C
-40C
1.00
0.50
0.00
1
2
IOH (mA)
Figure 9. Typical VOH vs. IOH
VDD = 3.0 V (Low Drive)
VOH vs. IOH (High Drive) at Vdd=1.8V
VOH (V)
1.80
1.60
1.40
1.20
85C
1.00
0.80
25C
-40C
0.60
0.40
0.20
0.00
1
2
3
IOH (mA)
Figure 10. Typical VOH vs. IOH
VDD = 1.8 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
13
Electrical Characteristics
VOH (V)
VOH vs. IOH (Low Drive) at Vdd=1.8V
1.80
1.60
1.40
1.20
1.00
0.80
0.60
0.40
0.20
0.00
85C
25C
-40C
0.3
0.4
0.5
0.6
0.7
IOH (mA)
Figure 11. Typical VOH vs. IOH
VDD = 1.8 V (Low Drive)
VOL vs. IOL (High Drive) at Vdd=5.5V
800.00
700.00
VOL (mV)
600.00
500.00
VOL @85C
400.00
VOL @25C
300.00
VOL @-40C
200.00
100.00
0.00
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17
IOL (mA)
Figure 12. Typical VOL vs. IOL
VDD = 5.5 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
14
Freescale Semiconductor
Electrical Characteristics
VOL vs. IOL (Low Drive) at Vdd=5.5V
2500.00
VOL (mV)
2000.00
VOL @85C
1500.00
VOL @25C
1000.00
VOL @-40C
500.00
0.00
1
2
3
4
5
6
7
8
9
10
11
IOL (mA)
Figure 13. Typical VOL vs. IOL
VDD = 5.5 V (Low Drive)
VOL vs. IOL (High Drive) at Vdd=3.0V
1200.00
VOL (mV)
1000.00
800.00
VOL @85C
600.00
VOL @25C
VOL @-40C
400.00
200.00
0.00
1
2
3
4
5
6
7
8
9
10
11
IOL (mA)
Figure 14. Typical VOL vs. IOL
VDD = 3.0 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
15
Electrical Characteristics
VOL (mV)
VOL vs. IOL (Low Drive) at Vdd=3.0V
1000.00
900.00
800.00
700.00
600.00
500.00
400.00
300.00
200.00
100.00
0.00
VOL @85C
VOL @25C
VOL @-40C
1
2
3
IOL (mA)
Figure 15. Typical VOL vs. IOL
VDD = 3.0 V (Low Drive)
VOL vs. IOL (High Drive) at Vdd=1.8V
800.00
700.00
VOL (mV)
600.00
500.00
VOL @85C
400.00
VOL @25C
300.00
VOL @-40C
200.00
100.00
0.00
0.8
1
2
3
4
IOL (mA)
Figure 16. Typical VOL vs. IOL
VDD = 1.8 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
16
Freescale Semiconductor
Electrical Characteristics
VOL vs. IOL (Low Drive) at Vdd=1.8V
400.00
350.00
VOL (mV)
300.00
250.00
VOL @85C
200.00
VOL @25C
150.00
VOL @-40C
100.00
50.00
0.00
0.1
0.2
0.3
0.4
0.5
0.6
0.7
IOL (mA)
Figure 17. Typical VOL vs. IOL
VDD = 1.8 V (Low Drive)
VOH vs. IOH (High Drive) at Vdd=5.5V
5.60
5.40
VOH (V)
5.20
85C
5.00
25C
4.80
-40C
4.60
4.40
4.20
1
2
3
4
5
6
7
8
9
11
13
15
17
IOH (mA)
Figure 18. Typical IOH vs. VDD–VOH
VDD = 5.5 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
17
Electrical Characteristics
IOH vs VDD-VOH (Low Drive) at VDD = 5.5 V
VDD-VOH (V)
-12
IOH (mA)
-10
-8
85C
25C
- 40C
-6
-4
-2
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Figure 19. Typical IOH vs. VDD–VOH
VDD = 5.5 V (Low Drive)
IOH vs VDD-VOH (High Drive) at VDD = 3.0 V
VDD-VOH (V)
-25
IOH (mA)
-20
85C
25C
- 40C
-15
-10
-5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Figure 20. Typical IOH vs. VDD–VOH
VDD = 3 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
18
Freescale Semiconductor
Electrical Characteristics
IOH vs VDD-VOH (Low Drive) at VDD = 3.0 V
IOH (mA)
VDD-VOH (V)
-5
-4.5
-4
-3.5
-3
-2.5
-2
-1.5
-1
-0.5
0
85C
25C
- 40C
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Figure 21. Typical IOH vs. VDD–VOH
VDD = 3 V (Low Drive)
IOH vs VDD-VOH (High Drive) at VDD = 1.8 V
VDD-VOH (V)
-7
IOH (mA)
-6
-5
85C
25C
- 40C
-4
-3
-2
-1
0
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Figure 22. Typical IOH vs. VDD–VOH
VDD = 1.8 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
19
Electrical Characteristics
IOH vs VDD-VOH (Low Drive) at VDD = 1.8 V
VDD-VOH (V)
-1.4
IOH (mA)
-1.2
-1
85C
25C
- 40C
-0.8
-0.6
-0.4
-0.2
0
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Figure 23. Typical IOH vs. VDD–VOH
VDD = 1.8 V (Low Drive)
IOL vs VOL (High Drive) at VDD = 5.5 V
60.00
IOL (mA)
50.00
40.00
85C
30.00
25C
- 40C
20.00
10.00
0.00
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
VOL (V)
Figure 24. Typical IOL vs. VOL
VDD = 5.5 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
20
Freescale Semiconductor
Electrical Characteristics
IOL vs VOL (Low Drive) at VDD = 5.5 V
16.00
14.00
IOL (mA)
12.00
10.00
85C
25C
- 40C
8.00
6.00
4.00
2.00
0.00
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
VOL (V)
Figure 25. Typical IOL vs. VOL
VDD = 5.5 V (Low Drive)
IOL (mA)
IOL vs VOL (High Drive) at VDD = 3.0 V
20.00
18.00
16.00
14.00
12.00
10.00
8.00
6.00
4.00
2.00
0.00
85C
25C
- 40C
0.2
0.4
0.6
0.8
1
1.2
1.4
VOL (V)
Figure 26. Typical IOL vs. VOL
VDD = 3 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
21
Electrical Characteristics
IOL vs VOL (Low Drive) at VDD = 3.0 V
6.00
IOL (mA)
5.00
4.00
85C
25C
- 40C
3.00
2.00
1.00
0.00
0.2
0.4
0.6
0.8
1
1.2
1.4
VOL (V)
Figure 27. Typical IOL vs. VOL
VDD = 3 V (Low Drive)
IOL vs VOL (High Drive) at VDD = 1.8 V
6.00
IOL (mA)
5.00
4.00
85C
25C
- 40C
3.00
2.00
1.00
0.00
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
VOL (V)
Figure 28. Typical IOL vs. VOL
VDD = 1.8 V (High Drive)
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
22
Freescale Semiconductor
Electrical Characteristics
IOL vs VOL (Low Drive) at VDD = 1.8 V
1.60
1.40
IOL (mA)
1.20
1.00
85C
25C
- 40C
0.80
0.60
0.40
0.20
0.00
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
VOL (V)
Figure 29. Typical IOL vs. VOL
VDD = 1.8 V (Low Drive)
3.7
Supply Current Characteristics
Table 8. Supply Current Characteristics
VDD (V)
Typical
Max1
Temp. (°C)
5
3.45
3.48
3.53
7
–40
25
85
3
3.39
3.42
3.49
—
–40
25
85
C
1.80
2.40
2.42
2.44
—
–40
25
85
4
C
5
0.93
0.96
0.99
—
–40
25
85
5
T
3
0.91
0.92
0.92
—
–40
25
85
6
T
1.80
0.66
0.67
0.68
—
–40
25
85
N
C
1
P
2
C
3
Parameter
Symbol
Run supply current2 measured at
(fBus = 10 MHz)
Run supply current3 measured at
(fBus = 1.25 MHz)
RIDD10
RIDD1
Unit
mA
mA
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
23
Electrical Characteristics
Table 8. Supply Current Characteristics (continued)
N
C
7
C
Parameter
Symbol
Wait mode supply current3
measured at
(fBus = 2.00 MHz)
Typical
Max1
Temp. (°C)
5
841.13
859.98
873.69
—
–40
25
85
3
840.21
850.60
846.67
—
–40
25
85
8
T
9
T
1.80
630.64
635.10
643.67
—
–40
25
85
10
C
5
667.86
683.38
688.02
—
–40
25
85
3
666.34
672.79
669.15
—
–40
25
85
Wait mode supply current3
measured at
(fBus = 1.00 MHz)
WIDD2
VDD (V)
11
T
12
T
1.80
505.39
509.28
502.52
—
–40
25
85
13
P
5
1.15
1.40
7.67
11
–40
25
85
14
C
3
1.05
1.26
4.52
—
–40
25
85
15
C
1.80
0.39
0.56
4.21
—
–40
25
85
16
C
5
128.86
140.44
154.97
—
–40
25
85
17
T
3
102.98
111.71
118.33
—
–40
25
85
18
T
1.80
54.77
66.33
74.42
—
–40
25
85
19
C
5
14.43
15.96
16.77
—
–40
25
85
20
T
3
14.37
14.72
14.45
—
–40
25
85
21
T
1.80
13.05
14.02
12.92
—
–40
25
85
Stop mode supply current
ADC adder from stop3
WIDD1
SIDD
—
ACMP adder from stop (ACME =
1)
—
Unit
μA
μA
μA
μA
μA
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
24
Freescale Semiconductor
Electrical Characteristics
Table 8. Supply Current Characteristics (continued)
VDD (V)
Typical
Max1
Temp. (°C)
5
0.10
0.10
0.17
—
–40
25
85
3
0.02
0.06
0.02
—
–40
25
85
T
1.80
0.40
0.45
0.20
—
–40
25
85
25
T
5
0.70
1.08
1.94
—
–40
25
85
26
T
3
0.56
0.56
0.62
—
–40
25
85
27
T
1.80
0.70
0.86
0.50
—
–40
25
85
28
C
5
58.93
68.27
76.60
—
–40
25
85
29
T
3
58.89
61.98
63.45
—
–40
25
85
30
T
1.80
52.84
54.52
52.49
—
–40
25
85
N
C
22
C
23
T
24
Parameter
Symbol
RTI adder from stop with 1 kHz
clock source enabled4
RTI adder from stop with
32.768KHz external clock source
reference enabled
LVI adder from stop
(LVDE = 1 and LVDSE = 1)
—
—
—
Unit
μA
μA
μA
1
Maximum value is measured at the nominal VDD voltage times 10% tolerance. Values given here are preliminary estimates
prior to completing characterization.
2 Not include any DC loads on port pins.
3 Required asynchronous ADC clock and LVD to be enabled.
4 Most customers are expected to find that auto-wakeup from stop can be used instead of the higher current wait mode. Wait
mode typical is 672.79 μA at 3 V and 509.28 μA at 1.8 V with fBus = 1 MHz.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
25
Electrical Characteristics
3.8
External Oscillator (XOSC) Characteristics
Table 9. Oscillator Electrical Specifications (Temperature Range = –40 to 85°C Ambient)
Num
1
C
C
Rating
3
D
Feedback resistor
Low range (32 kHz to 100 kHz)
High range (1 MHz to 16 MHz)
D
Series resistor
Low range, low gain (RANGE = 0, HGO = 0)
Low range, high gain (RANGE = 0, HGO = 1)
High range, low gain (RANGE = 1, HGO = 0)
High range, high gain (RANGE = 1, HGO = 1)
≥ 8 MHz
4 MHz
1 MHz
6
D
32
1
1
1
C1, C2
Load capacitors
C
flo
fhi
fhi-hgo
fhi-lp
D
5
Min
Oscillator crystal or resonator (EREFS = 1, ERCLKEN = 1)
Low range (RANGE = 0)
High range (RANGE = 1) FEE or FBE mode2
High range (RANGE = 1, HGO = 1) FBELP mode
High range (RANGE = 1, HGO = 0) FBELP mode
2
4
Symbol
RF
RS
Crystal start-up time3
Low range, low gain (RANGE = 0, HGO = 0)
Low range, high gain (RANGE = 0, HGO = 1)
High range, low gain (RANGE = 1, HGO = 0)4
High range, high gain (RANGE = 1, HGO = 1)4
Square wave input clock frequency (EREFS = 0, ERCLKEN = 1)
FEE or FBE mode2
FBELP mode
t
t
CSTL-LP
CSTL-HGO
t
CSTH-LP
t
CSTH-HGO
fextal
Typical1 Max
—
—
—
—
Unit
38.4 kHz
5
MHz
16 MHz
MHz
8
See crystal or resonator
manufacturer’s
recommendation.
—
—
10
1
—
—
—
—
—
0
100
0
—
—
—
—
—
—
0
0
0
0
10
20
—
—
—
—
200
400
5
20
—
—
—
—
0.03125
0
—
—
5
40
MΩ
kΩ
ms
MHz
Typical data was characterized at 5.0 V, 25 °C or is recommended value.
The input clock source must be divided using RDIV to within the range of 31.25 kHz to 39.0625 kHz.
3 This parameter is characterized and not tested on each device. Proper PC board layout procedures must be followed to
achieve specifications.
4 4 MHz crystal.
1
2
MCU
EXTAL
XTAL
RF
C1
3.9
Crystal or Resonator
RS
C2
AC Characteristics
This section describes AC timing characteristics for each peripheral system.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
26
Freescale Semiconductor
Electrical Characteristics
3.9.1
Control Timing
Table 10. Control Timing
Num
C
1
D
Bus frequency (tcyc = 1/fBus)
2
D
Real time interrupt internal oscillator period
3
4
5
D
D
D
Parameter
External RESET pulse width
1
2
KBI pulse width
KBI pulse width in
stop1
Symbol
Min
Typical
Max
Unit
fBus
0
—
10
MHz
tRTI
700
1000
1300
μs
textrst
150
—
—
ns
tKBIPW
1.5 tcyc
—
—
ns
tKBIPWS
100
—
—
ns
tRise, tFall
—
—
11
35
—
—
ns
3
6
D
Port rise and fall time (load = 50 pF)
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
1
This is the shortest pulse guaranteed to pass through the pin input filter circuitry. Shorter pulses may or may not be recognized.
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
3 Timing is shown with respect to 20% V
DD and 80% VDD levels. Temperature range –40 °C to 85 °C.
2
textrst
RESET
Figure 30. Reset Timing
tKBIPWS
tKBIPW
KBI Pin
(rising or high level)
KBI Pin
(falling or low level)
tKBIPW
tKBIPWS
Figure 31. KBI Pulse Width
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
27
Electrical Characteristics
3.9.2
TPM/MTIM Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that
can be used as the optional external source to the timer counter. These synchronizers operate from the
current bus rate clock.
Table 11. TPM Input Timing
Num
C
Rating
Symbol
Min
Max
Unit
1
D
External clock frequency
fTPMext
DC
fBus/4
MHz
2
D
External clock period
tTPMext
4
—
tcyc
3
D
External clock high time
tclkh
1.5
—
tcyc
4
D
External clock low time
tclkl
1.5
—
tcyc
5
D
Input capture pulse width
tICPW
1.5
—
tcyc
tTCLK
tclkh
TCLK
tclkl
Figure 32. Timer External Clock
tICPW
TPMCHn
TPMCHn
tICPW
Figure 33. Timer Input Capture Pulse
3.10
Analog Comparator (ACMP) Electrical
Table 12. Analog Comparator Electrical Specifications
Num
C
Characteristic
1
D
Supply voltage
2
P
Supply current (active)
3
D
Analog input voltage1
voltage1
Symbol
Min
Typical
Max
Unit
VDD
1.80
—
5.5
V
IDDAC
—
20
35
μA
VAIN
VSS – 0.3
—
VDD
V
4
C
Analog input offset
5
C
Analog Comparator hysteresis1
6
C
Analog source impedance1
7
P
Analog input leakage current
8
C
Analog Comparator initialization delay
tAINIT
VAIO
—
20
40
mV
VH
3.0
9.0
15.0
mV
RAS
—
—
10
kΩ
IALKG
—
—
1.0
μA
—
—
1.0
μs
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
28
Freescale Semiconductor
Electrical Characteristics
Table 12. Analog Comparator Electrical Specifications (continued)
1
Num
C
Characteristic
Symbol
Min
Typical
Max
Unit
9
P
Analog Comparator bandgap reference
voltage
VBG
1.1
1.208
1.3
V
These data are characterized but not production tested.
3.11
Internal Clock Source Characteristics
Table 13. Internal Clock Source Specifications
Characteristic
Symbol
Typical1
Num
C
1
C
Average internal reference frequency — untrimmed
fint_ut
25
31.25
41.66
kHz
2
P
Average internal reference frequency — trimmed
fint_t
31.25
32.768
39.0625
kHz
3
C
DCO output frequency range — untrimmed
fdco_ut
12.8
16
21.33
MHz
4
P
DCO output frequency range — trimmed
fdco_t
16
16.77
20
MHz
5
C
Resolution of trimmed DCO output frequency
at fixed voltage and temperature
Δfdco_res_t
—
—
0.2
%fdco
6
C
Total deviation of trimmed DCO output frequency
over voltage and temperature
Δfdco_t
—
—
2
%fdco
7
C
FLL acquisition time2,3
tacquire
—
—
1
ms
8
C
t_wakeup
—
—
μs
Stop recovery time (FLL wakeup to previous acquired
frequency)
IREFSTEN = 0
IREFSTEN = 1
Min
Max
Unit
100
86
Data in typical column was characterized at 3.0 V and 5.0 V, 25 °C or is typical recommended value.
This parameter is characterized and not tested on each device.
3 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or
changing from FLL disabled (FBILP) to FLL enabled (FEI, FBI).
1
2
3.12
ADC Characteristics
Table 14. 10-Bit ADC Operating Conditions
Symb
Min
Typ1
Max
Unit
VDDAD
1.8
—
5.5
V
Input voltage
VADIN
VREFL
—
VREFH
V
Input
capacitance
CADIN
—
4.5
5.5
pF
Input
resistance
RADIN
—
3
5
kΩ
—
—
—
—
5
10
—
—
10
Characteristic
Supply voltage
Analog source
resistance
Conditions
Absolute
10-bit mode
fADCK > 4MHz
fADCK < 4MHz
8-bit mode (all valid fADCK)
RAS
kΩ
Comment
External to
MCU
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
29
Electrical Characteristics
Table 14. 10-Bit ADC Operating Conditions (continued)
Characteristic
ADC
conversion
clock Freq.
1
Conditions
High speed (ADLPC=0)
Symb
Min
Typ1
Max
Unit
fADCK
0.4
—
8.0
MHz
0.4
—
4.0
Low power (ADLPC=1)
Comment
Typical values assume VDDAD = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are
for reference only and are not tested in production.
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
ZADIN
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
Pad
leakage
due to
input
protection
ZAS
RAS
ADC SAR
ENGINE
RADIN
+
VADIN
VAS
+
–
–
CAS
RADIN
INPUT PIN
RADIN
INPUT PIN
RADIN
INPUT PIN
CADIN
Figure 34. ADC Input Impedance Equivalency Diagram
Table 15. 10-Bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD, 2.7 V < VDDAD < 5.5 V)
Symb
Min
Typ1
Max
Unit
Supply Current
ADLPC = 1
ADLSMP = 1
ADCO = 1
IDDAD
—
133
—
μA
T
Supply Current
ADLPC = 1
ADLSMP = 0
ADCO = 1
IDDAD
—
218
—
μA
T
Supply Current
ADLPC = 0
ADLSMP = 1
ADCO = 1
IDDAD
—
327
—
μA
C
Characteristic
T
Conditions
Comment
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
30
Freescale Semiconductor
Electrical Characteristics
Table 15. 10-Bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD, 2.7 V < VDDAD < 5.5 V)
C
Characteristic
C
Supply Current
ADLPC = 0
ADLSMP = 0
ADCO = 1
C
ADC
Asynchronous
Clock Source
High Speed (ADLPC = 0)
Conversion
Time (Including
sample time)
Short Sample (ADLSMP = 0)
Long Sample (ADLSMP = 1)
Sample Time
Short Sample (ADLSMP = 0)
D
D
C
T
Conditions
Symb
Min
Typ1
Max
Unit
IDDAD
—
0.582
1
mA
fADACK
2
3.3
5
MHz
1.25
2
3.3
tADACK =
1/fADACK
—
20
—
—
40
—
ADCK
cycles
—
3.5
—
See reference
manual for
conversion
time variances
—
23.5
—
—
±1.5
±3.5
—
±0.7
±1.5
—
±0.5
±1.0
—
±0.3
±0.5
Low Power (ADLPC = 1)
tADC
tADS
Long Sample (ADLSMP = 1)
Total
Unadjusted
Error
Differential
Non-Linearity
10-bit mode
ETUE
8-bit mode
10-bit mode
DNL
8-bit mode
ADCK
cycles
LSB2
Comment
Includes
quantization
LSB2
Monotonicity and No-Missing-Codes guaranteed
C
P
P
Integral
Non-Linearity
10-bit mode
INL
8-bit mode
Zero-Scale
Error
10-bit mode
Full-Scale Error
10-bit mode
EZS
8-bit mode
EFS
8-bit mode
D
D
Quantization
Error
10-bit mode
Input Leakage
Error
10-bit mode
EQ
8-bit mode
8-bit mode
EIL
—
±0.5
±1.0
—
±0.3
±0.5
—
±1.5
±2.5
—
±0.5
±0.7
—
±1
±1.5
—
±0.5
±0.5
—
—
±0.5
—
—
±0.5
—
±0.2
±2.5
—
±0.1
±1
LSB2
LSB2
VADIN = VSSA
LSB2
VADIN = VDDA
LSB2
LSB2
Pad leakage2 *
RAS
Typical values assume VDDAD = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference
only and are not tested in production.
2 Based on input pad leakage current. Refer to pad electricals.
1
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
31
Electrical Characteristics
Table 16. 10-Bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD, 1.8 V < VDDAD < 2.7 V)
Symb
Min
Typ1
Max
Unit
8-bit mode
IDDAD
—
88
—
μA
Supply Current
ADLPC = 1
ADLSMP = 0
ADCO = 1
8-bit mode
IDDAD
—
152
—
μA
T
Supply Current
ADLPC = 0
ADLSMP = 1
ADCO = 1
8-bit mode
IDDAD
—
214
—
μA
T
Supply Current
ADLPC = 0
ADLSMP = 0
ADCO = 1
8-bit mode
IDDAD
—
390
—
μA
C
ADC
Asynchronous
Clock Source
High Speed (ADLPC = 0)
fADACK
2
3.3
5
MHz
1.25
2
3.3
tADACK =
1/fADACK
Conversion
Time (Including
sample time)
Short Sample (ADLSMP = 0)
—
20
—
Long Sample (ADLSMP = 1)
—
40
—
ADCK
cycles
Sample Time
Short Sample (ADLSMP = 0)
—
3.5
—
See reference
manual for
conversion
time variances
—
23.5
—
—
—
—
—
±3.5
—
—
—
—
—
±1.0
—
C
Characteristic
T
Supply Current
ADLPC = 1
ADLSMP = 1
ADCO = 1
T
D
D
C
T
Conditions
Low Power (ADLPC = 1)
tADC
tADS
Long Sample (ADLSMP = 1)
Total
Unadjusted
Error
Differential
Non-Linearity
10-bit mode
ETUE
8-bit mode
10-bit mode
DNL
8-bit mode
ADCK
cycles
LSB2
Comment
Includes
quantization
LSB2
Monotonicity and No-Missing-Codes guaranteed
C
C
C
Integral
Non-Linearity
10-bit mode
INL
8-bit mode
Zero-Scale
Error
10-bit mode
Full-Scale Error
10-bit mode
EZS
8-bit mode
EFS
8-bit mode
D
Quantization
Error
10-bit mode
8-bit mode
EQ
—
—
—
—
±1.5
—
—
—
—
—
±1.5
—
—
—
—
—
±1.0
—
—
—
—
—
—
±0.5
LSB2
LSB2
VADIN = VSSA
LSB2
VADIN = VDDA
LSB2
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
32
Freescale Semiconductor
Electrical Characteristics
Table 16. 10-Bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD, 1.8 V < VDDAD < 2.7 V)
C
Characteristic
D
Input Leakage
Error
Conditions
10-bit mode
Symb
Min
Typ1
Max
Unit
Comment
EIL
—
—
—
LSB2
—
±0.1
±1
Pad leakage2 *
RAS
8-bit mode
Typical values assume VDDAD = 1.8 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference
only and are not tested in production.
2
Based on input pad leakage current. Refer to pad electricals.
1
3.13
Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash
memory. For detailed information about program/erase operations, see the reference manual.
Table 17. Flash Characteristics
No.
C
Characteristic
Symbol
Min
Typical1
Max
Unit
1
D
Supply voltage for program/erase
VDD
2.7
—
5.5
V
2
D
Program/Erase voltage
VPP
11.8
12
12.2
V
3
C
VPP current
Program
Mass erase
IVPP_prog
IVPP_erase
—
—
—
—
200
100
μA
μA
4
D
Supply voltage for read operation
0 < fBus < 10 MHz
VRead
1.8
—
5.5
V
5
P
Byte program time
tprog
20
—
40
μs
6
P
Mass erase time
tme
500
—
—
ms
7
C
Cumulative program HV time2
thv
—
—
8
ms
8
C
Total cumulative HV time
(total of tme & thv applied to device)
thv_total
—
—
2
hours
9
D
HVEN to program setup time
tpgs
10
—
—
μs
10
D
PGM/MASS to HVEN setup time
tnvs
5
—
—
μs
11
D
HVEN hold time for PGM
tnvh
5
—
—
μs
12
D
HVEN hold time for MASS
tnvh1
100
—
—
μs
13
D
VPP to PGM/MASS setup time
tvps
20
—
—
ns
14
D
HVEN to VPP hold time
tvph
20
—
—
ns
time3
15
D
VPP rise
tvrs
200
—
—
ns
16
D
Recovery time
trcv
1
—
—
μs
17
D
Program/erase endurance
TL to TH = –40 °C to 85 °C
—
1000
—
—
cycles
18
C
Data retention
tD_ret
15
—
—
years
Typicals are measured at 25 °C.
thv is the cumulative high voltage programming time to the same row before next erase. Same address can not be
programmed more than twice before next erase.
3 Fast V
PP rise time may potentially trigger the ESD protection structure, which may result in over current flowing into the pad
and cause permanent damage to the pad. External filtering for the VPP power source is recommended. An example VPP
filter is shown in Figure 35.
1
2
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
33
Electrical Characteristics
100 Ω
VPP
1 nF
12 V
Figure 35. Example VPP Filtering
tprog
WRITE DATA1
Data
Next
Data
tpgs
PGM
tnvs
tnvh
trcv
HVEN
trs
VPP2
tvps
tvph
thv
1
Next Data applies if programming multiple bytes in a single row, refer to MC9RS08KB12 Series
Reference Manual.
2 V
DD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
Figure 36. Flash Program Timing
tme
trcv
MASS
tnvs
tnvh1
HVEN
trs
VPP1
1V
DD
tvps
tvph
must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
Figure 37. Flash Mass Erase Timing
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
34
Freescale Semiconductor
3.14
EMC Performance
Electromagnetic compatibility (EMC) performance is highly dependant on the environment in which the
MCU resides. Board design and layout, circuit topology choices, location and characteristics of external
components as well as MCU software operation all play a significant role in EMC performance. The
system designer should consult Freescale applications notes such as AN2321, AN1050, AN1263,
AN2764, and AN1259 for advice and guidance specifically targeted at optimizing EMC performance.
3.14.1
Radiated Emissions
Microcontroller radiated RF emissions are measured from 150 kHz to 1 GHz using the TEM/GTEM Cell
method in accordance with the IEC 61967-2 and SAE J1752/3 standards. The measurement is performed
with the microcontroller installed on a custom EMC evaluation board while running specialized EMC test
software. The radiated emissions from the microcontroller are measured in a TEM cell in two package
orientations (North and East).
Ordering Information
4
Ordering Information
This section contains ordering numbers for MC9RS08KB12 series devices. See below for an example of
the device numbering system.
MC 9 RS08 KB 12 C XX
Status
(MC = Fully qualified)
(PC = Prototype)
Memory
(9 = Flash-Based)
Core
Package designator (See Table 18)
Temperature range
(C = –40 °C to 85 °C)
Approximate memory size (in KB)
Family
5
Package Information and Mechanical Drawings
Table 18 provides the available package types and their document numbers. The latest package
outline/mechanical drawings are available on the MC9RS08KB12 Series Product Summary pages at
http://www.freescale.com.
To view the latest drawing, either:
• Click on the appropriate link in Table 18, or
• Open a browser to the Freescale® website (http://www.freescale.com), and enter the appropriate
document number (from Table 18) in the “Enter Keyword” search box at the top of the page.
Table 18. Device Numbering System
Memory
Package
Device Number
MC9RS08KB12
MC9RS08KB8
MC9RS08KB4
MC9RS08KB2
Flash
RAM
12 KB
8 KB
4 KB
254 bytes
254 bytes
126 bytes
2 KB
126 bytes
Type
Designator
Document No.
24 QFN
FK
98ASA00087D
20 SOIC WB
WJ
98ASB42343B
16 SOIC NB
SG
98ASB42566B
16 TSSOP
TG
98ASH70247A
8 SOIC NB
SC
98ASB42564B
8 DFN
DC
98ARL10557D
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
36
Freescale Semiconductor
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Document Number: MC9RS08KB12
Rev. 5
1/2012
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Package Information and Mechanical Drawings
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
38
Freescale Semiconductor