5x7mm Precision TCXO Model D75J - Connor

Available at Digi-Key
www.digikey.com
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
US Headquarters:
630-851-4722
European Headquarters:
+353-61-472221
5x7mm
Precision TCXO
Model D75J
Description:
Features:
The Connor-Winfield’s D75J is a 5x7mm
Surface Mount Temperature Compensated
Crystal Controlled Oscillator (TCXO) with a
Tri-State LVCMOS output. Through the use of
Analog Temperature Compensation, the D75J
is capable of holding sub 1-ppm stabilities
over the 0 to 70°C temperature range.
•3.3 Vdc Operation
•LVCMOS Output
•Frequency Stability: ± 1.0 ppm
•Temperature Range: 0 to 70°C
•Low Jitter <1ps RMS
•Tri-State Enable/Disable Function
•5x7mm Surface Mount Package
•Tape and Reel Packaging
•RoHS Compliant / Pb Free
Absolute Maximum Ratings
Parameter
Storage Temperature
Supply Voltage (Vcc)
Input Voltage
Minimum
Nominal
Maximum
Units
-55
-0.5
-0.5
-
-
-
85
6.0
Vcc+0.5
°C
Vdc
Vdc
Units
Operating Specifications
Parameter
Nominal Frequency (Fo)
Frequency Calibration @ 25 °C
Frequency Stability vs. Temperature
Frequency vs. Load Stability
Frequency vs. Voltage Stability
Static Temperature Hysteresis
Aging Operating Temperature Range
Supply Voltage (Vcc)
Supply Current (Icc)
Period Jitter
Integrated Phase Jitter
SSB Phase Noise (Fo = 38.88 MHz)
@ 10Hz offset
@ 100Hz offset
@ 1KHz offset
@ 10KHz offset
@ 100KHz offset
Start-up Time
Minimum
Nominal
Maximum
-
-1.0
-1.0
-0.2
-0.2
-
-1.0
0
3.135
-
-
-
38.88, 40.0 or 50.0
-
-
-
-
-
-
-
3.3
-
3
0.5
-
1.0
1.0
0.2
0.2
0.4
1.0
70
3.465
6
5
1.0
-
-
-
-
-
-
-70
-100
-120
-140
-145
-
-
-
-
-
-
10
Notes
Notes
MHz
ppm 1
ppm 2
ppm ±5%
ppm ±5%
ppm 3
ppm/year
°C
Vdc ±5%
mA
ps rms
ps rms 4
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ms
Enable / Disable Input Characteristics (Pad 8)
Parameter
Minimum
Enable Voltage (High)
Disable Voltage (Low)
Nominal
Maximum
70%Vcc
-
-
-
30%Vcc
Units
Notes
Vdc
Vdc
5
5
LVCMOS Output Characteristics
Parameter
Load
Voltage (High) (Voh)
(Low)
(Vol)
Current (High) (Ioh)
(Low)
(Iol)
Duty Cycle at 50% of Vcc Rise / Fall Time 10% to 90% Package
Vibration:
Shock: Soldering Process:
Bulletin
Page
Revision
Date
Tx238
1 of 2
05
14 May 2015
Minimum
Nominal
-
90%Vcc
-
-4
-
45
-
15
-
-
-
-
50
-
Maximum
-
-
10%Vcc
-
4
55
8
Units
Notes
pF
Vdc
Vdc
mA
mA
%
ns
6
Package Characteristics
Hermetically sealed crystal mounted on a ceramic package
Environmental Characteristics
Vibration per Mil Std 883E Method 2007.3 Test Condition A
Mechanical Shock per Mil Std 883E Method 2002.4 Test Condition B.
RoHS compliant lead free. See soldering profile on page 2.
Ordering Information
D75J-038.88M, D75J-040.0M or D75J-050.0M
Notes:
1. Initial calibration @ 25°C. Specifications at time of shipment after 48 hours of operation.
2. Frequency stability vs. change in temperature. [±(Fmax - Fmin)/(2*Fo)].
3. Frequency change after reciprocal temperature ramped over the operating range.
Frequency measured before and after at 25°C.
4. BW = 12 KHz to 20 MHz.
5. Output is enabled with no connection to Pad 8. Leave Pad 8 open if disable
function is not required. When disabled, the output is off but the oscillator and
compensation circuits are still powered (current consumption < 1.3 mA).
6. For best performance it is recommended that the circuit connected to this output
should have an equivalent input capacitance of 15pF.
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
Package Layout
Suggested Pad Layout
0.295
(7.49mm)
Pad Connections
1:
2:
3:
4:
5:
6:
7:
8:
9:
10:
0.051
(1.28mm)
0.030
(0.76mm)
Keep Out Area
8
5
10
4
1
Temperature
6
Top View
0.215
(5.46mm)
260°C
7
9
0.037
(0.94mm)
2
3
0.051
(1.28mm)
260°C
220°C
180°C
150°C
120°C
0
10 s
Up to 120 s
60 to 90 s
Typical
Typical
Meets IPC/JEDEC J-STD-020C
* Do not route any traces in the keep out area. It
is recommended the next layer under the keep
out area is to be ground plane.
Design Recommendations
Vcc, should have
a large copper
area for reduced
inductance.
Connect a 0.01uF
bypass capacitor
<0.1”(2.54mm)
from the pad.
8
6
9
5
10
4
1
3
Ground,
should have
a large copper
area for reduced
inductance.
Top View
OSC
Output Waveform
50 Ohm trace
<1”by design
Vcc
0.010”(0.254mm)
Recommended
clearance
inductance
for internal
copper flood.
Do Not Connect
Do Not Connect
Do Not Connect
Ground
Output
Do Not Connect
Do Not Connect
Tri-State Enable / Disable
Supply Voltage Vcc
N/C
Buffer
Ground
Top View
1V/Div
Ground
Solder Profile
50 Ohm Trace
Without Output
Vias
Buffer
Temperature
260°C
260°C
220°C
TOP LAYER
GROUND LAYER
180°C
.......
150°C
120°C
BOTTOM LAYER
0
Attention: To achieve optimal frequency stability, and in some cases to meet the specification stated on this data
sheet, it is required that the circuit connected to this TCXO output must have the equivalent input capacitance that is
specified by the nominal load capacitance. Deviations from the nominal load capacitance will have a graduated effect
on the stability of approximately 20 ppb per pF load difference.
10 s
Up to 120 s
60 to 90 s
Typical
Typical
Meets IPC/JEDEC J-STD-020C
Tape and Reel Dimensions
Test Circuit
PIN 1
Enable/
Disable DNC DNC
Vcc
Supply
Voltage
.69
(17.5mm)
8.46 DIA
(216mm DIA)
.08
(2.0mm)
.31
.08
10
.157
(4.0mm)
.08
(80mm)
6
2
3
5
Output
.315
(8.0mm)
1
4
Ground
15 pF
9.84 DIA
(250mm DIA)
3.15
7
(2.0mm)
.21
(5.4mm)
(2.0mm)
8
9
(7.9mm)
Direction
Of
Feed
(Customer)
0.1 uF
Bypass
10 nF
Bypass
N/C
DNC DNC DNC
DNC = Do Not Connect
.06 DIA
(1.5mm DIA)
1.00 DIA
(25mm DIA)
Bulletin
.295 (7.5mm)
MEETS EIA-481A and EIAJ-1009B
2,000 PCS/REEL
.07 (1.75mm)
Page
.83 (16.0mm)
Revision
Date
Specifications subject to change without notification. See Connor-Winfield's website for latest revision. All dimensions in inches.
© Copyright 2015 The Connor-Winfield Corporation Not intended for life support applications.
Tx238
2 of 2
05
14 May 2015