UT54BS32245 32bit Bus Switch - Aeroflex Microelectronic Solutions

Standard Products
UT54BS32245 32bit Bus Switch
Preliminary Datasheet
May 2015
www.aeroflex.com/busswitch
FEATURES
INTRODUCTION
□ Provides cold-sparing capability without the need for actual
cold-sparing multiplexer inputs
□ Bidirectional Operation
□ 3.3 V operating power supply with typical 11Ω switch
connection between ports
□ 5.0V operating power supply typical 5Ω switch connection
between ports
□ Isolates non cold-spared devices from an active bus
□ Ultra low power CMOS technology
□ ESD Rating HBM: 2000V, Class 2
□ Operational environment:
- Total-dose: up to 300 krad(Si)
- Latchup immune (LET <= 100 MeV-cm2/mg)
□ Packaging options:
- 99-lead CCGA, CLGA, CBGA
□ Standard Microcircuit Drawing (SMD)
- QML Q and V pending
1A1
1A8
/EN1
1B1
1B8
2A1
2A8
/EN2
2B1
2B8
The UT54BS32245 provides 32 bits of high-speed CMOScompatible bus switching. The low on-state resistance of the
switch allows connections to be made with minimal
propagation delay. The device is organized as four 8-bit bus
switches, two 16-bit bus switches, or one 32-bit bus switch.
When output enable (/EN) is low, the switch is on and port A is
connected to port B. When /EN is high, the switch is open and
the high-impedance state exists between the two ports.
APPLICATIONS INFORMATION
Memory Interface
- Solution for multiple memory devices on a bus
Bus Isolation
- Ability to electrically isolate a device, or banks of
devices, from memory bus or ADC output when not
needed
- Enables bank switching for redundancy or device failure
- Provides cold-sparing capability without the need for
actual cold-sparing buffers
Redundancy
- Allows multiple non cold-spare devices to be present
on a bus
Supports Analog Applications
- In voltage range: 3.0 to 3.6V or 4.5 to 5.5V
- Signal isolation: -60dB
- Bandwidth (3dB): 500 MHz
3A1
3B1
3A8
3B8
4A1
4A8
4B1
4B8
/EN4
/EN3
Figure 1. UT54BS32245 Block Diagram
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1
A
2
3
4
5
6
7
8
9
10
3A7
3A8
3A5
3A6
2A7
2A5
2A6
2A8
VSS
B
3A1
VDD
3B1
3B2
3B4
2B7
2B5
2B8
VDD
2A3
C
3A2
3B5
/OE3
3B3
VSS
VSS
2B6
/OE2
2B4
2A4
D
3A4
3B6
3B7
NC
VDD
VDD
NC
2B3
2B2
2A2
E
3A3
3B8
VSS
VDD
VSS
VSS
VDD
VSS
2B1
2A1
F
4A1
4B1
VSS
VDD
VSS
VSS
VDD
VSS
1B8
1A3
G
4A2
4B2
4B3
VSS
VDD
VDD
NC
1B7
1B6
1A4
H
4A4
4B4
/OE4
4B6
VSS
VSS
1B3
/OE1
1B5
1A2
J
4A3
VDD
4B8
4B5
4B7
1B4
1B2
1B1
VDD
1A1
K
VSS
4A8
4A7
4A5
4A6
1A6
1A5
1A8
1A7
VSS
Figure 2. UT54BS32245 Pinout
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PIN DESCRIPTION
Pin No.
A2, A3, A4, A5, A6, A7, A8, A9,
B1, B10, C1, C10, D1, D10, E1,
E10, F1, F10, G1, G10, H1, H10,
J1, J10, K2, K3, K4, K5, K6, K7,
K8, K9
B3, B4, B5, B6, B7, B8, C2, C4,
C7, C9, D2, D3, D8, D9, E2, E9,
F2, F9, G2, G3, G8, G9, H2, H4,
H7, H9, J3, J4, J5, J6, J7, J8
C3, C8, H3, H8
A10, D4, D7, C5, C6, E3, E5, E6,
E8, F3, F5, F6, F8, G4, H5, H6, K1,
K10
B2, B9, D5, D6, E4, E7, F4, F7, G5,
G6, G7, J2, J9
Name
Description
nBn
Port B pins
/ENn
VSS
Active LOW enable pin
Ground Pin
VDD
Supply Pin, +3.3V –or- +5.0V
nAn
Port A pins
TRUTH TABLE
INPUT (/EN)
L
H
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Function
A port to B port
-orB port to A port
DISCONNECT
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ABSOLUTE MAXIMUM RATINGS 1
Symbol
Parameter
MIN
MAX
Unit
Positive Output Supply Voltage
-0.5
7.2
V
Voltage on an Input pin during operation
V DD +
0.3V
V
Continuous DC Channel Current
65
mA
Maximum package power dissipation
permitted at T C =125°C
1.6
W
TJ
Junction Temperature
+150
°C
Ө JC
Thermal resistance, junction-to-case
15
°C/W
T STG
Storage Temperature
+150
°C
ESD
ESD protection (Human Body Model) Class 2
2000
V
V DD
VI
2
2
I CCC
PD
3
-65
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. Functional
operation should be restricted to recommended operating conditions. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability and performance.
2. All voltages referenced to VSS
3. Per MIL-STD-883, method 1012.1, section 3.4.1, PD=(Tj(max) - Tc(max)) / Өjc
4.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
LIMIT
Unit
1
Positive Output Supply Voltage
3.0 to 3.6 or 4.5 to 5.5
V
1
Input Voltage on any pin
0.0 to V DD
V
TC
Case Temperature Range
-55 to +125
°C
tR
Rise time
>5
ns
tF
Fall time
>5
ns
60
mA
V DD
V IN
I CCC
Continuous DC Channel Current
Notes:
1. All voltages referenced to VSS
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OPERATIONAL ENVIROMENT
PARAMETER
LIMIT
UNITS
Total Ionizing Dose (TID)
3.0E5
rad(Si)
Single Event Latchup (SEL)
>100
MeV-cm2/mg
DC CHARACTERISTICS*,1
(V DD = 5.0V ± 0.5V, 3.3V ± 0.3V, -55°C < T C < +125°C); Unless otherwise noted, Tc is per the
temperature range ordered
Symbol
Parameter
Condition
V IH
High level input voltage
V DD =3.6V, 5.5V
V IL
Low level input voltage
V DD =3.0V, 4.5V
I ID
Leakage current digital
V DD = MAX;
V I = V DD or V SS
I IA
Leakage current analog
V DD = MAX;
V I = V DD or V SS
I DD
Active Supply Current
I DDQ
MIN
MAX
0.7*V DD
Unit
V
0.3*V DD
V
-1
1
µA
-3
3
µA
V DD =3.6V, 5.5V
0.5
mA/MHz
Quiescent Supply
Current
V DD = MAX;
I O = 0mA;
V I = V DD or V SS
15
µA
CI
Input Capacitance (/EN)
V I = V DD or VSS
5
pF
C IO(OFF)
I/O Capacitance when
device OFF
V DD = MAX
V O = V DD or VSS
V I = V DD /2
/EN = V DD
5
pF
I/O Capacitance when
device ON
V DD = MAX
V O = open
V I = V DD /2
/EN = 0V
16
pF
C IO(ON)
R ONL 2,3
R ON(Flat)
1,2
Resistance through
switch
Switch On Resistance
V DD = 4.5V
V I = VSS
I O = 30mA
I O = 15mA
10
13
Ω
V DD = 3.0V
V I = VSS
I O = 30mA
I O = 15mA
10
13
Ω
V DD =3.0V,4.5V
V I = V DD
V DD =3.0V
V I = V DD /2
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5
6
I O = -30mA
I O = -15mA
5
10
13
Ω
Ω
Aeroflex Microelectronic Solutions - HiRel
Symbol
R ONH
1,2
R ON(Flat)
1,2
Parameter
Resistance through
switch
Switch On Resistance
Condition
V DD =4.5V
V I = V DD
I O = -30mA
I O = -15mA
V DD = 3.0V
V I = V DD
I O = -30mA
I O = -15mA
V DD =3.0V,4.5V
V I = V DD
I O = -30mA
I O = -15mA
MIN
MAX
Unit
10
13
Ω
10
13
5
6
Ω
Ω
Notes:
* For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation
performance is guaranteed at 25°C per MIL-STD-883 Method 1019, Condition A up to the
maximum TID level procured.
1. Measured by the voltage drop between the A and B terminals at the indicated current through
the switch. On-state resistance is determined by the lowest voltage of the two (A or B)
terminals.
2. Guaranteed by design.
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AC CHARACTERISTICS *,1
(V DD = 5.0V ±0.5V, -55°C < T C < +125°C); Unless otherwise noted, T C is per the temperature
range ordered
Symbol
From
(INPUT)
To
(OUTPUT)
Cond.
MIN
MAX
Unit
t PD30
1
A or B
B or A
I I =+/-30mA
500
ps
t PD15
1
A or B
B or A
I I =+/-15mA
650
ps
t EN
/EN=V SS
A or B
1
5
ns
t DIS
/EN=V DD
A or B
1
6
ns
(V DD = 3.3V ±0.3V, -55°C < T C < +125°C); Unless otherwise noted, T C is per the temperature
range ordered
Symbol
From
(INPUT)
To
(OUTPUT)
Cond.
MIN MAX
Unit
t PD30
1
A or B
B or A
I I =+/-30mA
1
ns
t PD15
1
A or B
B or A
I I =+/-15mA
1.3
ns
t EN
/EN=V SS
A or B
2
6
ns
t DIS
/EN=V DD
A or B
1
7
ns
Notes:
* For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation
performance is guaranteed at 25°C per MIL-STD-883 Method 1019, Condition A up to the
maximum TID level procured.
1. The propagation delay through the channel is based upon the RC time constant of the channel
resistance and switch ON capacitance, 11 Ω and 17pF.
Symbol
Parameter
Condition
X TALK 1
Cross talk between
channels V DD = 5.0V
RL = 50Ω, CL = 50pF,
f = 1MHz,
V IN1 = 1V RMS
Centered at V DD /2
Cross talk between
channels V DD = 3.3V
RL = 50Ω, CL = 50pF,
f = 1MHz,
V IN1 = 1V RMS
Centered at V DD /2
Off Isolation
RL = 50Ω, CL = 50pF,
f = 1MHz,
V IN1 = 1V RMS
Centered at V DD /2
X TALK 1
I SOOFF 1
MIN
MAX
Unit
-60
dB
-60
dB
-60
dB
Notes:
1. Guaranteed by design.
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Figure 3. Output Test Load Circuit
VDD
INPUT
VDD/2
VDD/2
tPDxx
VSS
tPDxx
OUTPUT
VOH
VDD/2
VDD/2
VOL
Figure 4. Propagation Waveform
VDD
OUTPUT
ENABLE
VDD/2
VDD/2
VSS
tEN
tDIS
OUTPUT
Waveform #1 at
Vi = VSS
VDD/2
VOL+ΔV
VOL
tDIS
tEN
OUTPUT
Waveform #2 at
Vi = VDD
VDD
VOH
VOH-ΔV
VDD/2
VSS
Figure 5. Propagation Waveform
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Figure 6. 99-Lead CLGA
-8-
Figure 7. 99 Lead CBGA
-9-
Figure 8. 99 Lead CCGA
- 10 -
ORDERING INFORMATION
UT54BS32245 32bit Bus Switch Analog:
UT54
*******
*
*
*
*
Lead Finish:
(A) = Hot solder dipped
(C) = Gold
Screening:
(C) = HiRel flow (-55 ºC to +125 ºC)
(P) = Prototype flow (+25º C Only)
Package Type: (Notes1 and 2)
(Z) = 99-Ceramic Land Grid Array
(S) = 99-Carmaic Column Grid Array
(C) = 99-Ceramic Ball Grid Array
Access Time:
(-)
Device Type:
(BS32245) = 32bit Bus Switch
Notes:
1. Prototype flow per Aeroflex Manufacturing Flows Document. Tested at 25 º C only. Lead
finish is GOLD ONLY. Radiation neither tested nor guaranteed.
2. HiRel Temperature Range flow per Aeroflex Manufacturing Flows Document. Devices are
tested at -55°C, room temp, and 125°C. Radiation neither tested nor guaranteed.
Package Option
Associated Lead Finish
(Z) 99-CLGA
(S) 99-CCGA
(C) 99-CBGA
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(C) Gold
(A) Hot Solder Dipped
(A) Hot Solder Dipped
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Aeroflex Microelectronic Solutions - HiRel
UT54BS32245 Bus Switch Analog SMD:
5962 – XXXXX **
* * *
Lead Finish: (Note 1)
C = Gold
Package Type: (Note 2)
X = 99-Ceramic Land Grid Array
Class Designator:
Q = QML Class Q
V = QML Class V
Device Type:
01 = UT54BS32245 (Temperature range -55C to +125C)
Drawing Number:
XXXXX = TBD
Total Dose:
R = 1E5 rads(Si)
F = 3E5 rads(Si)
Notes:
1. Lead finish is “C” (gold) only.
2. Aeroflex offer Column Attachment as an additional service for the Ceramic Grid Array (Case
outline “S.” If needed, please ask for COLUMN ATTACHMENT when submitting your
request for quotation.
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Aeroflex Colorado Springs - Datasheet Definition
Advanced Datasheet - Product In Development
Preliminary Datasheet - Shipping Prototype
Datasheet - Shipping QML & Reduced Hi – Rel
This product is controlled for export under the U.S. Department of Commerce (DoC).
A license may be required prior to the export of this product from the United States.
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