ROHM BM60013FV-C

BM60013FV-C
Datasheet
Gate Driver Providing Galvanic isolation Series
Isolation voltage 2500Vrms
1ch Gate Driver Providing Galvanic Isolation
BM60013FV-C
●General Description
The BM60013FV-C is a gate driver with isolation voltage
2500Vrms, I/O delay time of 200ns, and minimum input
pulse width of 100ns, and incorporates the fault signal
output functions, undervoltage lockout (UVLO) function,
thermal protection function, and short current protection
(SCP, DESAT) function.
●Key Specifications
■ Isolation voltage:
■ Maximum gate drive voltage:
■
I/O delay time:
■
Minimum input pulse width:
W(Typ.) x D(Typ.) x H(Max.)
6.50 ㎜×8.10 ㎜×2.01 ㎜
●Package
SSOP-B20W
●Features
■
Providing Galvanic Isolation
■
Active Miller Clamping
■
Fault signal output function
(Adjustable output holding time)
■
Undervoltage lockout function
■
Thermal protection function
(Adjustable threshold voltage)
■
Short current protection function
(Adjustable threshold voltage)
■
Soft turn-off function for short current protection
2500 [Vrms] (Min.)
20 [V] (Max.)
200 [ns] (Max.)
100 [ns] (Max.)
●Applications
■
Automotive isolated IGBT/MOSFET inverter gate drive
■
Automotive DC-DC converter
■
Industrial inverters systems
■
UPS systems
● Typical Application Circuits
GND1
PROOUT
S
LOGIC
INB
Q
MASK
PRE
DRIVER
FLT
VCC2
LOGIC
UVLO
FB
MASK
TIMER
INA
ECU
FLT
CFLT RLS
ENA
CVCC1
OUT1
R
FLTRLS
VCC1
GND2
FLT
TIMER
OUT2
UVLO
SCPIN
MASK
SCPTH
MASK
MASK
TEST
CVCC2
RFLTRLS
NC
VTSTH
GND2
MASK
GND1
VTSIN
Sens or
Figure 1. For using 4-pin IGBT (for using SCP function)
GND1
PROOUT
LOGIC
INB
MASK
S
Q
PRE
DRIVER
FLT
CFLT RLS
ENA
CVCC1
VCC2
LOGIC
UVLO
FB
MASK
TIMER
INA
ECU
OUT1
R
FLTRLS
VCC1
GND2
FLT
FLT
TIMER
OUT2
UVLO
SCPIN
MASK
SCPTH
MASK
MASK
TEST
CVCC2
RFLTRLS
NC
VTSTH
GND2
MASK
GND1
VTSIN
Sens or
Figure 2. For using 3-pin IGBT (for using DESAT function)
○Product structure：Silicon monolithic integrated circuit
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Datasheet
BM60013FV-C
●Recommended range of external constants
Pin Name
Recommended Value
Symbol
Min.
Typ.
Unit
Max.
CFLTRLS
-
0.01
0.47
uF
RFLTRLS
50
200
1000
kΩ
VCC1
CVCC1
0.1
1.0
-
uF
VCC2
CVCC2
0.33
-
-
uF
FLTRLS
●Pin Configuration
SSOP-B20W
(TOP VIEW)
1pin
Figure 3. Pin configuration
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●Pin Description
Pin No.
Pin Name
1
VTSIN
Thermal detection pin
2
GND2
Output-side ground pin
3
VTSTH
Thermal detection threshold setting pin
4
SCPTH
Short current detection threshold setting pin
5
SCPIN
Short current detection pin
6
OUT2
MOS FET control pin for Miller Clamp
7
VCC2
Output-side power supply pin
8
OUT1
Output pin
9
GND2
Output-side ground pin
10
PROOUT
11
GND1
12
NC
No Connect
13
INB
Invert / non-invert selection pin
14
FLTRLS
15
VCC1
16
FLT
Fault output pin
17
INA
Control input pin
18
ENA
Input enabling signal input pin
19
TEST
Test mode setting pin
20
GND1
Input-side ground pin
2/30
Function
Soft turn-off pin
Input-side ground pin
Fault output holding time setting pin
Input-side power supply pin
TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
BM60013FV-C
●Description of pins and cautions on layout of board
1）VCC1 (Input-side power supply pin)
The VCC1 pin is a power supply pin on the input side. To suppress voltage fluctuations due to the current to drive
internal transformers, connect a bypass capacitor between the VCC1 and the GND1 pins.
2）GND1 (Input-side ground pin)
The GND1 pin is a ground pin on the input side.
3）VCC2 (Output-side power supply pin)
The VCC2 pin is a power supply pin on the output side. To reduce voltage fluctuations due to OUT1, OUT2 pin output
current and due to the current to drive internal transformers, connect a bypass capacitor between the VCC2 and the
GND2 pins.
4）GND2 (Output-side ground pin)
The GND2 pin is a ground pin on the output side. Connect the GND2 pin to the emitter / source of a power device.
5）IN (Control input terminal)
The IN pin is a pin used to determine output logic.
ENA
INB
INA
L
X
X
H
L
L
H
L
H
H
H
L
H
H
H
OUT1
L
L
H
H
L
6）FLT (Fault output pin)
The FLT pin is an open drain pin used to output a fault signal when a fault occurs (i.e., when the undervoltage lockout
function (UVLO), short current protection function (SCP) or thermal protection function is activated).
This pin is I/O pin and if L voltage is externally input, the output is set to L status regardless of other input logic.
Consequently, be sure to connect the pull-up resistor between VCC1 pin and the FLT pin even if this pin is not used.
Pin
FLT
While in normal operation
Hi-Z
When an Fault occurs
L
(When UVLO, SCP or thermal protection is activated)
7）FLTRLS (Fault output holding time setting pin)
The FLTRLS pin is a pin used to make setting of time to hold a fault signal. Connect a capacitor between the FLTRLS
pin and the GND1 pin, and a resistor between it and the VCC1 pin.
The fault signal is held until the FLTRLS pin voltage exceeds a voltage set with the VFLTRLS parameter. To set holding
time to 0 ms, do not connect the capacitor. Short-circuiting the FLTRLS pin to the VCC1 pin will cause a high current to
flow in the FLTRLS pin and, in an open state, may cause the IC to malfunction. To avoid such trouble, be sure to
connect a resistor between the FLTRLS and the VCC1 pins.
8）OUT1 (Output pin)
The OUT1 pin is a pin used to drive the gate of a power device.
9）OUT2 (MOS FET control pin for Miller Clamp)
The OUT2 pin is a pin for controlling the external MOS switch for preventing increase in gate voltage due to the miller
current of the power device connected to OUT1 pin.
10）PROOUT (Soft turn-off pin)
The PROOUT pin is a pin used to put the soft turn-off function of a power devise in operation when the SCP function is
activated. This pin combines with the gate voltage monitoring pin for Miller Clamp function.
11）SCPIN (Short current detection pin), SCPTH (Short current detection threshold setting pin)
The SCPIN pin is a pin used to detect current for short current protection. When the SCPIN pin voltage exceeds a
voltage set with the SCPTH pin voltage, the SCP function will be activated. This may cause the IC to malfunction in an
open state. To avoid such trouble, short-circuit the SCPIN pin to the GND2 pin and SCPTH pin to the VCC2 pin if the
short current protection is not used. In order to prevent the wrong detection due to noise, the noise mask time tSCPMSK is
set.
12）VTSIN(Thermal detection pin), VTSTH (Thermal detection threshold setting pin)
The VTSIN pin is a temperature sensor voltage input pin, which can be used for thermal protection of a power device.
If VTSIN pin voltage becomes VTSTH pin voltage or less, OUT1 pin is set to L. In the open status, the IC may
malfunction, so be sure to supply the VTSIN more than VTSTH if the thermal protection function is not used. In order to
prevent the wrong detection due to noise, the noise mask time tTSMSK is set.
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BM60013FV-C
●Description of functions and examples of constant setting
1) Miller Clamp function
When OUT1=L and PROOUT pin voltage < VOUT2ON, H is output from OUT2 pin and the external MOS switch is turned ON.
When OUT1=H, L is output from OUT2 pin and the external MOS switch is turned OFF. While the short-circuit protection
function is activated, L is output from OUT2 pin and the external MOS switch is turned OFF.
Short current
SCPIN
IN
(INA EXOR INB)
PROOUT
OUT2
Detected
Not less than VSCPTH
X
X
L
X
L
Not less than VOUT2ON
L
X
L
Less than VOUT2ON
H
X
H
X
L
Not detected
VCC2
PREDRIV ER
OUT1
PREDRIV ER
PROOUT
LOGIC
PREDRIV ER
PREDRIV ER
OUT2
PREDRIV ER
+
V OUT2ON
GND2
Figure 4. Block diagram of Miller Clamp function
tPOFF
tPON
IN
OUT1
PROOUT
(Monitor the gate voltage)
OUT2
VOUT2ON
tOUT2ON
Figure 5. Timing chart of Miller Clamp function
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Datasheet
BM60013FV-C
2) Fault status output
This function is used to output a fault signal from the FLT pin when an fault occurs (i.e., when the undervoltage lockout
function (UVLO), short current protection function (SCP) or thermal protection function is activated) and hold the fault
signal until the set Fault output holding time is completed. The fault output holding time tFLTRLS is given as the following
equation with the settings of capacitor CFLTRLS and resistor RFLTRLS connected to the FLTRLS pin. For example, when
CFLTRLS is set to 0.01F and RFLTRLS is set to 200k, the holding time will be set to 2 ms.
tFLTRLS [ms]= CFLTRLS [F]•RFLTRLS [k]
To set the fault output holding time to “0” ms, only connect the resistor RFLTRLS.
Status
FLT pin
Normal
Hi-Z
Fault occurs
L
Fault occurs (The UVLO, SCP or
thermal protection function is activated.)
Status
ENA
VFLTRLS
C FLTRLS RFLTRLS
FLTRLS
Hi-Z
FLT
L
H
UVLO
SCP
VTS
VCC1
MASK
MASK
MASK
MASK
FLTRLS
SS
FLT
R
R
-
+
FLT
MASK
OUT1
L
ECU
Fault output holding time
（tFLTRLS）
LOGIC
GND1
Figure 7. Fault Output Block Diagram
Figure 6. Fault Status Output Timing Chart
3) Undervoltage Lockout (UVLO) function
The BM60013FV-C incorporates the undervoltage lockout (UVLO) function both on the low and the high voltage sides.
When the power supply voltage drops to the UVLO ON voltage, the OUT1 pin and the FLT pin both will output the “L”
signal. When the power supply voltage rises to the UVLO OFF voltage, these pins will be reset. However, during the fault
output holding time set in “2) Fault status output” section, the OUT1 pin and the FLT pin will hold the “L” signal. In
addition, to prevent malfunctions due to noises, mask time tUVLO1MSK and tUVLO2MSK are set on both low and high
voltage sides.
H
L
IN
VUVLO1H
VUVLO1L
VCC1
FLT
OUT1
Figure 8. Input-side UVLO Function Operation Timing Chart
Hi-Z
L
H
L
H
L
IN
VUVLO2H
VUVLO2L
VCC2
Hi-Z
L
H
Hi-Z
L
FLT
OUT1
Figure 9. Output-side UVLO Operation Timing Chart
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Datasheet
BM60013FV-C
4) Short current protection function (SCP, DESAT)
When the SCPIN pin voltage exceeds a voltage set with the SCPTH pin voltage, the SCP function will be activated. When
the SCP function is activated, the OUT1 pin voltage will be set to the “Hi-Z” level first, and then the PROOUT pin voltage
to the “L” level (soft turn-off).Next, after tSTO has passed after the short-circuit current falls below the threshold value,
OUT1 pin becomes L and PROOUT pin becomes Hi-Z. Finally, when the fault output holding time set in “2) fault status
output” section on page 5 is completed, the SCP function will be released.
VCOLLECTOR/VDRAIN which Desaturation Protection starts operation (VDESAT) and the blanking time (tBLANK) can be calculated
by the formula below;
R3  R 2
 V FD1
R3
R3  R 2  R1
VCC 2 MIN V   V SCPTH 
R3
R 2  R1
R3  R 2  R1 V SCPTH
t BLANK outernal s   
 R3  C BLANK  ln(1 

)  0.2  10  6
R3  R 2  R1
R3
VCC 2
V DESAT V   V SCPTH 
Reference Value (In case of SCPTH=0.7V)
VDESAT
R1
R2
R3
4.0V
15 kΩ
39 kΩ
6.8 kΩ
4.5V
15 kΩ
43 kΩ
6.8 kΩ
5.0V
15 kΩ
36 kΩ
5.1 kΩ
5.5V
15 kΩ
39 kΩ
5.1 kΩ
6.0V
15 kΩ
43 kΩ
5.1 kΩ
6.5V
15 kΩ
62 kΩ
6.8 kΩ
7.0V
15 kΩ
68 kΩ
6.8 kΩ
7.5V
15 kΩ
82 kΩ
7.5 kΩ
8.0V
15 kΩ
91 kΩ
8.2 kΩ
8.5V
15 kΩ
82 kΩ
6.8 kΩ
9.0V
15 kΩ
130 kΩ
10 kΩ
9.5V
15 kΩ
91 kΩ
6.8 kΩ
10.0V
15 kΩ
130 kΩ
9.1 kΩ
VCC2
VCC1
R1
D1
OUT1
LOGIC
S
FLTRLS
+
-
R
PROOUT
Q
R2
FLT
SCPIN
VFLTRLS
SCPMASK
+
-
SCPTH
GND2
CBLANK
R3
VSCPTH
GND2
Figure 10. Block Diagram for DESAT
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BM60013FV-C
INA
OUT1
OUT2
PROOUT
SCPIN
FLT
t SCPMSK(Typ 3.0us)
VSCPTH
t SCPMSK
VSCPTH
tBLANKouternal
tBLANK
tBLANKouternal
tBLANK
Figure 11. DESAT sequence
H
L
IN
VSCPTH
SCPIN
OUT1
H
Hi-Z
L
OUT2
H
Hi-Z
L
Hi-Z
L
Hi-Z
L
PROOUT
FLT
tSTO
tSTO
Fault output holding time*7
Fault output holding time *7
*7: “2)
Fault status output” section on page 5
Figure 12. SCP Operation Timing Chart
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Datasheet
BM60013FV-C
Start
OUT1=L, OUT2=H, PROOUT=Hi-Z
No
VSCPIN>VSCPTH
No
VFLTRLS>VTFLTRLS
Yes
Yes
No
Exceed mask time
Yes
FLT=Hi-Z
OUT1=Hi-Z, OUT2=L,
PROOUT=L, FLT=L
No
IN=H
No
VSCPIN<VSCPTH
Yes
OUT1=H, OUT2=L
Yes
No
Exceed tSTO
Yes
Figure 13. SCP Operation Status Transition Diagram
VCC2
VCC1
OUT1
LOGIC
FLTRLS
S
+
R
-
PROOUT
Q
FLT
SCPIN
VFLTRLS
SCPMASK
+
-
SCPTH
GND2
RSCP
VSCPTH
GND2
Figure 14. Block Diagram for SCP
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BM60013FV-C
5）I/O condition table
Input
No.
Status
1
VCC1UVLO
2
3
VCC2UVLO
4
5
Disable
6
7
8
FLT external input
Output
I
N
A
P
R
O
O
U
T
O
U
T
1
O
U
T
2
P
R
O
O
U
T
F
L
T
X
X
H
L
L
Hi-Z
L
X
X
X
L
L
H
Hi-Z
L
X
X
X
X
H
L
L
Hi-Z
L
L
X
X
X
X
L
L
H
Hi-Z
L
H
L
H
L
X
X
H
L
L
Hi-Z
Hi-Z
○
H
L
H
L
X
X
L
L
H
Hi-Z
Hi-Z
○
○
H
L
L
X
X
X
H
L
L
Hi-Z
Hi-Z
○
○
H
L
L
X
X
X
L
L
H
Hi-Z
Hi-Z
V
C
C
1
V
C
C
2
V
T
S
I
N
S
C
P
I
N
F
L
T
E
N
A
I
N
B
UVLO
X
X
L
X
X
UVLO
X
X
L
X
X
UVLO
X
L
X
UVLO
X
○
○
○
9
SCP
○
○
X
H
X
X
X
X
X
Hi-Z
L
L
L
10
Thermal
protection
○
○
L
L
X
X
X
X
H
L
L
Hi-Z
L
○
○
L
L
X
X
X
X
L
L
H
Hi-Z
L
Non-invert
operation L input
○
○
H
L
H
H
L
L
H
L
L
Hi-Z
Hi-Z
○
○
H
L
H
H
L
L
L
L
H
Hi-Z
Hi-Z
11
12
13
14
Non-invert
operation H input
○
○
H
L
H
H
L
H
X
H
L
Hi-Z
Hi-Z
15
Invert operation L
input
○
○
H
L
H
H
H
L
X
H
L
Hi-Z
Hi-Z
○
○
H
L
H
H
H
H
H
L
L
Hi-Z
Hi-Z
H
L
H
H
H
H
16
17
Invert operation H
input
(Caution)
L
L
H
Hi-Z
Hi-Z
○: VCC1 or VCC2 > UVLO, X:Don't care
When other errors are complicated immediately after the SCP function is activated, SCP function (soft turn-off) is
given to priority.
○
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6) Power supply startup / shutoff sequence
H
L
IN
VCC1
VUVLO1L
VUVLO1L
VCC2
VUVLO2H
VUVLO2H
0V
0V
H
Hi-Z
L
H
Hi-Z
L
Hi-Z
L
OUT1
OUT2
PROOUT
Hi-Z
L
FLT
H
IN
L
VCC1
VUVLO1H
VUVLO1H
VUVLO2L
VCC2
0V
VUVLO2L
0V
H
Hi-Z
L
H
Hi-Z
L
Hi-Z
L
Hi-Z
L
OUT1
OUT2
PROOUT
FLT
: Since the VCC2 pin voltage is low and the output MOS does not turn ON, the
output pins become Hi-Z conditions.
: Since the VCC1 pin voltage is low and the FLT output MOS does not turn ON, the
output pins become Hi-Z conditions.
Figure 15. Power supply startup / shutoff sequence
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BM60013FV-C
●Absolute maximum ratings
Parameter
Symbol
Input-side supply voltage
Limits
VCC1
Output-side supply voltage
-0.3 to +7.0
-0.3 to +25.0
VIN
FLT pin input voltage
-0.3 to +7.0
-0.3 to +VCC2+0.3V or +25.0
*2
-0.3 to +7.0
-0.3 to +VCC2+0.3V or +25.0
*3
IOUT1
OUT1 pin output current (Peak 1us)
0.4
IOUT1PEAK
OUT2 pin output current (DC)
OUT2 pin output current (Peak 1us)
PROOUT pin output current
0.1
A
1.0
A
*3
IPROOUT
FLT output current
A
*3
IOUT2PEAK
0.2
IFLT
V
A
5.0
IOUT2
V
V
*2
VSCPTH
OUT1 pin output current (DC)
V
*2
VVTSTH
SCPTH pin input voltage
V
*2
VSCPIN
VTSTH pin input voltage
V
*1
-0.3 to +VCC1+0.3 or +7.0
VVTSIN
SCPIN pin input voltage
V
*1
-0.3 to +VCC1+0.3 or +7.0
VFLTRLS
VTSIN pin input voltage
V
*1
-0.3 to +VCC1+0.3 or +7.0
VFLT
FLTRLS pin input voltage
V
*2
VCC2
INA, INB, ENA pin input voltage
Unit
*1
A
10
mA
*4
Power dissipation
Pd
1.19
W
Operating temperature range
Topr
-40 to +125
℃
Storage temperature range
Tstg
-55 to +150
℃
Junction temperature
Tjmax
+150
℃
*1 Relative to GND1.
*2 Relative to GND2.
*3 Should not exceed Pd and Tj=150C.
*4 Derate above Ta=25C at a rate of 9.5mW/C. Mounted on a glass epoxy of 70 mm  70 mm  1.6 mm.
●Recommended operating conditions
Parameter
Symbol
Input-side supply voltage
Min.
Max.
Units
*5
4.5
5.5
V
*6
VCC1
Output-side positive supply voltage
VCC2
14.0
20.0
V
Short current detection common mode input voltage
VSCCM
0.0
2.5
V
Thermal detection common mode input voltage
VTSCM
0.0
3.0
V
*5
*6
Relative to GND1.
Relative to GND2.
●Insulation related characteristics
Parameter
Insulation Resistance (VIO=500V)
Symbol
Characteristic
9
Units
RS
>10
Ω
Insulation Withstand Voltage / 1min
VISO
2500
Vrms
Insulation Test Voltage / 1sec
VISO
3000
Vrms
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BM60013FV-C
●Electrical characteristics
（Unless otherwise specified Ta=-40℃ to 125℃, VCC1=4.5V to 5.5V, VCC2=14V to 20V）
Parameter
Symbol
Min.
Typ.
Max.
General
Input side circuit current 1
ICC11
0.10
0.35
0.60
Input side circuit current 2
ICC12
0.10
0.35
0.60
Input side circuit current 3
ICC13
1.1
1.9
2.7
Input side circuit current 4
ICC14
2.0
3.4
4.8
Output side circuit current 1
ICC25
1.6
2.6
3.6
Output side circuit current 2
ICC26
1.0
1.7
2.4
Logic block
Logic high level input voltage
VINH
0.7×VCC1
VCC1
Logic low level input voltage
VINL
0
0.3×VCC1
Logic pull-down resistance
RIND
25
50
100
Logic input minimum pulse width
tINMin
100
ENA, FLT mask time
tFLTMSK
4
10
20
Output
OUT1 ON resistance (Source)
RONH
0.7
1.8
4.0
OUT1 ON resistance (Sink)
RONL
0.4
0.9
2.0
Unit
mA
mA
mA
mA
mA
mA
OUT1=L
OUT1=H
INA =10kHz, Duty=50%
INA =20kHz, Duty=50%
OUT1=L
OUT1=H
V
V
kΩ
ns
μs
INA, INB, ENA, FLT
INA, INB, ENA, FLT
INA, INB, ENA
INA, INB
ENA, FLT
Ω
Ω
IOUT1=40mA
IOUT1=40mA
VCC2=15V,
design assurance
IPROOUT=40mA
OUT1 maximum current
IOUT1MAX
3.0
4.5
-
A
PROOUT ON resistance
RONPRO
0.4
0.9
2.0
Ω
tPON
100
150
200
ns
Turn ON time
Turn OFF time
tPOFF
100
150
200
ns
tPDIST
tRISE
tFALL
RON2H
RON2L
VOUT2ON
tOUT2ON
CM
-20
25
25
5
1.7
1.8
100
0
50
50
10
3.5
2
40
-
20
100
100
20
7
2.2
80
-
ns
ns
ns
Ω
Ω
V
ns
kV/μs
VUVLO1H
VUVLO1L
4.25
4.15
10
12.5
11.5
4.45
4.35
30
13.5
12.5
V
V
μs
V
V
10
1.00
3.0
0.25
30
5.25
3.9
0.55
110
3.00
30
0.40
μs
mV
μs
V
μs
mV
μs
V
0.64×VCC1
+0.1
V
Propagation distortion
Rise time
Fall time
OUT2 ON resistance (Source)
OUT2 ON resistance (Sink)
OUT2 ON threshold
OUT2 output delay time
Common Mode Transient Immunity
Protection functions
Input-side UVLO OFF voltage
Input-side UVLO ON voltage
Input-side UVLO mask time
Output-side UVLO OFF voltage
Output-side UVLO ON voltage
tUVLO1MSK
VUVLO2H
VUVLO2L
4.05
3.95
2
11.5
10.5
Output-side UVLO mask time
Short current detection offset voltage
Short current detection mask time
SCPIN Input voltage
Soft turn OFF release time
Thermal detection offset voltage
Thermal detection mask time
FLT output low voltage
tUVLO2MSK
VSCDET
tSCPMSK
VSCPIN
tSTO
VTSDET
tTSMSK
VFLTL
4
-3.25
2.1
30
-5.50
4
-
VTFLTRLS
0.64×VCC1
-0.1
FLTRLS threshold
INA
OUT1
50%
-1.25
10
0.18
0.64×VCC1
Conditions
No load
between
OUT1-GND2
No load
between
OUT1-GND2
tPOFF - tPON
10nFbetween OUT1-GND2
10nFbetween OUT1-GND2
IOUT2=40mA
IOUT2=40mA
design assurance
ISCPIN=1mA
IFLT=5mA
50%
tPON
tPOFF
10%
90%
50%
90%
tFALL
tRISE
50%
10%
Figure 16. INA-OUT1 Timing Chart
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TSZ22111・15・001
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TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
BM60013FV-C
●Typical Performance Curves
0.6
0.6
0.5
0.5
0.4
ICC11 [mA]
ICC11 [mA]
Ta=125℃
0.3
0.1
4.50
0.3
Vcc1=5.5V
Vcc1=4.5V
Ta=25℃
Ta=-40℃
0.2
0.4
Vcc1=5.0V
0.2
0.1
4.75
5.00
VCC1 [V]
5.25
-40
5.50
Figure 17. Input side circuit current (at OUT1=L)
-20
0
20
40
60
Ta [℃]
80
100
120
Figure 18. Input side circuit current (at OUT1=L)
0.6
0.6
0.5
0.5
0.4
ICC12 [mA]
ICC12 [mA]
Ta=125℃
0.3
0.1
4.50
0.3
Vcc1=5.5V
Vcc1=4.5V
Ta=25℃
Ta=-40℃
0.2
0.4
Vcc1=5.0V
0.2
0.1
4.75
5.00
VCC1 [V]
5.25
5.50
Figure 19. Input side circuit current (at OUT1=H)
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TSZ22111・15・001
13/30
-40
-20
0
20
40
60
Ta [℃]
80
100
120
Figure 20. Input side circuit current (at OUT1=H)
TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
BM60013FV-C
2.8
2.8
Ta=-40℃
2.4
ICC13 [mA]
ICC13 [mA]
2.4
2.0
Vcc1=5.5V
2.0
Vcc1=4.5V
Ta=25℃
1.6
1.6
Vcc1=5.0V
Ta=125℃
1.2
4.50
1.2
4.75
5.00
VCC1 [V]
5.25
5.50
-40
-20
0
Figure 21. Input side circuit current
(at INA=10kHz and Duty=50%)
Ta=-40℃
4.5
4.1
100
120
Vcc1=5.5V
4.1
ICC14 [mA]
ICC14 [mA]
80
4.9
4.5
3.7
3.3
2.9
2.1
4.50
40
60
Ta [℃]
Figure 22. Input side circuit current
(at INA=10kHz and Duty=50%)
4.9
2.5
20
3.7
3.3
Vcc1=4.5V
2.9
Ta=25℃
Ta=125℃
Vcc1=5.0V
2.5
2.1
4.75
5.00
VCC1 [V]
5.25
5.50
Figure 23. Input side circuit current
(at INA=20kHz and Duty=50%)
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
-40
-20
0
20
40
60
Ta [℃]
80
100
120
Figure 24. Input side circuit current
(at INA=20kHz and Duty=50%)
14/30
TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
BM60013FV-C
3.6
3.6
Vcc2=20V
Ta=125℃
3.2
ICC25 [mA]
ICC25 [mA]
3.2
2.8
2.4
2.8
2.4
Ta=25℃
Vcc2=14V
Ta=-40℃
2.0
2.0
1.6
1.6
14
16
18
-40
20
-20
0
20
VCC2 [V]
Figure 25. Output side circuit current (at OUT1=L)
40
60
Ta [℃]
80
100
120
Figure 26. Output side circuit current (at OUT1=L)
2.4
2.4
2.2
2.2
Vcc2=20V
Ta=125℃
2.0
ICC26 [mA]
2.0
ICC26 [mA]
Vcc2=15V
1.8
1.6
Ta=25℃
1.4
1.8
1.6
Ta=-40℃
1.2
1.2
1.0
1.0
14
16
18
20
VCC2 [V]
Figure 27. Output side circuit current (at OUT1=H)
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
Vcc2=14V
1.4
15/30
-40
-20
0
20
Vcc2=15V
40
60
Ta [℃]
80
100
120
Figure 28. Output side circuit current (at OUT1=H)
TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
BM60013FV-C
24
5.0
4.5
Ta=125℃
Ta=25℃
Ta=-40℃
4.0
2.5
2.0
L level
1.5
12
8
Ta=-40℃
Ta=25℃
Ta=125℃
1.0
Vcc1=5V
16
H level
3.0
OUT1 [V]
VINH / VINL [V]
3.5
20
4
0.5
0.0
4.50
0
4.75
5.00
VCC1 [V]
5.25
5.50
0
1
2
3
4
5
INA [V]
Figure 29. Logic (INA/INB) High/Low level
input voltage
Figure 30. Logic (INA/INB) High/Low level
input voltage at Ta=25℃
100
100
80
tINMin [ns]
RIND [kΩ]
75
Vcc1=4.5V
Vcc1=5.0V
Vcc1=5.5V
60
Vcc1=4.5V
Vcc1=5.0V
Vcc1=5.5V
40
50
20
0
25
-40
-20
0
20
40
60
Ta [℃]
80
100 120
-20
0
20
40
60
Ta [℃]
80
100 120
Figure 32. Logic input minimum pulse width（H pulse）
Figure 31. Logic pull-down resistance
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TSZ02201-0717ABH00020-1-2
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Datasheet
BM60013FV-C
20
100
16
tFLTMSK [us]
tINMin [ns]
80
60
Vcc1=4.5V
Vcc1=5.0V
Vcc1=5.5V
40
Vcc1=5.5V
Vcc1=5.0V
Vcc1=4.5V
12
8
20
4
0
-40
-20
0
20
40
60
Ta [℃]
80
-40
100 120
-20
0
20
40
60
Ta [℃]
80
100
120
Figure 34. ENA input mask time
Figure 33. Logic input minimum pulse width（L pulse）
20
3.7
3.1
Vcc1=5.5V
Vcc1=5.0V
Vcc1=4.5V
12
RONH [Ω]
tFLTMSK [us]
16
Vcc2=14V
Vcc2=15V
Vcc2=20V
2.5
1.9
8
1.3
0.7
4
-40
-20
0
20
40
60
Ta [℃]
80
100
120
Figure 35. FLT input mask time
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
-40
-20
0
20
40
60
Ta [℃]
80
100
120
Figure 36. OUT1 ON resistance (Source)
17/30
TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
2.0
2.0
1.6
1.6
Vcc2=14V
Vcc2=15V
Vcc2=20V
RONPRO [Ω]
RONL [Ω]
BM60013FV-C
1.2
0.8
Vcc2=14V
Vcc2=15V
Vcc2=20V
1.2
0.8
0.4
0.4
-40
-20
0
20
40
60
Ta [℃]
80
100
120
-40
Figure 37. OUT1 ON resistance (Sink)
0
20
40
60
Ta [℃]
80
100
120
Figure 38. PROOUT ON resistance
200
200
180
180
Vcc2=14V
Vcc2=15V
Vcc2=20V
160
tPOFF [ns]
tPON [ns]
-20
140
Vcc2=14V
Vcc2=15V
Vcc2=20V
160
140
120
120
100
100
-40
-20
0
20
40
60
Ta [℃]
80
100 120
-20
0
20
40
60
Ta [℃]
80
100 120
Figure 40. Turn OFF time
Figure 39. Turn ON time
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TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
BM60013FV-C
100
100
Ta=125℃
75
tRISE [ns]
tFALL [ns]
75
Ta=125℃
50
50
Ta=25℃
Ta=25℃
Ta=-40℃
Ta=-40℃
25
25
14
16
18
14
20
16
18
20
VCC2 [V]
VCC2 [V]
Figure 42. Fall time
(10000pF between OUT1-GND2)
Figure 41. Rise time
(10000pF between OUT1-GND2)
6.5
20.0
17.5
RON2L [Ω]
15.0
RON2H [Ω]
Vcc2=14V
Vcc2=15V
Vcc2=20V
Vcc2=14V
Vcc2=15V
Vcc2=20V
12.5
4.0
10.0
7.5
1.5
5.0
-40
-20
0
20
40 60
Ta [℃]
80
100 120
-20
0
20
40
60
Ta [℃]
80
100
120
Figure 44. OUT2 ON resistance (Sink)
Figure 43. OUT2 ON resistance (Source)
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TSZ02201-0717ABH00020-1-2
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Datasheet
BM60013FV-C
80
2.2
Vcc2=20V
Vcc2=15V
Vcc2=14V
60
tOUT2ON [ns]
VOUT2ON [V]
2.1
2.0
Ta=125℃
40
Ta=-40℃
Ta=25℃
1.9
20
1.8
0
-40
-20
0
20
40
60
Ta [℃]
80
100
14
120
16
18
20
VCC2 [V]
Figure 46. OUT2 output delay time
Figure 45. OUT2 ON threshold voltage
30
5
26
4
FLT [V]
3
Ta=125℃
Ta=125℃
Ta=-40℃
Ta=-40℃
2
Ta=25℃
Ta=25℃
tUVLO1MSK [us]
22
18
14
10
1
0
3.95
6
2
4.05
4.15
4.25
VCC1 [V]
4.35
4.45
Figure 47. VCC1 UVLO ON/OFF voltage
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TSZ22111・15・001
-40
-20
0
20
40
60
Ta [℃]
80
100
120
Figure 48. VCC1 UVLO mask time
20/30
TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
BM60013FV-C
30
6
26
5
FLT [V]
Ta=125℃
Ta=125℃
Ta=25℃
3
Ta=25℃
Ta=-40℃
Ta=-40℃
2
tUVLO2MSK [us]
22
4
18
14
10
1
6
0
10.5
2
11.5
12.5
-40
13.5
-20
0
20
VCC2 [V]
80
100
120
Figure 50. VCC2 UVLO mask time
Figure 49. VCC2 UVLO ON/OFF voltage
(at VCC1=5V)
10
3.90
8
Ta=-40℃
6
3.60
Ta=25℃
tSCPMSK [us]
4
VSCDET [mV]
40
60
Ta [℃]
2
0
Ta=125℃
-2
3.30
3.00
Ta=25℃
2.70
-4
-6
Ta=125℃
Ta=-40℃
2.40
-8
-10
2.10
14
16
18
20
14
16
18
VCC2 [V]
VCC2 [V]
Figure 51. SCP offset voltage (at SCPTH=0.7V)
Figure 52. SCP detection mask time
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TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
BM60013FV-C
7.0
110
5.0
3.0
Vcc2=14V
Vcc2=15V
Vcc2=20V
70
VTSDET [mV]
tSTO [us]
90
Vcc2=14V
Vcc2=15V
Vcc2=20V
Max.
1.0
Ta=25℃
Ta=125℃
Ta=-40℃
-1.0
-3.0
50
Min.
-5.0
-7.0
30
-40
-20
0
20
40
60
Ta [℃]
80
14
100 120
16
18
20
VCC2 [V]
Figure 54. VTS offset voltage (at VTSTH=1.7V)
Figure 53. Soft turn OFF release time
30
0.4
26
0.3
18
Ta=-40℃
Ta=25℃
VFLTL [V]
tTSMSK [us]
22
Ta=125℃
14
10
Ta=125℃
0.2
Ta=25℃
0.1
Ta=-40℃
6
2
14
16
18
20
VCC2 [V]
Figure 55. Thermal detection mask time
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TSZ22111・15・001
0.0
4.50
4.75
5.00
VCC2 [V]
5.25
5.50
Figure 56. FLT output low voltage (IFLT=5mA)
22/30
TSZ02201-0717ABH00020-1-2
29.May.2012 Rev.002
Datasheet
BM60013FV-C
3.62
Ta=-40℃
Ta=25℃
Ta=125℃
VTFLTRLS [V]
3.41
3.20
2.99
2.78
4.50
4.75
5.00
VCC1 [V]
5.25
5.50
Figure 57. FLTRLS threshold
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TSZ02201-0717ABH00020-1-2
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Datasheet
BM60013FV-C
●Selection of Components Externally Connected
Recommended
ROHM
RSR025N3
RSS065N03
PROOUT
GND1
RFLTRLS
NC
S
LOGIC
Q
INB
PRE
DRIVER
FLTRLS
FLT
VCC2
LOGIC
UVLO
FB
MASK
TIMER
MASK
CFLTRLS
ENA
C VCC1
OUT2
UVLO
INA
ECU
OUT1
R
MASK
VCC1
GND2
FLT
FLT
TIMER
MASK
MASK
TEST
SCPIN
SCPTH
CVCC2
Recommended
ROHM
MCR03EZP
VTSTH
GND2
MASK
VTSIN
GND1
Figure 58. For using 4-pin IGBT (for using SCP function)
Sens or
Recommended
ROHM
MCR03EZP
Recommended
ROHM
RSR025N3
RSS065N03
GND1
PROOUT
RFLTRLS
NC
S
LOGIC
INB
Q
PRE
DRIVER
R
MASK
FLTRLS
CFLTRLS
CVCC1
OUT1
VCC2
LOGIC
VCC1
UVLO
FLT
MASK
FB
TIMER
INA
ECU
GND2
FLT
ENA
FLT
TIMER
OUT2
UVLO
SCPIN
MASK
SCPTH
MASK
MASK
TEST
CVCC2
Recommended
ROHM
MCR03EZP
VTSTH
GND2
MASK
GND1
VTSIN
Sens or
Figure 59. For using 3-pin IGBT (for using DESAT function)
Recommended
ROHM
MCR03EZP
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TSZ02201-0717ABH00020-1-2
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Datasheet
BM60013FV-C
●I/O equivalence circuits
Pin No.
Name
I/O equivalence circuits
Function
VTSIN
VCC2
Internal power suplly
1
Thermal detection pin
VTSTH
VTSIN
Thermal detection
threshold setting pin
GND2
VTSTH
3
VCC2
SCPTH
Internal power suplly
4
Short current detection
threshold setting pin
SCPIN
SCPIN
Short current detection pin
GND2
SCPTH
5
VCC2
OUT2
6
OUT2
MOS FET control pin
for Miller Clamp
GND2
VCC2
OUT1
8
OUT1
Output pin
GND2
VCC2
PROOUT
10
PROOUT
Soft turn-off pin
GND2
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Datasheet
BM60013FV-C
Pin No.
Name
I/O equivalence circuits
Function
VCC1
FLTRLS
FLTRLS
14
Fault output holding time setting pin
GND1
VC C 1
FLT
FLT
16
Fault output pin
GN D 1
VCC1
INB
13
Invert / non-invert selection pin
INA
INA
INB
ENA
17
Control input pin
ENA
18
Input enabling signal input pin
GND1
VCC1
TEST
TEST
19
Test mode setting pin
GND1
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TSZ02201-0717ABH00020-1-2
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Datasheet
BM60013FV-C
●Power Dissipation
Measurement machine：TH156（Kuwano Electric）
Measurement condition：ROHM board
3
Board size：70×70×1.6mm
1-layer board：θja=105.3℃/W
Power Dissipation:Pd[W]
1.5
1.19W
1.0
0.5
0
0
25
50
75
100
125
150
Ambient Temperature:Ta[℃]
Figure 60. SSOP-B20W Derating Curve
●Thermal design
Please confirm that the IC’s chip temperature Tj is not over 150℃, while considering the IC’s power consumption (W),
package power (Pd) and ambient temperature (Ta). When Tj=150℃ is exceeded the functions as a semiconductor do not
operate and some problems (ex. Abnormal operation of various parasitic elements and increasing of leak current) occur.
Constant use under these circumstances leads to deterioration and eventually IC may destruct. Tjmax=150℃ must be strictly
obeyed under all circumstances.
The IC’s consumed power (P) can be estimated roughly with following equation.
P＝VCC1・ICC1 + VCC2・ICC2 + ION2・RONH・tON・fPWM + IOFF2・RONL・tOFF・fPWM
fPWM : PWM frequency
ION : OUT1 pin outflow current when OUT1 is H state.
tON : Current outflow time from OUT1 pin when OUT1 is H state.
IOFF : OUT1 pin inflow current when OUT1 is L state.
tOFF : Current inflow time to OUT1 pin when OUT1 is L state.
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BM60013FV-C
●Operational Notes
(1) Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc.,
can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open
circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection
devices, such as fuses.
(2) Connecting the power supply connector backward
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power
supply lines. An external direction diode can be added.
(3) Power supply Lines
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply
line, separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply
terminals to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic
capacitors in the circuit, not that capacitance characteristic values are reduced at low temperatures.
(4) GND Potential
The potential of GND1 pin must be minimum potential in all operating conditions. (Input side ; 11pin to 20pin)
The potential of VEE2 pin must be minimum potential in all operating conditions. (Output side ; 1pin to 10pin)
(5) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
(6) Inter-pin shorts and mounting errors
When attaching to a printed circuit board, pay close attention to the direction of the IC and displacement. Improper
attachment may lead to destruction of the IC. There is also possibility of destruction from short circuits which can be
caused by foreign matter entering between outputs or an output and the power supply or GND.
(7) Operation in a strong electric field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
(8) Inspection of the application board
During inspection of the application board, if a capacitor is connected to a pin with low impedance there is a possibility
that it could cause stress to the IC, therefore an electrical discharge should be performed after each process. Also, as a
measure again electrostatic discharge, it should be earthed during the assembly process and special care should be
taken during transport or storage. Furthermore, when connecting to the jig during the inspection process, the power
supply should first be turned off and then removed before the inspection.
(9) Input terminal of IC
Between each element there is a P+ isolation for element partition and a P substrate. This P layer and each element’s
N layer make up the P-N junction, and various parasitic elements are made up.
For example, when the resistance and transistor are connected to the terminal as shown in figure 61,
○When GND＞(Terminal A) at the resistance and GND＞(Terminal B) at the transistor (NPN), the P-N
junction operates as a parasitic diode.
○Also, when GND＞(Terminal B) at the transistor (NPN), The parasitic NPN transistor operates with the
N layers of other elements close to the aforementioned parasitic diode.
Because of the IC’s structure, the creation of parasitic elements is inevitable from the electrical potential relationship. The
operation of parasitic elements causes interference in circuit operation, and can lead to malfunction and destruction. Therefore,
be careful not to use it in a way which causes the parasitic elements to operate, such as by applying voltage that is lower than
the GND (P substrate) to the input terminal.
Transistor(NPN)
Resistor
Terminal B
Terminal A
C
B
Terminal B
E
Terminal A
N
P+
N
P
P+
N
N
P+
Parasitic
element
P+
P
C
E
N
Parasitic
element
P substrate
P substrate
Parasitic
element
B
N
GND
Parasitic
element
GND
GND
GND
Other adjacent elements
Figure 61. Pattern Diagram of Parasitic Element
(10) Ground Wiring Patterns
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change
the GND wiring pattern potential of any external components, either.
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a
reference to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority
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Datasheet
BM60013FV-C
●Ordering Information
B
M
6
0
0
1
F
3
V
-
Package
FV:
SSOP-B20W
Part Number
CE 2
Packaging and forming specification
E2: Embossed tape and reel
●Physical Dimension Tape and Reel Information
SSOP-B20W
<Tape and Reel information>
6.5 ± 0.2
Embossed carrier tape
Quantity
2000pcs
0.3Min.
Direction
of feed
1
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
10
0.15 ± 0.1
0.11
1.7 ± 0.2
Tape
11
6.1 ± 0.2
8.1 ± 0.3
20
0.1
0.65
0.22 ± 0.1
1pin
(Unit : mm)
Reel
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
●Marking Diagram
SSOP-B20W(TOP VIEW)
Part Number Marking
BM60013
LOT Number
1PIN MARK
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Datasheet
BM60013FV-C
●Revision History
Date
Revision
Changes
8.May.2012
001
29.May.2012
002
New Release
Change Description of functions and examples of constant setting‘4)’ Equation
Page 6
of tBLANKouternal.
Page 24 Delete recommended part number ‘RHK005N03’.
Page 28 Change Operational Notes‘(9)’
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Datasheet
Notice
●General Precaution
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ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2) All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
●Precaution on using ROHM Products
1) Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment, transport
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2)
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[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
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H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
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[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4)
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5)
Please verify and confirm characteristics of the final or mounted products in using the Products.
6)
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7)
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8)
Confirm that operation temperature is within the specified range described in the product specification.
9)
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Notice - Rev.003
© 2012 ROHM Co., Ltd. All rights reserved.
Datasheet
●Precaution for Mounting / Circuit board design
1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2)
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
●Precautions Regarding Application Examples and External Circuits
1) If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2)
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
●Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
●Precaution for Storage / Transportation
1) Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2)
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3)
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4)
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
●Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
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When disposing Products please dispose them properly using an authorized industry waste company.
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Datasheet
●Other Precaution
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In no event shall you use in any way whatsoever the Products and the related technical information contained in the
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5)
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