BM60054FV-C : Power Management

Datasheet
Gate Driver Providing Galvanic isolation Series
Isolation voltage 2500Vrms
1ch Gate Driver Providing Galvanic Isolation
BM60054FV-C
Key Specifications
General Description
The BM60054FV-C is a gate driver with isolation voltage
2500Vrms, I/O delay time of 110ns, and a minimum input
pulse width of 90ns. Fault signal output function, ready
signal output function, under voltage lockout (UVLO)
function, short current protection (SCP) function, and
switching controller function are all built-in.




Package
Features
■
■
■
■
■
■
■
■
■
■
■
■
Isolation Voltage:
Maximum Gate Drive Voltage:
I/O Delay Time:
Minimum Input Pulse Width:
SSOP-B28W
2500Vrms
20V(Max)
110ns(Max)
90ns(Max)
W(Typ) x D(Typ) x H(Max)
9.2 mm x 10.4 mm x 2.4 mm
Provides Galvanic Isolation
Fault Signal Output Function
Ready Signal Output Function
Under Voltage Lockout Function
Short Circuit Protection Function
Soft Turn-Off Function for Short Circuit Protection
(Adjustable Turn-OFF time)
Thermal Protection Function
Active Miller Clamping
Switching Controller Function
Output State Feedback Function
UL1577 Recognized:File No. E356010
AEC-Q100 Qualified(Note 1)
(Note 1:Grade1)
Applications
■
■
Driving IGBT Gate
Driving MOSFET Gate
Typical Application Circuit
Figure 1. Typical Application Circuit
○Product structure:Silicon integrated circuit
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BM60054FV-C
Contents
General Description ...................................................................................................................................................................... 1
Features ......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................. 1
Key Specifications ........................................................................................................................................................................ 1
Package
W(Typ) x D(Typ) x H(Max) ....................................................................................................................................... 1
Typical Application Circuit ........................................................................................................................................................... 1
Contents ........................................................................................................................................................................................ 2
Recommended Range of External Constants……………………………………………………………………………………………3
Pin Configuration .......................................................................................................................................................................... 3
Pin Descrlptions ........................................................................................................................................................................... 3
Absolute Maximum Ratings ......................................................................................................................................................... 4
Recommended Operating Conditions ........................................................................................................................................ 4
Insulation Related Characteristics .............................................................................................................................................. 4
Electrical Characteristics ............................................................................................................................................................. 5
Electrical Characteristics – continued ........................................................................................................................................ 6
Typical Performance Curves ........................................................................................................................................................ 7
Figure 3. Main Power Supply Circuit Current…………………………………………………………………………………………7
Figure 4. Output Side Circuit Current(MODE=H, VEE2=0V, OUT1=L)…………………………………………………………….7
Figure 5. Output Side Circuit Current(MODE=H, VEE2=0V, OUT1=H)…………………………………………………………….7
Figure 6. FET_G ON-Resistance(Source side/Sink side)…………………………….……………………..………………………7
Figure 7. Oscillation Frequency………...……………………………………….………………………………………………………8
Figure 8. Soft-start Time…………………………………………………………………………………….…………………….….......8
Figure 9. FB Pin Threshold Voltage……………………………………………………………………….…………………………....8
Figure 10. COMP Pin Sink Current………………………………………………………………………………...…………….……...8
Figure 11. COMP Pin Source Current………………………………………………………………………......................................9
Figure 12. Over-Current Detection Threshold…..……………………………………………………………………………...……..9
Figure 13. Logic Input Filtering Time(L pulse)………………………………………………...……………………………………...9
Figure 14. Logic Input Filtering Time(H pulse)…………………………………………………………………………………….….9
Figure 15. ENA Input Filtering Time………………………………………………..……………………….....................................10
Figure 16. MODE Input Voltage H/L…………………………………………………………….……………………………..……….10
Figure 17. OUT1H ON-Resistance(IOUT1=40mA).………………………………….…………………………………….………...10
Figure 18. OUT1L ON-Resistance(IOUT1=40mA)…………………………………………………...………………………………10
Figure 19. PROOUT ON-Resistance(IPROOUT=40mA) ……………………………………………………………………………11
Figure 20. Turn ON time……………………………………….………………………………………………..……….….…………...11
Figure 21. Turn OFF time……………………………………………………………………………………………….……........…….11
Figure 22. OUT2 ON-Resistance(IOUT2=40mA)…………………………………………………………………..……………...….11
Figure 23. Short Current Detection Threshold Voltage……………………………………………………………..……………..12
Figure 24. DESAT Leading Edge Blanking Time…………………………………………………………………………………....12
Figure 25. Short Current Detection Filter Time………………..…………………………….………………….…………………..12
Figure 26. Short Current Detection Delay Time…………………………………………….………………….…………………...12
Figure 27. SCPIN Low Voltage………………….………………………………………………..……………….……..…………….13
Figure 28. Output Delay Difference between PROOUT and FLT………………………………….……………………….….....13
Figure 29. Thermal Detection Voltage…………………………………………………………………………..……...……………..13
Application Information.............................................................................................................................................................. 14
Description of Functions and Examples of Constant Setting…………………………………………………………………..…..16
Selection of Components Externally Connected ..................................................................................................................... 27
Power Dissipation ....................................................................................................................................................................... 27
Thermal Design ........................................................................................................................................................................... 27
I/O Equivalence Circuits ............................................................................................................................................................. 28
Operational Notes…………………………………………………………………………………………………………………………...32
Ordering Information…………………………………………………………………………………………………………………33
Marking Diagram………….…………………………………………………………………………………………………………………33
Physical Dimension, Tape and Reel Information ..................................................................................................................... 34
Revision History ......................................................................................................................................................................... 35
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BM60054FV-C
Recommended Range of External Constants
Pin Name
Symbol
VREG
Recommended Value
Unit
Min
Typ
Max
CVREG
1.0
3.3
10.0
µF
VCC2
CVCC2
0.33
-
-
µF
RT
RRT
24
68
150
kΩ
Pin Configuration
(TOP VIEW)
VEE2
1
PROOUT
2
VTSIN
3
SCPIN
4
NC
5
GND2
6
MODE
7
UVLOIN
8
VCC2
9
28
8
27
8
26
8
25
8
24
8
23
8
22
8
21
8
20
8
19
8
9
18
8
17
8
16
8
15
8
NC 10
OUT1H 11
1
OUT1L 12
OUT2 13
VEE2 14
GND1
SENSE
FET_G
VREG
V_BATT
COMP
FB
RT
RDY
INB
INA
ENA
FLT
GND1
Pin Descrlptions
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Pin Name
VEE2
PROOUT
VTSIN
SCPIN
NC
GND2
MODE
UVLOIN
VCC2
NC
OUT1H
OUT1L
OUT2
VEE2
GND1
FLT
ENA
INA
INB
RDY
RT
FB
COMP
V_BATT
VREG
FET_G
SENSE
GND1
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Pin Function
Output-side negative power supply pin
Soft turn-off pin / Gate voltage input pin
Thermal detection pin
Short circuit current detection pin
No connection
Output-side ground pin
Mode selection pin of output-side UVLO
Output-side UVLO setting pin
Output-side positive power supply pin
No connection
Source side output pin
Sink side output pin
Output pin for Miller Clamp
Output-side negative power supply pin
Input-side ground pin
Fault output pin
Input enabling signal pin
Control input pin A
Control input pin B
Ready output pin
Switching frequency setting pin for switching controller
Error amplifier inverting input pin for switching controller
Error amplifier output pin for switching controller
Main power supply pin
Input-side internal power supply pin
MOS FET control pin for switching controller
Current detection pin for switching controller
Input-side ground pin
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BM60054FV-C
Absolute Maximum Ratings
Parameter
Main Power Supply Voltage
Output-Side Positive Supply Voltage
Symbol
Limit
Unit
VBATT
-0.3 to +40.0(Note 2)
V
VCC2
+24.0(Note 3)
V
+0.3(Note 3)
V
-0.3 to
Output-Side Negative Supply Voltage
VEE2
Maximum Difference
Between Output-Side Positive and Negative Voltages
VMAX2
30.0
V
VIN
-0.3 to +7.0(Note 2)
V
VMODE
-0.3 to +VCC2+0.3 or +24.0(Note 3)
V
VSCPIN
-0.3 to +VCC2+0.3 or
+24.0(Note 3)
V
-0.3 to +VCC2+0.3 or
+24.0(Note 3)
V
VUVLOIN
-0.3 to +VCC2+0.3 or +24.0(Note 3)
V
IOUT1PEAK
5.0(Note 4)
A
IOUT2PEAK
5.0(Note 4)
A
IPROOUTPEA
2.5(Note 4)
A
K
IFLT
10
mA
IFET_GPEAK
1
A
Pd
1.12(Note 5)
W
Operating Temperature Range
Topr
-40 to +125
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Tjmax
+150
°C
INA, INB, ENA Pin Input Voltage
MODE Pin Input Voltage
SCPIN Pin Input Voltage
VTSIN Pin Input Voltage
-15.0 to
VVTS
UVLOIN Pin Input Voltage
OUT1H, OUT1L Pin Output Current (Peak 10μs)
OUT2 Pin Output Current (Peak 10μs)
PROOUT Pin Output Current (Peak 10μs)
FLT, RDY Pin Output Current
FET_G Pin Output Current (Peak 1μs)
Power Dissipation
Junction Temperature
(Note 2) Relative to GND1
(Note 3) Relative to GND2
(Note 4) Should not exceed Pd and Tj=150C
(Note 5) Derate above Ta=25C at a rate of 9.5mW/C. Mounted on a glass epoxy of 70 mm  70 mm  1.6 mm
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions
Parameter
Symbol
Min
Max
Unit
Main Power Supply Voltage(Note 6)
VBATT
4.0
32
V
Output-Side Positive Supply Voltage(Note 7)
VCC2
10
20
V
VEE2
-12
0
V
VMAX2
10
28
V
fSWR
100
500
kHz
Output-Side Negative Supply
Voltage(Note 7)
Maximum Difference
Between Output-Side Positive and Negative Voltages
Switching frequency for switching controller
(Note 6) Relative to GND1
(Note 7) Relative to GND2
Insulation Related Characteristics (UL1577)
Parameter
Symbol
Characteristic
Unit
RS
>109
Ω
Insulation Withstand Voltage / 1min
VISO
2500
Vrms
Insulation Test Voltage / 1sec
VISO
3000
Vrms
Insulation Resistance (VIO=500V)
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TSZ02201-0818ABH00080-1-2
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BM60054FV-C
Electrical Characteristics
(Unless otherwise specified Ta=-40°C to +125°C, VBATT=4.0V to 32V, VCC2=UVLO to 20V, VEE2=-12V to 0V)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
General
Main Power Supply
1.1
1.6
2.1
IBATT1
mA
V_BATT=4.0V
Circuit Current 1
Main Power Supply
0.8
1.3
1.8
IBATT2
mA
V_BATT=12.0V
Circuit Current 2
Main Power Supply
0.8
1.3
1.8
IBATT3
mA
V_BATT=32.0V
Circuit Current 3
0.7
1.4
2.1
Output Side Circuit Current 1
ICC21
mA
VCC2=14V, OUT1=L
0.4
1.1
1.8
Output Side Circuit Current 2
ICC22
mA
VCC2=14V, OUT1=H
0.8
1.5
2.2
Output Side Circuit Current 3
ICC23
mA
VCC2=18V, OUT1=L
Output Side Circuit Current 4
ICC24
0.8
1.2
1.9
mA
Output Side Circuit Current 5
ICC25
0.9
1.6
2.3
mA
Output Side Circuit Current 6
ICC26
0.6
1.3
2.0
mA
VCC2=16V, VEE2=-8V,
OUT1=H
FET_G Output Voltage H1
VFETGH1
3.8
4.0
4.2
V
4.2V<V_BATT≤32V
IFET_G=0A(open)
FET_G Output Voltage H2
VFETGH2
-
V_BATT-0.2
V_BATT
V
V_BATT ≤ 4.2V
IFET_G =0A(open)
FET_G Output Voltage L
FET_G ON-Resistance
(Source-side)
FET_G ON-Resistance
(Sink-side)
VFETGL
0
-
0.3
V
IFET_G =0A(open)
RONGH
3
6
12
Ω
10mA
RONGL
0.3
0.6
1.3
Ω
10mA
Oscillation Frequency
Soft-start Time
fSW
tSS
182
-
200
-
222
50
kHz
ms
FB Pin Threshold Voltage
FB Pin Input Current
VFB
IFB
1.47
-0.8
1.50
0
1.53
0.8
V
µA
COMP Pin Sink Current
COMP Pin Source Current
ICOMPSINK
ICOMPSOURCE
-160
40
-80
80
-40
160
µA
µA
V_BATT UVLO ON Voltage
V_BATT UVLO Hysteresis
VUVLOBATTL
VUVLOBATTHYS
3.20
0.07
3.40
0.1
3.60
0.13
V
V
DONMAX
VOVTH
1.60
48
1.65
1.70
%
V
VUVTH
1.23
1.30
1.37
V
VOCTH
0.17
0.20
0.23
tDCDCRLS
20
40
60
V
ms
Logic High Level Input Voltage
VINH
2.0
-
5.5
V
INA, INB, ENA
Logic Low Level Input Voltage
Logic Pull-Down Resistance
VINL
RIND
0
25
50
0.8
100
V
kΩ
INA, INB, ENA
INA, INB, ENA
Logic Input Filtering Time
ENA Input Filtering Time
tINFIL
tENAFIL
-
0.5
90
0.8
ns
µs
INA, INB
ENA
MODE Low Level Input Voltage
MODE High Level Input Voltage
VMODEL
VMODEH
0
0.7×VCC2
-
0.3×VCC2
VCC2
V
V
MODE, relative to GND2
MODE,relative to GND2
VCC2=18V, OUT1=H
VCC2=16V, VEE2=-8V,
OUT1=L
Switching Power Supply Controller
Maximum ON DUTY
Over Voltage Detection Threshold
Under Voltage Detection
Threshold
Over-Current Detection Threshold
Protection Holding Time
Logic Block
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RT=68kΩ
TSZ02201-0818ABH00080-1-2
10.Apr.2015 Rev.001
BM60054FV-C
Electrical Characteristics – continued
(Unless otherwise specified Ta=-40°C to +125°C, VBATT=4.0V to 32V, VCC2=UVLO to 20V, VEE2=-12V to 0V)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Output
IOUT1H=40mA
OUT1H ON-Resistance
RONH
0.50
0.85
1.45
Ω
OUT1L ON-Resistance
RONL
0.25
0.45
0.80
Ω
IOUT1L=40mA
VCC2=15V
3.0
4.5
OUT1 Maximum Current
IOUT1MAX
A
Design assurance
0.45
0.85
1.55
IPROOUT=40mA
PROOUT ON-Resistance
RONPRO
Ω
Turn ON Time
tPONA
45
75
105
ns
INA=PWM, INB=L
tPONB
50
80
110
ns
INA=H, INB=PWM
tPOFFA
40
70
100
ns
INA=PWM, INB=L
tPOFFB
tPDISTA
35
-25
65
-5
95
15
ns
ns
INA=H, INB=PWM
tPOFFA – tPONA
-35
-
-15
50
5
-
ns
ns
tPOFFB – tPONB
Rise Time
tPDISTB
tRISE
Fall Time
OUT2 ON-Resistance
tFALL
RON2
0.25
50
0.45
0.80
ns
Ω
Design assurance
IOUT2=40mA
VOUT2ON
CM
1.8
100
2
-
2.2
-
V
kV/μs
Relative to VEE2
Design assurance
VUVLOINL
0.85
0.90
0.95
V
UVLOIN, MODE=L
0.11×
VUVLOINL
11.5
0.12×
VUVLOINL
12.1
V
UVLOIN, MODE=L
VUVLO2L
0.10×
VUVLOINL
10.9
V
VCC2, MODE=H
VUVLO2HYS
tUVLO2FIL
0.8
0.25
1.2
1.5
1.6
3.7
V
µs
VCC2, MODE=H
DESAT Leading Edge
Blanking Time
tDESATleb
0.14
0.20
0.26
µs
Design assurance
Short Current Detection Voltage
VSCDET
0.50
0.2
0.53
0.28
Relative to GND2
tSCPFIL
0.47
0.12
V
Short Current Detection Filter Time
µs
tSCPPRO
0.26
0.38
0.50
µs
SCPIN Pin Low Voltage
VSCPINL
-
0.1
0.22
V
Output Delay Difference
between PROOUT and FLT
tPROFLT
0.1
0.4
0.7
µs
Thermal Detection Voltage
Thermal Detection Filter Time
VTSDET
tTSFIL
1.61
4
1.70
10
1.79
30
V
µs
tSTO
VFLTL
30
-
0.18
110
0.40
µs
V
IFLT=5mA
VOSFBH
4.5
5.0
5.5
V
Relative to GND2
VOSFBL
4.0
4.5
5.0
V
Relative to GND2
tOSFBFIL
1.5
2.0
2.5
µs
VRDYL
-
0.18
0.40
V
Turn OFF Time
Propagation Distortion
OUT2 ON Threshold Voltage
Common Mode Transient Immunity
Protection Functions
Output-side UVLO ON
Threshold Voltage
Output-side UVLO Threshold
Hysteresis
Output-side UVLO ON Voltage
Output-side UVLO Hysteresis
Output-side UVLO Filtering Time
Short
Current
Detection
Delay
Time (PROOUT)
Soft Turn Off Release Time
FLT Output Low Voltage
Gate State H Detection
Threshold Voltage
Gate State L Detection
Threshold Voltage
OSFB Output Filtering Time
RDY Output Low Voltage
INA
VUVLOINHYS
50%
10nF between OUT1-VEE2
ISCPIN=1mA
Relative to GND2
IRDY=5mA
50%
tPON
tPOFF
OUT1H/L
10%
90%
50%
90%
tFALL
tRISE
50%
10%
Figure 2. INA-OUT1H/L Timing Chart
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TSZ02201-0818ABH00080-1-2
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BM60054FV-C
Typical Performance Curves
2.2
2
2
25°C
1.8
1.6
1.4
ICC2 [mA]
IBATT [mA]
1.8
125°C
25°C
1.6
1.4
1.2
1
1.2
-40°C
0.8
1
0.6
-40°C
0.8
4
0.4
11
18
25
10
32
15
20
VCC2 [V]
VBATT [V]
Figure 4. Output Side Circuit Current
(MODE=H, VEE2=0V, OUT1=L)
Figure 3. Main Power Supply Circuit Current
12
2.2
2
Source side
25°C
1.6
RONGH /RONGL[Ω]
1.8
ICC2 [mA]
125°C
125°C
1.4
1.2
1
0.8
9
6
3
Sink side
-40°C
0.6
0.4
0
10
15
20
VCC2 [V]
0
40
80
120
Ta [°C]
Figure 5. Output Side Circuit Current
(MODE=H, VEE2=0V, OUT1=H)
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Figure 6. FET_G ON-Resistance
(Source side/Sink side)
TSZ02201-0818ABH00080-1-2
10.Apr.2015 Rev.001
BM60054FV-C
500
50
40
tSS [ms]
fSW [kHz]
400
300
30
20
200
10
100
0
20
40
60
0
80 100 120 140
-40
0
RRT [kΩ]
1.52
-60
1.51
-80
ICOMPSINK [μA]
VFB [V]
-40
1.5
1.49
-100
-120
1.48
-140
1.47
-160
40
80
120
-40
0
40
80
120
Ta [°C]
Ta [°C]
Figure 9. FB Pin Threshold Voltage
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TSZ22111・15・001
120
Figure 8. Soft-start Time
1.53
0
80
Ta [°C]
Figure 7. Oscillation Frequency
-40
40
Figure 10. COMP Pin Sink Current
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160
0.23
0.21
120
Vocth[V]
ICOMPSOURCE [μA]
140
100
0.19
80
60
0.17
40
-40
0
40
80
-40
120
0
80
120
Ta [°C]
Ta [°C]
Figure 11. COMP Pin Source Current
Figure 12. Over-Current Detection
Threshold
75
75
50
50
tINFIL [ns]
tINFIL [ns]
40
25
25
0
-40
0
40
80
120
Ta [°C]
4
11
18
25
32
Ta [°C]
Figure 13. Logic Input Filtering Time
(L pulse)
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Figure 14. Logic Input Filtering Time
(H pulse)
TSZ02201-0818ABH00080-1-2
10.Apr.2015 Rev.001
1
9
0.8
8.8
VMODEH/L [V]
tENAFIL [µs]
BM60054FV-C
0.6
0.4
VMODEH
8.6
8.4
VMODEL
0.2
8.2
0
8
-40
0
40
80
120
-40
0
40
Ta [℃]
Figure 16. MODE Input Voltage H/L
1.2
1
1
0.8
0.8
RONL [Ω]
RONH [Ω]
1.2
0.6
0.6
0.4
0.4
0.2
0.2
0
0
0
40
80
120
-40
0
40
80
120
Ta [℃]
Ta [℃]
Figure 17. OUT1H ON-Resistance
(IOUT1=40mA)
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120
Ta [℃]
Figure 15. ENA Input Filtering Time
-40
80
Figure 18. OUT1L ON-Resistance
(IOUT1=40mA)
10/35
TSZ02201-0818ABH00080-1-2
10.Apr.2015 Rev.001
BM60054FV-C
105
1.45
1.25
tPONA [ns]
RONPRO [Ω]
85
1.05
0.85
65
0.65
0.45
45
-40
0
40
80
120
-40
0
Ta [℃]
40
80
120
Ta [℃]
Figure 19. PROOUT ON-Resistance
(IPROOUT=40mA)
Figure 20. Turn ON time
100
0.65
tPONA [ns]
RONPRO [Ω ]
80
60
0.45
0.25
40
-40
0
40
80
120
0
40
80
120
Ta [°C]
Ta [℃]
Figure 21. Turn OFF time
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Figure 22. OUT2 ON-Resistance
(IOUT2=40mA)
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0.53
0.26
0.52
0.24
0.51
0.22
tDESATleb [μs]
VSCDET [V]
BM60054FV-C
0.5
0.49
0.2
0.18
0.16
0.48
0.47
0.14
-40
0
40
80
120
-40
0
Ta [°C]
80
120
Ta [°C]
Figure 23. Short Current Detection Voltage
Figure 24. DESAT Leading Edge
Blanking Time
0.28
0.5
0.24
0.44
tSCPPRO [μs]
tSCPFIL [ns]
40
0.2
0.38
0.32
0.16
0.26
0.12
-40
0
40
80
120
0
40
80
120
Ta [°C]
Ta [°C]
Figure 25. Short Current Detection
Filter Time
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Figure 26. Short Current Detection
Delay Time
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BM60054FV-C
0.7
0.2
0.5
tPROFLT [µs]
VSCPINL [V]
0.15
0.1
0.3
0.05
0.1
0
-40
0
40
80
120
Ta [°C]
-40
0
40
80
120
Ta [°C]
Figure 28. Output Delay Difference
between PROOUT and FLT
Figure 27. SCPIN Pin Low Voltage
1.77
VTSDET [V]
1.73
1.69
1.65
1.61
-40
0
40
80
120
Ta [°C]
Figure 29. Thermal Detection Voltage
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Application Information
1. Description of Pins and Cautions on Layout of Board
(1) V_BATT (Main Power Supply Pin)
This is the main power supply pin. Connect a bypass capacitor between V_BATT and GND1 in order to suppress
voltage variations.
(2) GND1 (Input-side Ground Pin)
The GND1 pin is a ground pin on the input side.
(3) VCC2 (Output-side Positive Power Supply Pin)
The VCC2 pin is a positive power supply pin on the output side. To reduce voltage fluctuations due to OUT1H/L pin
output current and due to the driving current of the internal transformers, connect a bypass capacitor between VCC2
and GND2 pins.
(4) VEE2 (Output-side Negative Power Supply Pin)
The VEE2 pin is a power supply pin on the output side. To suppress voltage fluctuations due to OUT1H/L pin output
current and due to the driving current of the internal transformers, connect a bypass capacitor between the VEE2 and
the GND2 pins. Connect the VEE2 pin to the GND2 pin when no negative power supply is used,
(5) GND2 (Output-side Ground Pin)
The GND2 pin is a ground pin on the output side. Connect the GND2 pin to the emitter / source of a power device.
(6) INA,INB,ENA (Control Input Terminal)
The INA,INB,ENA are pins used to determine output logic.
ENA
INB
INA
L
X
X
H
H
X
H
L
L
H
L
H
OUT1H
Hi-Z
Hi-Z
Hi-Z
H
OUT1L
L
L
L
Hi-Z
Fault state(FLT=L output) is released in rising of ENA(L→ H).
(7) FLT (Fault Output Pin)
The FLT pin is an open drain pin used to output a fault signal when short circuit protection function (SCP) or thermal
protection function is activated, and will be cleared at the rising edge of FLT.
Status
FLT
While in normal operation
When a fault occurs
(When SCP or thermal protection is activated)
Hi-Z
L
(8) RDY (Ready Output Pin)
The RDY pin shows the status of three internal protection features which are V_BATT UVLO, VCC2 UVLO, and
output state feedback (OSFB). The term ‘output state feedback’ shows whether PROOUT pin voltage (High or Low)
corresponds to input logic or not.
Status
RDY
While in normal operation
Hi-Z
V_BATT UVLO or VCC2 UVLO or Output state feedback
L
(9) MODE (Mode Selection Pin of Output-side UVLO)
The MODE pin is a pin which selects internal threshold or external setting threshold for output-side UVLO.
MODE
Output-side UVLO threshold voltage
L (=GND2)
Setting by external. (Use UVLOIN pin)
H (=VCC2)
Fixed (=VUVLO2L). (Connect UVLOIN pin to VCC2 pin)
(10) UVLOIN (Output-side UVLO Setting Input Pin)
The UVLOIN pin is a pin for deciding UVLO setting value of VCC2. The threshold value of UVLO can be set by
dividing the resistance voltage of VCC2 and inputting such value. UVLOIN activates only at MODE pin=L. When
MODE pin=H, connect UVLOIN pin to VCC2 pin.
(11) OUT1H, OUT1L(Output Pin)
The OUT1H pin is a source side pin used to drive the gate of a power device, and the OUT1L pin is a sink side pin
used to drive the gate of a power device.
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(12) OUT2 (Miller Clamp Pin)
This is the miller clamp pin for preventing a rise of gate voltage due to miller current of output element connected to
OUT1. It also functions as a pin for monitoring gate voltage for miller clamp and OUT2 pin voltage become not more
than VOUT2ON(typ 2.0V), miller clamp function operates. OUT2 should be connect to VEE2 when miller clamp
function is not used.
(13) PROOUT (Soft Turn-OFF Pin)
This is a pin for soft turn-OFF of output pin when short-circuit protection is in action. It also functions as a pin for
monitoring gate voltage for output state feedback function.
(14) SCPIN(Short Circuit Current Detection Pin)
The SCPIN pin is a pin used to detect current for short circuit protection. When the SCPIN pin voltage exceeds
VSCDET,SCP function will be activated. This may cause the IC to malfunction in an open state. To avoid such trouble,
short-circuit the SCPIN pin to the GND2 pin when the short circuit protection is not used. In order to prevent the
wrong detection due to noise, the noise filter time tSCPFIL is set.
(15) VTSIN (Thermal Detection Pin)
The VTSIN pin is a temperature sensor voltage input pin, which can be used for thermal protection of an output
device. If VTSIN pin voltage becomes VTSDET or less, OUT1H/L pin is set to HiZ/L. IC may malfunction in the open
status, so be sure to supply the VTSPIN more than VTSDET if the thermal protection function is not used. In order to
prevent the wrong detection due to noise, the noise mask time tTSMSK is set. In addition, it can be used also as
compulsive shutdown terminal other than a temperature sense by inputting a comparator output etc.
(16) RT (Switching Frequency Setting Pin for Switching Controller)
The RT pin is a pin used to make setting of switching frequency of switching controller. The switching frequency is
determined by the resistance value connected between RT and GND1. The value of switching frequency is
determined by the value of the resistor RRT.
FSW kHz  1 /( 7.3  108  RRT  2.2  104 )
(17) FB (Error Amplifier Inverting Input Pin for Switching Controller)
This is a voltage feedback pin of the switching controller. This pin combine with voltage monitoring at overvoltage
protection function and under voltage protection function for switching controller. When overvoltage or under voltage
protection is activated, switching controller will be at OFF state (FET_G pin outputs Low). When the protection
holding time (tDCDCRLS) is completed, the protection function will be released. Under voltage function is not activated
during soft-start.
(18) COMP (Error Amplifier Output Pin for Switching Controller)
This is the gain control pin of the switching controller. Connect a phase compensation capacitor and resistor.
(19) VREG (Input-side internal power supply pin)
This is the input-side internal power supply pin. Be sure to connect a capacitor between VREG and GND1 even when
the switching controller is not used, in order to prevent oscillation and suppress voltage variation due to FET_G
output current.
(20) FET_G (MOS FET Control Pin for Switching Controller)
This is a MOSFET control pin for the switching controller transformer drive.
(21) SENSE (Connection to the Current Feedback Resistor of the Switching Controller)
This is a pin connected to the resistor of the switching controller current feedback. This pin combines with current
monitoring at overcurrent protection function for switching controller. When overcurrent protection is activated,
switching controller will be at OFF state (FET_G pin outputs Low). When the protection holding time (tDCDCRLS) is
completed, the over-current function will be released.
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2. Description of Functions and Examples of Constant Setting
(1) Miller Clamp Function
When OUT1=L and PROOUT pin voltage < VOUT2ON, internal MOS of OUT2 pin is turned ON and miller clamp
function operates.
IN
L
OUT2 pin
input voltage
Not more than
VOUT2ON
H
OUT2
L
X
Hi-Z
VCC2
PREDRIV ER
OUT1H/L
PREDRIV ER
PROOUT
LOGIC
PREDRIV ER
OUT2
PREDRIV ER
GND2
+
-
VOUT2ON
VEE2
Figure 30. Block Diagram of Miller Clamp Function
H
ENA
L
H
INA
L
VTSDET
VTSIN
VSCDET
SCPIN
Hi-Z
FLT
L
H
Hi-Z
L
OUT1H/L
OUT2
VOUT2ON
tPON
tSTO
tSTO
Figure 31. Timing Chart of Miller Clamp Function
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(2) Under Voltage Lockout (UVLO) Function
The BM60054FV-C incorporates the under voltage lockout (UVLO) function on V_BATT and VCC2. When the power
supply voltage drops to the UVLO ON voltage, the OUT1H/L pin will output the "Hi-Z / L" and the FLT pin will output
the “L” signal. When the power supply voltage rises to the UVLO OFF voltage, these pins will be reset. In addition, to
prevent mis-triggers due to noise, mask time tUVLOBATTFIL and tUVLO2FIL are set on both voltage sides.
H
L
INA
VUVLOBATTH
VUVLOBATTL
V_BATT
Hi-Z
L
H
L
H
L
RDY
OUT1H/L
FET_G
Figure 32. VBATT UVLO Function Operation Timing Chart
H
L
INA
VUVLOINH
VUVLOINL
UVLOIN
Hi-Z
L
H
L
H
L
RDY
OUT1H/L
FET_G
Figure 33. VCC2 UVLO Function Operation Timing Chart (MODE=L)
H
L
INA
VUVLO2H
VUVLO2L
VCC2
Hi-Z
L
H
L
H
L
RDY
OUT1H/L
FET_G
Figure 34. VCC2 UVLO Function Operation Timing Chart (MODE=H)
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(3) Short Circuit Protection Function (SCP)
When the SCPIN pin voltage exceeds VSCDET, the SCP function will be activated. When the SCP function is activated,
the OUT1H/L pin voltage will be set to the “Hi-Z/Hi-Z” level and the PROOUT pin voltage will go to the “L” level first
(soft turn-OFF). Next, After tSTO has passed, OUT1H/L pin become Hi-Z/L (PROOUT pin hold L). In addition, when
OUT2 pin voltage < VOUT2ON, miller clamp function operates.
When the rising edge is put in the ENA pin, the SCP function will be released.
When OUT1H/L=Hi-Z/L or Hi-Z/Hi-Z, internal MOSFET connected to SCPIN pin turns ON to discharge CBLANK for
desaturation protection function. When OUT1H/L=H/Hi-Z, internal MOSFET connected to SCPIN pin turns OFF.
R3  R 2
 VFD1
R3
R3  R 2  R1
VCC 2 MIN V   VSCDET 
R3
R 2  R1
R3  R 2  R1 VSCDET
t BLANKouternals   
 R3  CBLANK  ln(1 

)  t DESATleb
R3  R 2  R1
R3
VCC 2
VDESAT V   VSCDET 
VDESAT
設定参考値
R1
R2
R3
4.0V
15 kΩ
39kΩ
4.7kΩ
4.5V
15 kΩ
47kΩ
5.1kΩ
5.0V
15 kΩ
51kΩ
5.1kΩ
5.5V
15 kΩ
27kΩ
2.4kΩ
6.0V
15 kΩ
33kΩ
2.7kΩ
6.5V
15 kΩ
62kΩ
4.7kΩ
7.0V
15 kΩ
47kΩ
3.3kΩ
7.5V
15 kΩ
20kΩ
1.3kΩ
8.0V
15 kΩ
82kΩ
5.1kΩ
8.5V
15 kΩ
62kΩ
3.6kΩ
9.0V
15 kΩ
33kΩ
1.8kΩ
9.5V
15 kΩ
75kΩ
3.9kΩ
10.0V
15 kΩ
68kΩ
3.3kΩ
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VCC2
OUT1H/L
FLT
LOGIC
PROOUT
SCPIN
FLT
SCPFIL
+
VSCDET
GND1
GND2
VEE2
Figure 35. Block Diagram of Short Circuit Protection
VCC2
OUT1H/L
FLT
R1
LOGIC
D1
PROOUT
R2
SCPIN
FLT
SCPFIL
+
R3
VSCDET
GND1
GND2
VEE2
Figure 36. Block Diagram of DESAT
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H
L
IN
tSCPFIL
tSCPRO
tSCPFIL
tSCPRO
VSCDET
SCPIN
OUT1H/L
H
Hi-Z
L
PROOUT
Hi-Z
L
Hi-Z
L
FLT
tSTO
tSTO
H
ENA
L
>tENAFIL
>tENAFIL
Figure 37. SCP Operation Timing Chart
Start
VSCPIN>VSCDET
No
OUT1H/L=Hi-Z / L, PROOUT=L, OUT2=L
Yes
Exceed filter time
No
Yes
ENA=L→ H
OUT1H/L=Hi-Z / Hi-Z, PROOUT=L,
FLT=L, OUT2=HiZ
OUT2<VOUT2ON
No
Yes
No
FLT=Hi-Z
Yes
OUT2=L
IN=H
No
Yes
Exceed tSTO
No
OUT1H/L=H / Hi-Z, PROOUT=Hi-Z,
OUT2=HiZ
Yes
Figure 38. SCP Operation Status Transition Diagram
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(4) Thermal Protection Function
When the VTSIN pin voltage becomes VTSDET or less, the thermal protection function will be activated. When the
thermal protection function is activated, the OUT1H/L pin voltage will be set to the “Hi-Z/Hi-Z” level and the PROOUT
pin voltage will go to the “L” level first (soft turn-OFF). Next, when the VTSIN pin voltage rises to the threshold value
and after tSTO has passed, OUT1H/L pin become Hi-Z/L (PROOUT pin hold L). In addition, when OUT2 pin voltage <
VOUT2ON, miller clamp function operates.
When the rising edge is put in the ENA pin, the thermal protection function will be released.
VCC2
OUT1H/L
FLT
LOGIC
PROOUT
FLT
TSFIL
+
VTSDET
GND1
VTSIN
SENSOR
GND2
VEE2
Figure 39. Block Diagram of thermal protection function
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H
L
IN
tTSFIL
tTSFIL
VTSIN
VTSDET
OUT1H/L
H
Hi-Z
L
PROOUT
Hi-Z
L
Hi-Z
L
FLT
tSTO
tSTO
H
ENA
L
>tENAFIL
>tENAFIL
Figure 40. Thermal Protection Function Operation Timing Chart
START
VTSIN>VTSDET
No
Yes
Exceed filter time
No
OUT1H/L=Hi-Z / L, PROOUT=L, OUT2=L
Yes
OUT1H/L=Hi-Z / Hi-Z, PROOUT=L,
FLT=L, OUT2=HiZ
ENA=L→H
No
Yes
OUT2<VOUT2ON
No
FLT=Hi-Z
Yes
VTSIN<VTSDET
No
IN=H
Yes
No
Yes
OUT2=L
OUT1H/L=H / Hi-Z, PROOUT=Hi-Z,
OUT2=HiZ
Exceed tSTO
No
Figure 41. Thermal Protection Function Operation Status Transition Diagram
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(5) Switching Controller
(a) Basic action
This IC has a built-in switching power supply controller which repeats ON/OFF synchronizing with internal clock
set by RT pin. When VBATT voltage is supplied (VBATT > VUVLOBATTH), FET_G pin starts switching by soft-start.
Output voltage is determined by the following equation by external resistance and winding ratio “n” of flyback
transformer (n= VOUT2 side winding number/VOUT1 side winding number)
VOUT 2  VFB  R1  R 2  / R 2  n V
(b) MAX DUTY
When, for example, output load is large, and voltage level of SENSE pin does not reach current detection level,
output is forcibly turned OFF by Maximum On Duty (DONMAX).
(c) Protection function
The switching controller has protection function as overvoltage protection (OVP), under voltage protection (UVP),
and over-current protection (OCP). OVP and UVP monitor the voltage of FB pin, OCP monitor the voltage of
SENSE pin.
When the protection function is activated, switching controller will be OFF state (FET_G pin outputs Low). The
protection holding time (tDCDCRLS) is completed, the protection function will be released. Under voltage function is
not activated during soft-start.
VOUT1
RT
OSC
R1
-
FB
VFB
R2
UVLO_BATT
+
OVP
COMP
VOUT2
UVP
Maxduty
V_BATT
VREG
VREG
R
Q
FET_G
S
SENSE
+
COMP
OSC
VFB
Slope
OC
GND1
Softstart
Figure 42. Block Diagram of switching controller
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(d)The pin handling when not using switching controller
When not using switching controller, please do pin handling as follows.
pin no.
pin name
21
RT
22
FB
23
COMP
24
V_BATT
25
VREG
26
FET_G
27
SENSE
RT
processing method
pull down in gnd1 by 68kΩ
connect to VREG
connect to VREG
connect power supply
connect capacitor
open
connect to VREG
OSC
-
FB
VFB
UVLO_BATT
+
OVP
COMP
UVP
Maxduty
V_BATT
VREG
VREG
R
Q
FET_G
S
SENSE
GND1
+
COMP
OSC
VFB
Slope
OC
Softstart
Figure 43. The pin handling when not using switching controller
(6) Gate State Monitoring Function
When gate logic and input logic of output device monitored with PROOUT pin are compared, a logic L is output from
RDY pin when they disaccord. In order to prevent the detection error due to delay of input and output, OSFB filter
time tOSFBFIL is provided.
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(7) I/O Condition Table
Input
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Output
I
N
A
O
U
T
2
P
R
O
O
U
T
O
U
T
1
H
O
U
T
1
L
O
U
T
2
P
R
O
O
U
T
F
L
T
R
D
Y
L
H
H
X
Hi-Z
Hi-Z
Hi-Z
L
L
Hi-Z
H
L
H
L
X
Hi-Z
Hi-Z
L
L
L
Hi-Z
H
X
X
X
H
H
Hi-Z
L
Hi-Z
Hi-Z
Hi-Z
L
L
H
X
X
X
L
L
Hi-Z
L
L
Hi-Z
Hi-Z
L
UVLO
L
H
X
X
X
H
H
Hi-Z
L
Hi-Z
Hi-Z
Hi-Z
L
○
UVLO
L
H
X
X
X
L
L
Hi-Z
L
L
Hi-Z
Hi-Z
L
○
○
L
L
X
X
X
H
X
Hi-Z
Hi-Z
Hi-Z
L
L
Hi-Z
○
○
L
L
X
X
X
L
X
Hi-Z
Hi-Z
L
L
L
Hi-Z
○
○
L
H
L
X
X
H
H
Hi-Z
L
Hi-Z
Hi-Z
Hi-Z
L
○
○
L
H
L
X
X
L
L
Hi-Z
L
L
Hi-Z
Hi-Z
Hi-Z
○
○
L
H
H
H
X
H
H
Hi-Z
L
Hi-Z
Hi-Z
Hi-Z
L
○
○
L
H
H
H
X
L
L
Hi-Z
L
L
Hi-Z
Hi-Z
Hi-Z
Normal Operation
L Input
○
○
L
H
H
L
L
H
H
Hi-Z
L
Hi-Z
Hi-Z
Hi-Z
L
○
○
L
H
H
L
L
L
L
Hi-Z
L
L
Hi-Z
Hi-Z
Hi-Z
Normal Operation
H Input
○
○
L
H
H
L
H
H
H
H
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
○
○
L
H
H
L
H
L
L
H
Hi-Z
Hi-Z
Hi-Z
Hi-Z
L
Status
SCP
UVLO_VBATT
UVLO_VCC2
Thermal
protection
Disable
INB active
V
B
A
T
T
V
C
C
2
S
C
P
I
N
V
T
S
I
N
E
N
A
I
N
B
○
○
H
H
H
○
○
H
H
UVLO
○
L
UVLO
○
○
○ : > UVLO, X:Don't care
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(8) Power Supply Startup / Shutoff Sequence
H
L
IN
VUVLOBATTL
V_BATT
VCC2
VUVLO2H
VUVLOBATTL
VUVLOBATTL
VUVLO2H
VUVLO2H
0V
0V
VEE2
H
Hi-Z
L
Hi-Z
L
Hi-Z
L
Hi-Z
L
OUT1H/L
OUT2
PROOUT
RDY
H
L
IN
V_BATT
VCC2
VUVLOBATTL
VUVLOBATTH
VUVLO2H
VUVLOBATTH
VUVLO2L
0V
VUVLO2L
VEE2
OUT2
PROOUT
RDY
H
L
IN
V_BATT
VUVLOBATTL
VUVLO2H
VUVLOBATTL
VUVLOBATTH
VUVLO2H
0V
VUVLO2L
VEE2
OUT2
PROOUT
RDY
H
L
IN
VCC2
0V
0V
H
Hi-Z
L
Hi-Z
L
Hi-Z
L
Hi-Z
L
OUT1H/L
V_BATT
0V
0V
H
Hi-Z
L
Hi-Z
L
Hi-Z
L
Hi-Z
L
OUT1H/L
VCC2
0V
VUVLOBATTH
VUVLOBATTH
VUVLO2L
VUVLOBATTH
0V
VUVLO2L
VUVLO2L
VEE2
0V
0V
H
Hi-Z
L
Hi-Z
L
Hi-Z
L
Hi-Z
L
OUT1H/L
OUT2
PROOUT
RDY
: Since the VCC2 to VEE2 pin voltage is low and the output MOS does not turn ON,
the output pins become Hi-Z conditions.
: Since the VCC1 to GND1 pin voltage is low and the RDY output MOS does not turn ON,
the output pins become Hi-Z conditions.
Figure 44. Power Supply Startup / Shutoff Sequence
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Selection of Components Externally Connected
Recommended
ROHM
MCR100JZH
LTR50UZP
Recommended
ROHM
MCR03EZP
Recommended
ROHM
MCR03EZP
Recommended
SUMIDA
CEER117
Recommended
ROHM
RB168M150
Recommended
ROHM
LTR18EZP
Recommended
ROHM
MCR100JZH
LTR50UZP
Recommended
ROHM
RSR025N05
Figure 45. Recommended External Parts
Power Dissipation
1.5
Power Dissiqation : Pd [W]
1.25
Measurement machine : TH156 (Kuwano Electric)
Measurement condition : ROHM board
Board size : 114.3×76.2×1.6mm3
1-layer board : θja=111.1°C /W
1
0.75
0.5
0.25
0
0
25
50
75
100
125
150
175
Ambient Temperature : Ta [℃]
Figure 46. SSOP-B28W Derating Curve
Thermal Design
Please make sure that the IC’s chip temperature Tj is not over 150°C, while considering the IC’s power consumption (W),
package power (Pd) and ambient temperature (Ta). When Tj=150°C is exceeded, the IC may malfunctions or some problems
(ex. abnormal operation of various parasitic elements and increasing of leak current) may occur. Constant use under these
circumstances leads to deterioration and eventually IC may destruct. Tjmax=150°C must be strictly obeyed under all
circumstances.
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I/O Equivalence Circuits
Pin No.
Pin Name
Input Output Equivalent Circuit Diagram
Pin Function
VCC2
PROOUT
2
PROOUT
Soft turn-off pin / Gate voltage input
pin
VEE2
VCC2
VTSIN
3
VTSIN
Thermal detection pin
GND2
VCC2
SCPIN
4
SCPIN
Schort circuit current detection pin
GND2
VCC2
MODE
MODE
7
Mode selection pin of output-side
UVLO
GND2
VEE2
VCC2
UVLOIN
UVLOIN
8
Output-side UVLO setting pin
GND2
VEE2
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Pin Name
Pin No.
Input Output Equivalent Circuit Diagram
Pin Function
OUT1H
VCC2
11
Source side output pin
OUT1H
OUT1L
OUT1L
VEE2
12
Sink side output pin
VCC2
OUT2
OUT2
13
Output pin for Miller Clamp
VEE2
FLT
FLT
RDY
16
Fault output pin
RDY
20
GND1
Ready output pin
VREG
ENA
ENA
17
Input enabling signal pin
GND1
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Pin No.
Pin Name
Input Output Equivalent Circuit Diagram
Pin Function
VREG
INA
INA
18
Control input pin A
GND1
VREG
INB
INB
19
Control input pin B
GND1
V_BATT
RT
21
RT
Switching frequency setting pin for
switching controller
VEE2
V_BATT
Internal power
supply
FB
FB
22
GND1
Error amplifier inverting input pin
for switching controller
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Pin Name
Pin No.
Input Output Equivalent Circuit Diagram
Pin Function
V_BATT
Internal power
supply
COMP
COMP
23
Error amplifier output pin for
switching controller
GND1
VREG
V_BATT
25
Internal power
supply
Input-side internal power supply
pin
VREG
FET_G
FET_G
26
MOS FET control pin for switching
controller
GND1
V_BATT
Internal power
supply
SENSE
27
SENSE
Current detection pin for switching
controller
GND1
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Operational Notes
1. Reverse Connection of Power Supply
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital
and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block.
Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the
capacitance value when using electrolytic capacitors.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital
and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block.
Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the
capacitance value when using electrolytic capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on
the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the power dissipation rating be exceeded, the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the
IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of
connections.
8. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always
be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Terminals
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to the power
supply or ground line.
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Operational Notes – continued
12. Regarding Input Pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a parasitic diode
or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
N
Parasitic
Elements
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
Parasitic
Elements
Pin B
B
Parasitic
Elements
GND
GND
N Region
close-by
GND
Figure 47. Example of Monolithic IC Structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
Ordering Information
B
M
6
0
0
5
Part Number
4
F
V
-
Package
FV: SSOP-B28W
CE2
Rank
C:Automotive
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
SSOP-B28W (TOP VIEW)
Part Number Marking
BM60054
LOT Number
1PIN MARK
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Physical Dimension, Tape and Reel Information
Package Name
SSOP-B28W
(Max 9.55 (include.BURR))
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Revision History
Date
Revision
10.Apr.2015
001
Changes
New Release
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Datasheet
Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001