APW7328 3.5A, 5V, 1.2MHz Synchronous Step-Down Converter Features General Description • 3.5A Continuous Output Current • Operating Voltage Range : 2.7V~5.5V The APW7328 is a high efficiency monolithic synchronous buck converter. APW7328 operates with a constant • Fixed Switching Frequency : 1.2MHz (PWM) • 0.6V Reference Voltage • PSM/PWM Operation • Low RDS(ON) Internal Power MOSFETs • OCP Protection and Thermal Shutdown • Internal Compensation • Short Circuit Protection with Hiccup mode devices. The internally fixed 1.2MHz operating frequency allows the use of small surface mount inductors and • Fold-back Switching Frequency capacitors. • Over Temperature Protection • Input Over Voltage Protection • TQFN2x2-12A package • Lead Free and Green Devices Available (RoHS • LCD TV Compliant) • Storage Drives • Portable/Handheld Devices • Wireless/Networking Cards 1.2MHz switching frequency and using the inductor current as a controlled quantity in the current mode architecture. The 2.7V to 5.5V input voltage range makes the APW7328 ideally suited for single Li-Ion battery powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable electrical Applications Simplified Application Circuit VIN 2.7~5.5V C1 VIN VOUT SW PG L1 C2 APW7328 EN FB R1 AGND PGND R2 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 1 www.anpec.com.tw APW7328 Ordering and Marking Information Package Code QB : TQFN-2x2-12A Operating Ambient Temperature Range I : -40 to 85oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device APW7328 Assembly Material Handling Code Temperature Range Package Code APW7328 QB : W28 X X - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Pin Configuration VIN 10 VIN 1 SW 11 SW 2 PGND 12 PGND 3 AGND 4 9 PG 8 EN 7 FB 6 NC NC 5 TQFN-2x2-12A Absolute Maximum Ratings (Note 1) Symbol VIN VSW Parameter VIN to GND Voltage SW to GND Voltage TJ TSDR Unit -0.3 ~ 6 V >20ns -0.3 ~ VIN+0.3 V <20ns -3 ~ 8 V EN, FB, PG to GND Voltage TSTG Rating -0.3 ~7 V Maximum Junction Temperature -40 ~ 150 o Storage Temperature -65 ~ 150 o 260 o Maximum Lead Soldering Temperature (10 Seconds) C C C Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 2 www.anpec.com.tw APW7328 Thermal Characteristics Symbol θJA Parameter Junction-to-Ambient Resistance in Free Air Typical Value (Note 2) Unit o 80 C/W Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Recommended Operating Conditions (Note 3) Symbol Parameter VIN VIN Supply Voltage IOUT Converter Output Current VOUT Output Voltage Inductor L COUT Output Capacitor Range Unit 2.7 ~ 5.5 V 0 ~ 3.5 A 1 ~ 3.3 V 0.47~2.2 µH 4.7~22 µF TA Ambient Temperature -40 ~ 85 o TJ Junction Temperature -40 ~ 125 o C C Note 3: Refer to the typical application circuit. Electrical Characteristics Unless otherwise specified, these specifications apply over VIN= 5V, VEN=5V and TA= 25oC. Symbol Parameter Test Conditions APW7328 Min Typ Max Unit SUPPLY CURRENT IVIN1 VIN Supply Current 1 VIN= 5V, VFB=0.7V, VEN=3V, SW=NC - 40 60 µA IVIN2 VIN Supply Current 2 VIN= 5V, VOUT=3.3V, No Load - - 100 µA VIN Shutdown Supply Current VIN=5V, VEN=0V - - 1 µA IVIN_SD UNDER-VOLTAGE-LOCKOUT (UVLO) VIN UVLO Voltage Threshold VIN rising 2.35 2.5 2.65 V VIN UVLO Voltage Hysteresis VIN falling 0.3 0.4 0.5 V Regulated on FB pin, TJ=25°C 0.591 0.600 0.609 V Oscillator Frequency For APW7328 1.08 1.2 1.32 MHz Frequency Accuracy TJ= -40 ~ 85°C -15 - +15 % - - 100 ns REFERENCE VOLTAGE VREF Reference Voltage OSCILLATOR AND DUTY CYCLE FOSC Minimum on Time Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 3 www.anpec.com.tw APW7328 Electrical Characteristics Unless otherwise specified, these specifications apply over VIN= 5V, VEN=5V and TA= 25 oC. Symbol Parameter Test Conditions APW7328 Min Typ Max Unit POWER MOSFET TD High Side MOSFET Resistance IOUT=2A - 70 - mΩ Low Side MOSFET Resistance IOUT=2A - 60 - mΩ High Side MOSFET Leakage Current VEN=0V, VSW =0V, VIN=5V - - 10 µA Low Side MOSFET Leakage Current VEN=0V, VSW =5V, VIN=5V - - 10 µA Dead Time - 10 - ns 3.7 4.7 5.7 A - 0.4 - V Over Temperature Trip Point - 150 - °C Over Temperature Hysteresis - 30 - °C 6.5 6.75 7 V 0.1 0.3 0.5 V 130 135 140 %VREF - 5 - %VREF 25 30 35 %VREF - 5 - %VREF - 1 - ms PROTECTIONS High Side MOSFET current-limit FB Frequency Foldback Threshold TOTP Input Over Voltage Protection Monitor VFB falling below 0.4V to start foldback frequency Stop Switching Input Over Voltage Protection Hysteresis Over Voltage Protection Stop switching, no latch Over Voltage Protection Hysteresis Hiccup Mode Protection Monitor VREF, enter Hiccup mode Hiccup Mode Protection Hysteresis SOFT-START, ENABLE AND INPUT CURRENTS TSS IFB Soft-Start Time EN High-Level Voltage 1.2 - - V EN Low-Level Voltage - - 0.4 V FB Pin Input Current - - 0.1 µA Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 4 www.anpec.com.tw APW7328 Electrical Characteristics Unless otherwise specified, these specifications apply over VIN= 5V, VEN=5V and TA= 25 oC. Symbol Parameter Test Conditions APW7328 Min Typ Max Unit POWER GOOD PG Low Threshold (PG goes high) VFB rising 85 90 95 %VREF PG Low Threshold Hysteresis VFB falling - 3 - %VREF PG Delay Time The time from VFB=90%*VFB to PG goes high - 90 - µs PG High Threshold(PG goes low) VFB rising 105 110 115 %VREF PG High Threshold Hysteresis VFB falling - 3 - %VREF PG High Threshold Debounce Time - 50 - µs PG Internal Pull Up Resistor - 500 - kΩ PG Pull Low Resistance VPG=0.1V - 100 - Ω PG Leakage Current EN=0V, VPG =5V - - 0.1 µA Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 5 www.anpec.com.tw APW7328 Typical Operating Characteristics Supply Current vs. Input Voltage 0.2 40 0.15 39 Supply Current (µA) Shutdown Current (µA) Shutdown Current vs . Input Voltage 0.1 0.05 38 37 36 0 3 3.5 4 4.5 5 5.5 3 Load Regulation 4.5 5 5.5 1 Output Voltage Variation (%) Output Voltage Variation (%) 4 Line Regulation 0.5 0 -0.5 VIN=3V VIN=4V -1 VIN=5V IL=0A 0.5 IL=2A 0 -0.5 -0.1 -1.5 0 0.4 0.8 1.2 1.6 3 2 3.5 4 4.5 5 Input Voltage (V) Output Current (A) Efficiency vs. Load Current FSW=1.2MHz, VIN=3.3V Reference Voltage vs. Junction Temperature 0.64 100 95 0.63 Efficiency (%) Reference Voltage (V) 3.5 Input Voltage (V) Input Voltage (V) 0.62 0.61 90 85 80 0.6 75 L=1uH PST25201B-1R0MS 1.2V L=1.5uH PST25201B-1R5MS 1.8V 0.59 -40 -20 0 20 40 60 80 70 100 120 0.01 Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 0.1 1 10 Output Current (A) Junction Temperature (oC) 6 www.anpec.com.tw APW7328 Typical Operating Characteristics Efficiency vs. Load Current FSW=1.2MHz, VIN=5V 100 Efficiency (%) 95 90 85 80 Vout=1.2V 75 Vout=1.8V Vout=3.3V 70 0.01 0.1 1 10 Output Current (A) Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 7 www.anpec.com.tw APW7328 Operating Waveforms Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. VIN Power On with 2A Load VIN Power Off with 2A Load VIN VIN 1 1 VOUT 2 2 VSW 3 VOUT VSW 3 IL IL 4 4 CH1: VIN, 2V/Div CH2: VOUT, 500mV/Div CH3: VSW, 5V/Div CH4: IL, 2AV/Div TIME: 1ms/Div CH1: VIN, 2V/Div CH2: VOUT, 1V/Div CH3: VSW, 5V/Div CH4: IL, 2AV/Div TIME: 10ms/Div EN Start Up with 2A Load 1 2 EN Shutdown with 2A Load VEN 1 VOUT V EN VOUT 2 3 4 V SW VSW 3 IL CH1: V EN, 2V/Div CH2: VOUT, 1V/Div CH3: V SW, 5V/Div CH4: IL, 2A/Div TIME: 500µs/Div Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 IL 4 CH1: VEN, 2V/Div CH2: VOUT, 1V/Div CH3: VSW, 5V/Div CH4: IL, 2A/Div TIME: 10µs/Div 8 www.anpec.com.tw APW7328 Operating Waveforms Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Short Circuit Recovery Short Circuit Entry VOUT VOUT 1 1 VSW VSW 2 2 3 IL IL 3 CH1: VOUT, 500mV/Div CH2: VSW,5V/Div CH3: IL,5A/Div TIME: 2ms/Div CH1: VOUT, 500mV/Div CH2: VSW,5V/Div CH3: IL,5A/Div TIME: 2ms/Div Power OK Output Ripple at 0A VOUT 1 1 VSW 2 2 3 IL 3 VOUT VPG CH1: VIN, 2V/Div CH2: VOUT , 500mV/Div CH3: VPG , 5V/Div TIME: 2ms/Div CH1: VOUT, 50mV/Div,AC CH2: VSW , 2V/Div CH3: IL , 1A/Div TIME: 20ms/Div Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 VIN 9 www.anpec.com.tw APW7328 Operating Waveforms Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Load Transient 1 VOUT VSW 2 I OUT 3 CH1: VOUT, 100mV/Div,AC CH2: VSW , 5V/Div CH3: IOUT , 2A/Div TIME: 50µs/Div Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 10 www.anpec.com.tw APW7328 Pin Description PIN FUNCTION NO. NAME 1,10 VIN Power Input. Connect a ceramic bypass capacitor from VIN to GND. 2,11 SW Power Switching Output. The SW is the junction of the high-side and low-side power MOSFET to supply power to the output LC filter. 3,12 PGND Power ground. Connect this pin with large copper area to negative terminals of the input and output capacitors. Ground for controller circuit 4 AGND 5,6 NC NC 7 FB Output Feedback Input. The APW7328 senses the feedback voltage via FB and regulates the voltage at 0.6V. Connecting FB with a resistor-divider from the converter’s output sets the output voltage. 8 EN Enable pin of the PWM converter. When the EN is above high logic level, the device is in operation mode. When the EN is below low logic level, the device is in shutdown mode. This pin can not be left open. 9 PG Power Good Output. When VFB has risen above 90% of VREF during soft-start period, the PG will go high This pin is an open-drain logic output that is pulled to the ground Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 11 www.anpec.com.tw APW7328 Block Diagram VIN Over Temperature Protection LOC UVLO Input over voltage protection Current Sense Amplifier VCC Current Limit R BOND SS Ramp, 0~VREF Tss 135 %VREF Fault Logics OVP Gate Driver SW VRAMP Inhibit Gate Control Zero Cross Comoparator VCC FB Gm VREF EN VCOMP Current Compartor Gate Driver Error Amplifier PGND Slope Compensation EN threshold 1 MΩ LOC Current Sense Amplifier Freq AGND VCC 1.2MHz 500kΩ 90 %VREF FB FB + - 20% Fosc 0 80%V REF FB PG Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 12 www.anpec.com.tw APW7328 Typical Application Circuit For APW7328 VIN 2.7~5.5V C1 22 µ F VIN VOUT 1.2V Power Good SW PG L1 1 µH C2 10 µF x2 APW7328 On/Off EN FB R1 200kΩ AGND PGND R2 200kΩ Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 13 www.anpec.com.tw APW7328 Function Description Main Control Loop Over-Current-Protection and Hiccup The APW7328 is a constant frequency, synchronous rectifier and current-mode switching regulator. In normal The APW7328 has a cycle-by-cycle over-current limit when the inductor current peak value exceeds the set current operation, the internal upper power MOSFET is turned on each cycle. The peak inductor current at which ICMP turn limit threshold. Meanwhile, the output voltage drops until FB is below 30% of the reference voltage the APW7328 off the upper MOSFET is controlled by the voltage on the COMP node, which is the output of the error amplifier enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is (EAMP). An external resistive divider connected between VOUT and ground allows the EAMP to receive an output dead-shorted to ground. The average short circuit current is greatly reduced to alleviate thermal issues and to feedback voltage VFB at FB pin. When the load current increases, it causes a slightly decrease in VFB relative to protect the regulator. The APW7328 exits the hiccup mode once the over-current condition is removed. the 0.6V reference, which in turn causes the COMP voltage to increase until the average inductor current matches the new load current. Over-Temperature Protection (OTP) Enable/Shutdown The over-temperature circuit limits the junction temperature of the APW7328. When the junction temperature ex- Driving EN to the ground places the APW7328 in shutdown mode. When in shutdown, the internal power ceeds 150oC, a thermal sensor turns off the both power MOSFETs, allowing the devices to cool. The thermal sen- MOSFETs turn off, all internal circuitry shuts down and the quiescent supply current reduces to 1µA typical. sor allows the converters to start a soft-start process and regulate the output voltage again after the junction temperature cools by 30oC. The OTP is designed with a 30oC Under Voltage Lockout (UVLO) hysteresis to lower the average Junction Temperature (TJ) during continuous thermal overload conditions, in- An under-voltage lockout function prevents the device from operating if the input voltage on VIN is lower than approximately 2.5V. The device automatically enters the shut- creasing the lifetime of the device. down mode if the voltage on VIN drops below approximately 2.5V. This under-voltage lockout function is imple- Over-Voltage Protection (OVP) mented in order to prevent the malfunctioning of the converter. The over-voltage function monitors the output voltage by FB pin. Once the FB voltage exceeds 135% of the reference voltage, the over-voltage protecton comparator forces Soft-Start The APW7328 has a built-in soft-start to control the output the low-side MOSFET and high-side MOSFET are off. AS soon as the output voltage is below 130% of the refer- voltage rise during start-up. During soft-start, an internal ramp voltage, connected to the one of the positive inputs ence voltage, the low-side MOSFET off and the OVP comparator is disengaged, The chip restores its normal of the error amplifier, raises up to replace the reference voltage (0.6V typical) until the ramp voltage reaches the operation. reference voltage. Then, the voltage on FB regulated at reference voltage. Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 14 www.anpec.com.tw APW7328 Function Description Frequency Foldback The foldback frequency is controlled by the FB voltage. When the output is short to the ground, the frequency of the oscillator will be reduced to 0.1 x FSW . This lower frequency allows the inductor current to safely discharge, there by preventing current runaway. The oscillator’s frequency will gradually increase to its designed rate when the feedback voltgae on FB again approaches 0.6V. Power Good APW7328 has an open drain with 500kΩ pull-up resistor pin for power good indicator. In normal operation, when the output voltage rises 90% of it is target value after 90µs, the PG goes high, when the output voltage outruns 110% of the target voltage, POK signal will be pulled low immediately. Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 15 www.anpec.com.tw APW7328 Application Information Input Capacitor Selection Output Voltage Setting Because buck converters have a pulsating input current, a low ESR input capacitor is required. This results in the In the adjustable version, the output voltage is set by a resistive divider. The external resistive divider is connected to the output, allowing remote voltage sensing as best input voltage filtering, minimizing the interference with other circuits caused by high input voltage spikes. shown in “Typical Application Circuits”. The output voltage can be calculated as below: Also, the input capacitor must be sufficiently large to stabilize the input voltage during heavy load transients. For good input voltage filtering, usually a 22µF input capacitor is sufficient. It can be increased without any limit for better R1 R1 VOUT = VREF ⋅ 1 + = 0.6 ⋅ 1 + R2 R2 input-voltage filtering. Ceramic capacitors show better performance because of the low ESR value, and they are Output Capacitor Selection less sensitive against voltage transients and spikes compared to tantalum capacitors. Place the input capacitor as The current-mode control scheme of the APW7328 allows the use of tiny ceramic capacitors. The higher ca- close as possible to the input and GND pin of the device for better performance. pacitor value provides the good load transients response. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. If required, tantalum capacitors may be used as well. The output Inductor Selection For high efficiencies, the inductor should have a low DC resistance to minimize conduction losses. Especially at ripple is the sum of the voltages across the ESR and the ideal output capacitor. high-switching frequencies, the core material has a higher impact on efficiency. When using small chip inductors, the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting the appropriate inductor. The inductor value ∆VOUT determines the inductor ripple current. The larger the inductor value, the smaller the inductor ripple current and V VOUT ⋅ 1 − OUT VIN ≅ FSW ⋅ L 1 ⋅ ESR + ⋅ ⋅ COUT 8 F SW When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage char- the lower the conduction losses of the converter. Conversely, larger inductor values cause a slower load acteristics of all the ceramics for a given value and size. transient response. A reasonable starting point for setting ripple current, ∆IL, is 40% of maximum output current. The recommended inductor value can be calculated as below: V VOUT 1 − OUT VIN L≥ FSW ⋅ ∆IL IL(MAX ) = IOUT(MAX ) + 1 ∆IL 2 To avoid saturation of the inductor, the inductor should be rated at least for the maximum output current of the converter plus the inductor ripple current. Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 16 www.anpec.com.tw APW7328 Application Information OutPut Capacitor Selection 3. The output capacitor should be place closed to converter VOUT and GND. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These 4. Since the feedback pin and network is a high impedance circuit the feedback network should be routed away dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. VIN from the inductor. The feedback pin and feedback network should be shielded with a ground plane or trace to IIN minimize noise coupling into this circuit. 5. A star ground connection or ground plane minimizes IQ1 IL CIN IOUT ground shifts and noise is recommended. VOUT Q1 SW Recommended Minimum Footprint ESR Q2 COUT VIN IL 1 SW ILIM CIN IPEAK 10 2 3 IL 9 PGND 4 IOUT 11 8 12 7 6 5 IQ1 Figure 1. The 1210 Size Ceramic Capacitor Close to VIN and PGND Layout Consideration For all switching power supplies, the layout is an important step in the design; especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problems and duty cycle jitter. 1. As shown in Figure 1, the 1210 size ceramic capacitor is used, please make sure the two ends of the ceramic capacitor be directly connected to VIN (the power input pin) and PGND (the power GND pin) 2. To minimize copper trace connections that can inject noise into the system, the inductor should be placed as close as possible to the SW pin to minimize the noise coupling into other circuits. Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 17 www.anpec.com.tw To avoid s APW7328 Package Information TQFN2x2-12A D A L b PIN 1 e A1 A3 NX aaa L1 SEATING PLANE Pin 1 Corner S Y M B O L TQFN2*2-12A MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.70 0.80 0.028 0.031 A1 0.00 0.05 0.000 0.002 A3 0.20 REF 0.008 REF b 0.18 0.30 0.007 0.012 D 1.90 2.10 0.075 0.083 E 1.90 2.10 0.075 0.083 e L c L 0.50 BSC 0.30 L1 aaa Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 0.020 BSC 0.40 0.50 BSC 0.012 0.016 0.020 BSC 0.003 0.08 18 www.anpec.com.tw APW7328 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.20 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 2.35±0.20 2.35±0.20 1.00±0.20 TQFN2x2 4.0±0.10 4.0±0.10 (mm) Devices Per Unit Package Type Unit Quantity TQFN2x2 Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 19 www.anpec.com.tw APW7328 Taping Direction Information TQFN2x2 USER DIRECTION OF FEED Classification Profile Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 20 www.anpec.com.tw APW7328 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 21 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APW7328 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2014 22 www.anpec.com.tw