High Reliability Serial EEPROMs WL-CSP EEPROM family SPI BUS BU9829GUL-W No.10001EAT13 ●Description BU9829GUL-W is Serial EEPROM built-in LDO regulator by SPI BUS interface. ●Features ○EEPROM PART 1) 2,048 words×8 bits architecture serial EEPROM 2) Wide operating voltage range (1.6V～3.6V) 3) Serial Peripheral Interface 4) Self-timed write cycle with automatic erase 5) Low Power consumption Write (3.6V) : 1.5mA (Typ.) Read (3.6V) : 0.5mA (Typ.) Standby (3.6V) : 0.1µA (Typ.) 6) Auto-increment of registers address for Read mode 7) 32 byte Page Write mode 8) DATA security Defaults to power up with write-disabled state Software instructions for write-enable/disable Block writes protection by status register Write inhibit at low Vcc 9) Initial data FFh in all address, 00h in status register and 10 in VSET[1:0]. 10) Data retention: 10 years 11) Endurance : 100,000 erase/write cycles ○LDO REGULATOR PART 12) Low power consumption Standby (3.6V) : 0.1 µA (Typ.) Operation (3.6V) : 0.1mA (Typ.) 13) Power on/off by enable pin 14) Initial LDO output voltage 2.9V 15) Setting output voltage by EEPROM command (VSET WRITE) ●Absolute maximum rating (Ta=25℃) Parameter Symbol Rating Unit -0.3～4.5 V Pd 220 mW Storage Temperature Tstg -65 ～ 125 ℃ Operating Temperature Topr -30 ～ 85 ℃ － -0.3～Vcc＋0.3 V Rating Unit Supply Voltage Vcc1(EEPROM) Vcc2(LDO) Power Dissipation Terminal Voltage ●EEPROM recommended operating condition Parameter Symbol Supply Voltage Vcc1 1.6～3.6 Input Voltage VIN 0～Vcc1 ●LDO regulator recommended operating condition Parameter Symbol Rating Supply Voltage Vcc2 2.9～3.6 Input Voltage VIN 0～Vcc2 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/16 V Unit V 2010.09 - Rev.A Technical Note BU9829GUL-W ●Memory cell characteristics (Ta=25℃, Vcc1=1.6～3.6V) Parameter Limits Min. Typ. Max. － － － － Write/Erase Cycle *1 100,000 Data Retention *1 10 ●Input/output capacity (Ta=25℃, Frequency=5MHz) Unit Parameter Cycle Year Input Capacitance *1 Output Capacitance*1 *1 : Not 100% tested Limits Symbol Conditions CIN COUT Min. Max. VIN=GND VOUT=GND － － 8 8 Unit pF pF *1:Not 100% TESTED ●EEPROM DC operating characteristics (Unless otherwise specified, Ta=-30～85℃, Vcc1=1.6～3.6V) Limits Parameter Symbol Unit Test condition Min. Typ. Max. "H" Input Voltage1 "H" Input Voltage2 "L" Input Voltage1 "L" Input Voltage2 "L" Output Voltage1 "L" Output Voltage2 "H" Output Voltage1 "H" Output Voltage1 Input Leakage Current Output Leakage Current VIH1 0.7xVcc1 VIH2 0.75xVcc1 VIL1 -0.3 VIL2 -0.3 VOL1 0 VOL2 0 VOH1 Vcc1-0.2 VOH2 Vcc1-0.2 ILI -1 ILO -1 － － － － － － － － － － Vcc1+0.3 Vcc1+0.3 0.3xVcc1 0.25xVcc1 0.2 0.2 Vcc1 Vcc1 1 1 V V V V V V V V µA µA ICC1 － － 1.5 mA ICC2 － － 2.0 mA ICC3 － － 0.2 mA ICC4 － － 0.6 mA ISB － － 1.0 µA Operating Current Write Operating Current Read Standby Current 2.5≦Vcc1≦3.6V 1.6≦Vcc1＜2.5V 2.5V≦Vcc1≦3.6V 1.6V≦Vcc1＜2.5V IOL=1.0mA , 2.5V≦Vcc1≦3.6V IOL=1.0mA , 1.6V≦Vcc1＜2.5V IOH=-0.4mA , 2.5V≦Vcc1≦3.6V IOH=-100µA , 1.6V≦Vcc1＜2.5V VIN=0～Vcc1 VOUT=0～Vcc1 , CSB=Vcc1 Vcc1=1.8V , fSCK =2MHz, tE/W=5ms Byte Write, Page Write, Write Status Register Vcc1=2.5V , fSCK =5MHz,tE/W=5ms Byte Write, Page Write, Write Status Register Vcc1=1.8V , fSCK=2MHz , SO=OPEN Read, Read Status Register Vcc1=2.5V , fSCK=5MHz,SO=OPEN Read, Read Status Register Vcc1=3.6V , CSB=Vcc1 , SCK , SI=Vcc1/GND ,SO=OPEN ○This product is not designed for protection against radioactive rays. ●EEPROM AC operating characteristics (Ta=-30～85℃) Parameter SCK clock Frequency SCK High Time SCK Low Time CSB High Time CSB Setup Time CSB Hold Time SCK Setup Time SCK Hold Time SI Setup Time SI Hold Time Output Data Delay Time Output Hold Time *1 Outuput Disable Time *1 SCK Rise Time *1 SCK Fall Time *1 Output Rise Time *1 Output Fall Time Write Cycle Time Wait Time From Vcc1 ON To EEPROM Command Symbol 1.6≦VCC1＜1.8V 1.8≦VCC1≦3.6V Unit Min. Typ. Max. Min. Typ. Max. fSCK tSCKWH tSCKWL tCS tCSS tCSH tSCKS tSCKH tDIS tDIH tPD tOH tOZ tRC tFC tRO tFO tE/W － 200 200 200 150 150 50 50 50 50 － 0 － － － － － － － － － － － － － － － － － － － － － － － － 2.5 － － － － － － － － － 100 － 200 1 1 50 50 5 － 80 80 90 60 60 50 50 20 20 － 0 － － － － － － － － － － － － － － － － － － － － － － － － 5 － － － － － － － － － 80 － 80 1 1 50 50 5 MHz ns ns ns ns ns ns ns ns ns ns ns ns µs µs ns ns ms tON 15 － － 15 － － ms *1 : Not 100% tested www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/16 2010.09 - Rev.A Technical Note BU9829GUL-W ●Synchronous data input/output timing tCS tON VCC1 CSB tCSS CSB tSCKS tSCKWL SCK tFC tRC tSCKWH SCK SI tDIH tDIS tSCKH tCSH tPD tOZ tRO,tFO tOH Hi-Z SI SO SO Hi-Z Fig.1 Input timing Fig.2 Input and output timing SI data is latched into the chip at the rising edge of SCK clock. Address and data must be transferred from MSB. SO data toggles at the falling edge of SCK clock. Output data toggles from MSB. ●AC condition Parameter Load Capacitance B A Min. Typ. Max. Unit CL - - 100 pF Input Rise times - - - 50 ns Input Fall times - - - 50 ns Input Pulse Voltage - 0.25Vcc1/0.75Vcc1 V Input and Output Timing Reference Voltages - 0.3VCc1/0.7Vcc1 V ●Pin configuration C Limits Symbol C1 B1 A1 ●Pin function C2 C3 B2 B3 A2 A3 2 3 1 INDEX POST Fig.3 Pin configuration (bottom view) Land No. Pin Name I/O A1 Vcc1 － Function Power Supply (EEPROM) A2 CSB IN Chip Select Control A3 SCK IN Serial Data Clock Input B1 Vcc2 － Power Supply (LDO) B2 SI IN Start Bit, Op.code, Address, Serial Data Input B3 SO OUT Serial Data Output C1 VOUT C2 GND OUT LDO Regulator Output － Ground (0V) C3 LDOEN IN LDO Regulator Enable ●LDO regulator DC operating characteristics (Unless otherwise specified Ta=-30～85℃) Specification Parameter Symbol Unit Min. Typ. Max. test condition Output Voltage1-1 VOUT1-1 2.9 3.0 3.2 V 3.2V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[1:1] Output Voltage1-2 VOUT1-2 2.9 3.0 3.1 V 3.2V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[1:1] Output Voltage2-1 VOUT2-1 2.8 2.9 3.1 V 3.1V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[1:0] Output Voltage2-2 VOUT2-2 2.8 2.9 3.0 V 3.1V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[1:0] Output Voltage3-1 VOUT3-1 2.7 2.8 3.0 V 3.0V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[0:1] Output Voltage3-2 VOUT3-2 2.7 2.8 2.9 V 3.0V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[0:1] Output Voltage4-1 VOUT4-1 2.6 2.7 2.9 V 2.9V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[0:0] Output Voltage4-2 VOUT4-2 2.6 2.7 2.8 V 2.9V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[0:0] Operating Current ICC - - 200 µA Vcc2=3.6V, IOUT=0A Standby Current ISB - - 1.0 µA Vcc2=3.6V, IOUT=0A, LDOEN=GND “H” Input Voltage VIH 1.4 - Vcc2+0.3 V 2.9V≦Vcc2≦3.6V “L” Input Voltage VIL -0.3 - 0.6 V 2.9V≦Vcc2≦3.6V ○This product is not designed for protection against radioactive rays. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/16 2010.09 - Rev.A Technical Note BU9829GUL-W ●LDO regulator AC operating characteristics Parameter Specification Symbol Min. Typ. Max. Unit Test condition Vcc1 Rise Time tVCC1 - - 5 msec VCC1 x 0%→VCC1 x 95% point LDOEN Wait Time tLDOEN 15 - - msec VCC1 x 0%point→ LDOEN=High ●Output voltage depend on VSET bit The 2bit data are stored into the VSET memory and output voltage change among VOUT1～VOUT4. VSET data are Written into non-volatile memory array. Initial VSET data is 1,0 in VSET[1:0] and VOUT is 2.9V. STEP VOUT(typ.) [V] VSET1 VSET0 VOUT1 VOUT2 VOUT3 VOUT4 3.0 2.9 2.8 2.7 1 1 0 0 1 0 1 0 ●Input power supply regulation timing ①Using EEPROM PART In case of using EEPROM part, be sure to raise Vcc1 up to operating voltage. In this time, Vcc2 has no connection with operating. Vcc1 EEPROM EEPROM部電源 Power Supply Vcc2 LDOレギュレータ部電源 Not 動作不可 Operating LDO regulator Power Supply Not 動作不可 Operating Operating EEPROM動作可能範囲 Operating EEPROM動作可能範囲 Not Operating 動作不可 Fig.4 Using EEPROM Part, Regulation Timing ②Using LDO regulator part In case of using LDO regulator part, be sure to raise Vcc1 and Vcc2 up to operating voltage. After rising Vcc1, wait 15msec and rising LDOEN. When LDOEN is raised, Vcc1 must be operating voltage. tVcc1:MAX 5msec tVcc1:MAX 5msec Vcc1 EEPROM Power Supply Vcc2 tLDOEN : MIN 15msec LDO regulator Power Supply tLDOEN : MIN 15msec LDOEN Not Operating Operating Not Operating Operating Not Operating Fig.5 Using LDO Regulator Part, Regulation Timing www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/16 2010.09 - Rev.A Technical Note BU9829GUL-W ●Block diagram VOLTAGE DETECTION INSTRUCTION CSB DECODE CONTROL CLOCK GENERATION SCK HIGH VOLTAGE GENERATOR WRITE INHIBITION SI INSTRUCTION REGISTER ADDRESS REGISTER 11bit ADDRESS DECODER 11bit 16,384 bit EEPROM DATA REGISTER SO + VOUT R/W AMP 8bit 8bit 2bit LDOEN B.R AMP VOUT SETTING REGISTER RESISTOR Fig.6 Block diagram ●Characteristic data (The following characteristic data are typical values.) 5 Ta=-30℃ Ta=25℃ Ta=85℃ 4 3 3 VIL[V] SPEC 2 Ta=-30℃ Ta=25℃ Ta=85℃ 0.8 VOL[V] 4 VIH[V] 1 5 Ta=-30℃ Ta=25℃ Ta=85℃ 2 0.6 0.4 SPEC SPEC 1 1 0 0 0.2 SPEC 0 1 2 Vcc[V] 3 4 0 0 3 0 4 4 1 3 2 1 0 0.4 0.8 1.2 Fig.10 "H" output voltage VOH 1 2 Vcc[V] 3 4 0 1 10 Ta=-30℃ Ta=25℃ Ta=85℃ 1 2 Vcc[V] 3 4 Fig.13 Current consumption at WRITE operation ICC1 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4 6 4 0.5 SPEC 2 SPEC 0 0 1 3 Ta=-30℃ Ta=25℃ Ta=85℃ 8 1.5 ISB[μA] ICC3(READ)[mA] Ta=-40℃ Ta=-30℃ Ta=25℃ Ta=85℃ 2 VOUT[V] 12 fSCK=2MHz DATA=AAh 2 0 0 1 Fig.12 Output leak current ILO 2.5 fSCK=2MHz DATA=00h SPEC SPEC Fig.11 Input leak current ILI 4 2 2 0 0 IOH[mA] 3 Ta=-30℃ Ta=25℃ Ta=85℃ 3 1 0 0 3 SPEC Ta=-30℃ Ta=25℃ Ta=85℃ 0.5 2 4 Ta=-30℃ Ta=25℃ Ta=85℃ ILO[μA] ILI[μA] 1.5 IOL[mA] 5 SPEC 2 1 Fig.9 "L" output voltage VOL 5 2.5 ICC1[mA]] 2 Vcc[V] Fig.8 "L" input voltage VIL (EEPROM) Fig.7 "H" input voltage VIH (EEPROM) 3 VOH[V] 1 0 1 2 Vcc[V] 3 4 Fig.14 Consumption Current at READ operation ICC3 5/16 0 1 2 Vcc[V] 3 4 Fig.15 Standby operation ISB (EEPROM) 2010.09 - Rev.A Technical Note BU9829GUL-W ●Characteristic data 250 250 SPEC 10 tSCKWH [ns] 200 fSCK[MHz] SPEC SPEC 1 Ta=-30℃ Ta=25℃ Ta=85℃ Ta=-30℃ Ta=25℃ Ta=85℃ 150 SPEC 100 1 2 Vcc[V] 3 50 0 0 4 1 Fig.16 SCK frequency fSCK 3 4 0 100 SPEC 80 80 1 2 3 SPEC 40 0 0 Ta=-30℃ Ta=25℃ Ta=85℃ 120 40 0 0 0 4 1 2 Vcc[V] Vcc[V] 3 4 0 1 Fig.20 CSB setup time tCSS Fig.19 CSB high time tCS 60 4 SPEC 160 Ta=-30℃ Ta=25℃ Ta=85℃ 120 50 3 Fig.18 SCK low time tSCKWL SPEC 160 SPEC 2 Vcc[V] 200 tCSH[ns] SPEC Ta=-30℃ Ta=25℃ Ta=85℃ 150 1 Fig.17 SCK high time tSCKWH tCSS[ns] tCS[ns] 2 Vcc[V] 200 250 200 SPEC 100 0 0 Ta=-30℃ Ta=25℃ Ta=85℃ 150 50 0.1 SPEC 200 tSCKWL [ns] 100 2 Vcc[V] 3 4 Fig.21 CSB hold time tCSH 120 60 SPEC SPEC 100 SPEC SPEC 40 SPEC 20 80 Ta=-30℃ Ta=25℃ Ta=85℃ tDIH[ns] tDIS[ns] Ta=-30℃ Ta=25℃ Ta=85℃ tPD [ns] 40 SPEC Ta=-30℃ Ta=25℃ Ta=85℃ 60 40 20 20 0 0 0 0 1 2 Vcc[V] 3 4 0 1 1 2 Vcc[V] 3 4 Fig.24 Data output delay time tPD 8 SPEC 200 6 100 SPEC ISB[us] 150 6 SPEC Ta=-30℃ Ta=25℃ Ta=85℃ tE/W[ms] tOZ [ns] 0 4 8 250 4 Ta=-30℃ Ta=25℃ Ta=85℃ 2 50 0 1 2 Vcc[V] 3 1 2 Vcc[V] 3 4 0 3 2 VIL[V] SPEC 120 1.5 1 1 0.5 0.5 0 1 2 Vcc[V] 3 4 4 Ta=-30℃ Ta=25℃ Ta=85℃ 80 40 SPEC 0 0 3 SPEC=5000ns Ta=-30℃ Ta=25℃ Ta=85℃ tVcc1[us] 2 2 Vcc[V] 160 2.5 Ta=-30℃ Ta=25℃ Ta=85℃ 1 Fig.27 Standby operation ISB (LDO) Fig.26 Write cycle time tE/W 3 1.5 SPEC 0 0 4 Fig.25 Output disable time tOZ 2.5 Ta=-30℃ Ta=25℃ Ta=85℃ 4 2 0 0 VIH[V] 3 Fig.23 SI hold time tDIH Fig.22 SI setup time tDIS 0 0 1 Fig.28 "H" input voltage VIH (LDO) 2 Vcc[V] 3 4 0 1 2 Vcc[V] 3 4 Fig.30 Vcc1 rise time tVcc1 Fig.29 "L" input voltage VIL (LDO) 250 3.2 3.1 Ta=-30℃ Ta=25℃ Ta=85℃ SPEC SPEC 200 (VSET=1,0) 3 ICC[uA] VOUT[V] 2 Vcc[V] SPEC 2.9 2.8 Ta=-30℃ Ta=25℃ Ta=85℃ 150 100 50 SPEC 0 2.7 0 2 4 6 8 10 Iout[mA] 12 14 16 Fig.31 Vout response (LDO) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 0 1 2 Vcc[V] 3 4 Fig.32 Current consumption ICC (LDO) 6/16 2010.09 - Rev.A Technical Note BU9829GUL-W ●Functional description ○Status Register The device has status register. Status register consists of 8bits and is shown following parameters. 2 bits (BP0 and BP1) are set by “Write Status Register” commands, which are non-volatile. Specification of endurance and data retention are as well as memory array. WEN bit is set by “Write Enable” and “Write Disable” commands. After power become on, the device is disable mode. R / B bit is a read-only and status bit. The device is clocked out value of the status register by “Read Status Register” command input. Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0 0 0 0 BP1 BP0 WEN R/B Bit Definition Block write protection for memory array (EEPROM) BP0/BP1 Write enable/disable status bit WEN=0 : write disable WEN=1 : write enable WEN BP1 BP0 Block Write Protection 0 0 NONE 0 1 600h-7FFh 1 0 400h-7FFh 1 1 000h-7FFh READY/BUSY status bit R / B =0 : READY R / B =1 : BUSY R/B ●Instruction code Instruction Operation Op.Code Address WREN Write enable 0000 0110 - WRDI Write disable 0000 0100 - READ Read data from memory array 0000 0011 A10 ～ A0 WRITE Write data to memory array 0000 0010 A10 ～ A0 RDSR Read status register 0000 0101 - WRSR Write status registeｒ 0000 0001 - VSET_READ Read VSET data 0000 0011 800h VSET_WRITE Write VSET data 0000 0010 800h ●Timing chart 1. WRITE ENABLE 2. WRITE DISABLE CSB CSB SCK 0 SI SO 0 1 0 2 0 3 0 4 0 5 1 6 1 SCK 7 SI 0 Hi-Z SO Fig.33 WRITE ENABLE CYCLE TIMING 0 0 1 0 2 0 3 0 5 4 0 1 6 0 7 0 Hi-Z Fig.34 WRITE DISABLE CYCLE TIMING ○The device has both of the enable and disable mode. After “Write Enable” is executed, the device becomes in the enable mode. After “Write Disable” is executed, the device becomes in the disable mode. After CSB goes low, each of Op.code is recognized at the rising edge of 7th clock. Each of instructions is effective inputting seven or more SCK clocks. This “Write Enable” instruction must be proceeded before the any write commands. The device ignores inputting the any write commands in the disable mode. Once the any write commands is executed in the enable mode, the device becomes the disable mode. After the power become on, the device is in the disable mode. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/16 2010.09 - Rev.A Technical Note BU9829GUL-W 3. READ The data stored in the memory are clocked out after “Read” instruction is received. After CSB goes low, the address need to be sent following by Op.code of “Read”. The data at the address specified are clocked out from D7 to D0, which is start at the falling edge of 23th clock. This device has the auto-increment feature that provides the whole data of the memory array with one read command, outputs the next address data following the addressed 8bits of data by keeping SCK clocking. When the highest address is reached, the address counter rolls over to the lowest address allowing the continuous read cycle. 1 2 3 4 5 6 7 8 14 23 0 0 1 0 * 1 * 30 0 A10 A1 A0 ～ ～ 0 ～ ～ 0 ～ 0 24 ～ ～ ～ ～ SI ～ ～ 0 ～ ～ ～ ～ SCK ～ ～ ～ ～ CSB ～ ～ D7 D6 D2 ～ ～ Hi-Z ～ ～ ～ ～ SO D1 D0 Fig.35 READ CYCLE TIMING *=Don't care 4. WRITE This “Write” command writes 8bits of data into the specified address. After CSB goes low, the address need to be sent following by Op.code of “Write”. Between the rising edge of the 29th clock and it of the 30th clock, the rising edge of CSB initiates high voltage cycle, which writes the data into non-volatile memory array, but the command is cancelled if CSB is high except that period. It takes maximum 5ms in high voltage cycle (tE/W). The device does not receive any command except for “Read Status Register” command during this high voltage cycle. This device is capable of writing the data of maximum 32byte into memory array at the same time, which keep inputting two or more byte data with CSB “L” after 8bits of data input. For this Page Write commands, the eight higher order bits of address are set, the six low order address bits are internally incremented by 5bits of data input. If more than 16 words, are transmitted the address counter “roll over”, and the previous transmitted data is overwritten. ～ ～ ～ ～ ～ ～ ～ ～ CSB 0 0 4 0 5 0 6 1 7 8 * 0 0 14 A10 A1 A0 30 24 D7 D6 D2 D1 31 D0 ～ ～ ～ Hi-Z 23 ～ ～ 0 3 ～ ～ ～ ～ 0 2 ～ ～ SO 1 ～ ～ ～ SI 0 ～ ～ SCK *=Don't care Fig. 36 WRITE CYCLE TIMING 5. RDSR (READ STATUS REGISTER) The data stored in the status register is clocked out after “Read Status Register” instruction is received. After CSB goes low, Op.colde of “Read Status Register” need to sent. The data stored in the status register is clocked out of the device on the falling edge of 7th clock. Bit7, Bit6, Bit5 and Bit4 in the status register are read as 0. This device has the auto-increment feature as well as “Read” that output the 8bits of the same data following it to keep SCK clocking. It is possible to see ready and busy state by executing this command during tE/W. If more than 16 words, are transmitted the address counter “roll over” and the previous transmitted data is overwritten. CSB SCK SI 1 0 0 0 2 0 3 0 SO Hi-Z 0 1 7 6 5 4 0 8 9 Bit7 Bit6 10 11 12 13 14 15 1 0 0 Bit5 Bit4 0 0 Bit3 Bit2 Bit1 Bit0 BP1 BP0 WEN R/B Fig.37 READ STATUS REGISTER CYCLE TIMING www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/16 2010.09 - Rev.A Technical Note BU9829GUL-W 6. WRSR (WRITE STATUS RESISTER) This “Write Status Register” command writes the data, two (BP1, BP0) of the eight bits, into the status register. Write protection is set by BP1 and BP0 bits. After CSB goes low, Op.code of “Read Status Register” need to sent. Between the rising edge of the 15th clock and it or the 16th clock, the rising edge of CSB initiates high voltage cycle, which writes the data into non-volatile memory array, but the command is cancelled if CSB is high except that period. It takes maximum 5ms in high voltage cycle (tE/W) as well as “Write”.Block write protection is determined by BP1 and BP0 bits, which is selected from quarter, half and the entire memory array. (See Table2 BLOCK WRITE PROTECTION>) CSB SCK 1 0 2 3 7 6 5 4 9 8 Bit7 Bit6 SI SO 0 0 0 0 0 1 1 0 * 11 10 Bit5 * 12 Bit4 Bit3 * * Bit2 Bit1 Bit0 BP0 BP1 15 14 13 * * Hi-Z * Don’t care Fig. 38 WRITE STATUS REGISTER WRITE CYCLE TIMING 7. VSET READ The VSET data stored in the memory are clocked out after “VSET Read” instruction set address 800h is received. After CSB goes low, the address (800h) need to be sent following by Op.code of “Read”. 0 are clocked out from D7 to D2 and the VSET data are clocked out from D1 to D0, which is start at the falling edge of 23th clock. CSB SCK SI SO 0 0 0 3 2 1 0 0 0 1 0 7 6 5 4 8 * 1 * 1 24 23 13 12 0 0 30 0 Hi-Z 0 0 0 0 VSET 1 VSET 0 * Don’t care Fig.39 VSET READ CYCLE TIMIING 8. VSET WRITE This “Write” command set address 800h writes VSET data into VSET1 and VSET0 memory array. After CSB goes low, the address (800h) and VSET data need to be sent following by Op.code of “VSET Write”. Between the rising edge of the 29th clock and it of the 30th clock, the rising edge of CSB initates high voltage cycle, which writes the data into non-volatile memory array, but the command is cancelled if CSB is high except that period. It takes maximum 5ms in high voltage cycle (tE/W). The device does not receive any command except for “Read Status Register” command during this high voltage cycle. CSB SI SO 1 0 SCK 0 0 3 2 0 0 0 0 7 6 5 4 1 0 8 * * 1 0 24 23 13 12 0 0 0 * 30 * * * VSET 1 31 VSET 0 Hi-Z * Don’t care Fig. 40 VSET WRITE CYCLE TIMING www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/16 2010.09 - Rev.A Technical Note BU9829GUL-W ●EEPROM soft ware ○READ, VSET_READ, RDSR Command cancel Cancel of these commands is possible by changing CSB pin to “HIGH” in all sections. OPECODE ADDRESS DATA 8bit 8bit Cancel is possible 8bit OPECODE DATA 8bit 8bit Cancel is possible Fig.42 RDSR Cancel Timing Fig.41 READ, VSET_READ Cancel Timing ○WRITE, PAGE_WRITE, VSET_WRITE、WRSR Command cancel Cancel of these write command is possible by changing CSB pin to “HIGH” in opecode, address and data input sections (section a~b), but it is impossible after data input section (section c~d), if Vcc1 is OFF during tE/W, please write again because write data is not guaranteed in specified address, if SCK and CSB rise at the same time in section C, command is instability. It is recommend to rise CSB in “SCK=L” section. OPECODE ADDRESS DATA(n) 8bit 8bit 8bit b a tE/W SCK D7 SI d D6 D5 D4 AN ENLARGEMENT c D3 D2 D1 D0 c b Fig.43 WRITE, PAGE_WRITE, VSET_WRITE READ VSET_READ Cancel Timing OPECODE DATA(n) 8bit a tE/W 8bit b 8bit d AN ENLARGEMENT D1 SI c 16 15 14 SCK 17 D0 b c d Fig.44 WRSR Cancel Timing ○WREN, WRDI command cancel Cancel of these commands is possible by changing CSB pin to “HIGH” of opecode to rising 8 clk, but it is impossible after rising 8 clk. In the case, please send WREN or WRDI cancel timing command again. 7 OPECODE AN ENLARGEMENT 8bit a b a 9 8 b Fig.45 WREN, WRDI Cancel Timing ●Data polling If RDSR command is carried out daring tE/W, according to out put data ( R / B bit), to monitor READY/BUSY state is possible. Because of this, it is possible to send next command earlier than regular programming time (tE/W MAX=5ms). If R / B bit is “1”, EEPROM’s state is “BUSY”. If this becomes “0”, it is possible to send next command to change EEPROM to “READY” state. Status register data read by this command in tE/W is not data written by WRSR command but old data before. Status register data in each section is shown below. During WRSR Command（tE/W） BUSY READY CSB SCK SI SO READ STATUS WRITE STATUS READ STATUS READ STATUS READ STATUS REGISTOR REGISTOR REGISTOR REGISTOR REGISTOR a=0Ch b=(00h) c=0Fh d=0Ch e=00h Fig.46 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Status register data in each section 10/16 2010.09 - Rev.A Technical Note BU9829GUL-W ●EEPROM part 1. Hardware Connection of EEPROM EEPROM may have malfunction owing to noise signal for input pin, and movement in the low voltage region at power ON/OFF. These malfunctions may occur, especially at min voltage limit of EEPROM or below. To avoid this, please note about hardware connection showed as follows. 1.1 Input Terminals Input equivalent circuits of CSB, SCK and SI are showed Fig.47, 48. Input terminal is connected between CMOS schmitt trigger input circuit and input protection circuit. These pin are not pull up or pull down, therefore please don’t input Hi-Z in use. And please make CSB “HIGH” in the low voltage region at power ON/OFF. If CSB is "LOW" at power ON/OFF, malfunction may occur. To make other input terminals pull up or pull down is recommendable. SCK, SI CSB ＳＯ Fig.48 SCK,SI terminals equivalent circuit Fig.47 CSB terminals equivalent circuit Fig.49 SO terminals equivalent circuit 1.2 Output Terminals Output equivalent circuit of so is showed Fig.49. This output terminal is 3 states buffer. The data is output from so at output timing by READ command, so is Hi-z except this timing. If EEPROM occur by Hi-z input of the microcontroller port connected with so, please make so pull up or pull down. affected the microcontroller movement to make so open, it is no problem. Load capacity of so disturb movement of EEPROM. If this load capacity is 100pF or below, BU9829GUL-W can move (Vcc1=1.6V~1.8V) or 5MHz (Vcc1=1.8V~3.6V) malfunction If it doesn’t high speed in 2.5MHz 1.3 Input pin pull up, pull down resistance The design method of pull up/pull down resistance for input and output are as follows. 1.3.1 Pull up resistance Rpu of input terminals Rpu Microcontroller I VOLM OLM Rpu “L” output EEPROM “L” input ・VILE : EEPROM VIL specifications ・VOLM : Microcontroller VOL specifications ・IOLM : Microcontroller IOL specifications www.rohm.com VOLM ≦ VCC－VOLM IOLM VILE …① …② VILE Fig.50 Input terminal pull up resistance © 2010 ROHM Co., Ltd. All rights reserved. ≧ Example) When Vcc=5V, VILE=1.5V, VOLM=0.4V, IOLM=2mA, from the equation①, Rpu ≧ ∴Rpu ≧ 5－0.4 -3 2×10 2.3[kΩ] With the value of Rpu to satisfy the above equation, VOLM becomes 0.4V or below, and with VILE(=1.5V), the equation ② is also satisfied. 11/16 2010.09 - Rev.A Technical Note BU9829GUL-W 1.3.2 Pull down resistance Rpd of input terminals Rpd EEPROM Microcontroller VOHM VIHE IOHM “H” output ≧ “H” input Rpd Fig.51 Input terminals Pull down resistance ・VIHE : EEPROM VIH specifications ・VOHM : Microcontroller VOH specifications ・IOHM : Microcontroller IOH specifications VOHM ≦ VOHM IOHM …① VIHE …② Example) When Vcc=5V, VIHE=3.5V, VOHM=2.4V, IOHM=2mA, from the equation①, Rpd ≧ ∴Rpd ≧ 2.4 2×10-3 1.2 [kΩ] With the value of Rpd to satisfy the above equation, VOHM becomes 2.4V or higher, and with VIHE(=3.5V), the equation②is also satisfied. 1.3.3 Pull up resistance Rpu of SO pin Microcontroller VILM Rpu EEPROM IOLE VOLE Rpu ≧ VOLE ≦ VCC-VOLE IOLE VILM …① …② Example) When Vcc=5V, VOLE=0.4V, VILM=1.5V, IOLE=2.1mA, from the equation①, “L” input “L” output Fig.52 SO Pull up resistance ・VOLE : EEPROM VOL specifications ・IOLE : Microcontroller IOL specifications ・VILM : Microcontroller VIL specifications Rpu ≧ ∴Rpu ≧ 5-0.4 -3 2.1×10 2.2 [kΩ] With the value of Rpd to satisfy the above equation, VOLE becomes 0.4V or higher, and with VILM(=1.5V), the equation②is also satisfied. 1.3.4 Pull up resistance Rpu of SO pin EEPROM Microcontroller VOHE VIHM “H” input Rpd Rpd ≧ VOHE ≧ VOHE IOHE VIHM …① …② Example) When Vcc=5V, VOHE=Vcc-0.5V, VIHM=Vccx0.7V, IOHE=0.4mA, from the equation①, IOHE “H” output Fig.53 SO Pull down resistance ・VOHE : EEPROM VOH specifications ・IOHE : EEPROM IOH specifications ・VIHM : Microcontroller VIH specifications www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Rpd ≧ ∴Rpd ≧ 5-0.5 -3 0.4×10 11.3 [kΩ] With the value of Rpu to satisfy the above equation, VOHE becomes 4.5V or higher, and with VIHM(=3.5V), the equation ② is also satisfied. 12/16 2010.09 - Rev.A Technical Note BU9829GUL-W ●LDO regulator part LDO regulator part of BU9829GUL-W is CMOSLDO of low power consumption. The data are stored into EEPROM and output voltage change among 2.7~3.0V. 1step is 0.1V. LDO regulator part had LDOEN pin and VOUT pin. To make this LDOEN pin LOW is standby mode of low power consumption. ○LDOEN Input Terminals Input equivalent circuit of LDOEN is showed Fig.54. Input terminal is connected between input circuits made from NMOS and pull up and input protection circuit. This pin is not pull up or pull down, therefore please don’t input Hi-z. If LDOEN is LOW, all circuit don’t move and LDO part is standby mode of low power consumption. LDOEN + VREF Fig.54 VOUT output terminals VOUT Fig.55 VOUT output terminals ○VOUT Output Terminals Output equivalent circuit of VOUT is showed Fig.55. If LDOEN is HIGH, LDO regulator output regulate voltage from VOUT pin. If LDOEN is LOW, VOUT pin is GND by VOUT-GND resistance. Output overshoots change by output capacity, in actual use, please evaluate and decide output capacity. VOUT VOUT 88mV 172mV 20us VCC=3.0V 13.6us VCC=3.0V VCC Oscilloscope Power source VCC VOUT Tektronix TDS3034B SHOWA 317B LDO_EN 0.1uF Oscilloscope Power source current probe 700Ω Input pulse VOUT LDO_EN 0.1uF current probe 700Ω Rohm K2095N Input pulse measurement circuit rising 1us IOUT=0→4mA Rohm K2095N measurement circuit rising 1us IOUT=0→4mA BU9829GUL-W Evaluation result (IOUT=0mA→4mA,COUT=1.0uF) Fig.56 CL=0µF Transitional response BU9829GUL-W Evaluation result (IOUT=0mA→4mA,COUT=0.1uF) Fig.57 CL=0.1µF Transitional response VOUT VOUT 40mV 40mV 12us Oscilloscope Power source Tektronix TDS3034B SHOWA 317B Tektronix TDS3034B SHOWA 317B 120us VCC=3.0V VCC Oscilloscope Power source VOUT LDO_EN 0.1uF current probe Tektronix TDS3034B SHOWA 317B VCC=3.0V VCC VOUT LDO_EN 0.1uF Input pulse rising1us IOUT=0→4mA Rohm K2095N Input pulse rising 1us IOUT=0→4mA measurement circuit BU9829GUL-W Evaluation result (IOUT=0mA→4mA,COUT=1.0uF) Fig.58 CL=1.0µF Transitional response www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. current probe 700Ω 700Ω Rohm K2095N measurement circuit BU9829GUL-W Evaluation result (IOUT=0mA→4mA,COUT=1.0uF) Fig.59 CL=10µF Transitional response 13/16 2010.09 - Rev.A Technical Note BU9829GUL-W ○Package power dissipation Package power dissipation of BU9829GUL-W is 220mW. It is the value at environmental temperature is 25℃. In the case of use at 25℃ or higher, degradation is done at 2.2W/℃. If output current is very large, please take care of package power dissipation. Pd [mW] 許容損失(Pd) [mW] 300 200 100 0 -50 -25 0 25 50 75 Ta [℃] 周囲温度(Ta) [℃] 100 125 150 Fig.60 Package power dissipation ○Large Current Protection Circuit VOUT terminal has large current protection circuit. This circuit protects IC from large current. However, this protection circuit effective unexpected accident. Please avoid continual use of protection circuit. 3 VOUT output voltage[V] 2.5 2 1.5 1 0.5 0 0 5 10 15 20 VOU T load current [m A] Fig.61 Large Current Protection Circuit ●POR circuit This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR action, it gets in write disable. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if the recommended conditions of the following tR, tOFF, and Vbot are not satisfied, it may become write enable status owing to noise the likes. Recommended conditions of tR, tOFF, Vbot tR tOFF Vbot tR Vｃｃ1 tOFF 10ms or below 10ms or higher 0.3V or below 100ms or below 10ms or higher 0.2V or below Vbot 0 Fig.62 Rise waveform www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/16 2010.09 - Rev.A Technical Note BU9829GUL-W ●LVCC circuit LVCC (Vcc-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write. At LVCC voltage (Typ. =1.9V) or below, it prevent data rewrite. ●Noise countermeasures ○Vcc noise (bypass capacitor) When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is recommended to attach a bypass capacitor (0.1µF) between IC Vcc and GND. At that moment, attach it as close to IC as possible. And, it is also recommended to attach a bypass capacitor between board Vcc and GND. IC Capacitor 0.01～0.1µF PRINT BASE GND Fig.63 Vcc Capacitor 10～100µF Vcc noise countermeasures example ●Recommendable application circuit Vcc2(3.3V) 1. It is recommended to attach bypass condensers on power line. 2. Be sure to make CSB pull up. At power on, mat cause the abnormal function. 3. Please make LDOEN pull down. 4. If EEPROM malfunction occur by Hi-Z input of the microcontroller part connected with SO, please make SO pull up or pull down. 5. Please attach capacity at VOUT terminal. Outputs overshoot change by output capacity. In actual use, please evaluate and decide output capacity. Vcc1(1.8V) RPU BU9829GUL-W CSB SCK SI LDOEN RPU Vcc1 SO Vcc2 VOUT GND (0.1µF) (0.1µF) CL C C RPD RPD Fig.64 Recommendable Application circuit ●Notes for use ・Absolute maximum ratings We pay attention to quality control of this IC, but if there is special mode exceeded absolute maximum rating, please take a physical safety measures. Because we can’t specify short mode and open made, etc. ・Heat design In consideration of permissible dissipation in actual use condition, carry out heat design with sufficient margin. ・Absolute maximum ratings If the absolute maximum ratings such as impressed voltage and operating temperature range and so forth are exceeded, LSI may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum ratings should not be impressed to LSI. ・Common impedance Please pay attention to VCC and GND wiring. For example, lower common impedance and to make wiring think, etc. ・GND electric potential Set the voltage of GND terminal lowest at any action condition. And, please make pin except GND voltage of GND or over. ・Test of set base If low impedance pin connect with capacity at test of set base, please discharge each test progress to stress IC. Please embroider earth for static electricity neasures at structure progress, pay attention to carry and conservation. When set base connect with test base at test progress, please connect and remove from power OFF. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/16 2010.09 - Rev.A Technical Note BU9829GUL-W ●Ordering part number B U Part No. 9 8 2 9 Part No. G U L Package GUL : VCSP50L1 - W W-CELL E 2 Packaging and forming specification E2: Embossed tape and reel VCSP50L1(BU9829GUL-W) <Tape and Reel information> 1.74±0.05 0.55MAX 0.1±0.05 1.65±0.05 1PIN MARK (φ0.15)INDEX POST B B A 1 0.37±0.05 2 E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 0.325±0.05 A C 3000pcs P=0.5×2 0.08 S Embossed carrier tape Quantity Direction of feed S 9-φ0.25±0.05 0.05 A B Tape 3 1pin P=0.5×2 (Unit : mm) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Reel 16/16 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2010.09 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A