LINEAR TECHNOLOGY JANUARY 2009 IN THIS ISSUE… COVER ARTICLE 2-Phase, Non-Synchronous Boost Controller Simplifies Design of High Voltage, High Current Supplies ...........................................................1 Muthu Subramanian and Tick Houk Linear in the News… ...........................2 DESIGN FEATURES Reliable Precision Voltage Reference with 5ppm/°C Drift is Factory Trimmed and Tested at –40°C, 25°C and 125°C ...........................................................7 Michael B. Anderson and Brendan Whelan Ultralow Noise 15mm ×15mm × 2.8mm µModule™ Step-Down Regulators Meet the Class B of CISPR 22 and Yield High Efficiency at up to 36VIN ..........10 Judy Sun, Jian Yin, Sam Young and Henry Zhang Dual Hot Swap™ Controller Brings Digital Monitoring to AdvancedTCA, µTCA and AMC Applications ..............15 Josh Simonson ±32V Triple-Output Supply for LCDs, CCDs and LEDs Includes Fault Protection in a 3mm × 3mm QFN ......20 Eko T Lisuwandi PD Interface for PoE+ Includes 25.5W Classification and Protection Features in a Low Profile 4mm × 3mm DFN .........................................................26 Kirk Su DESIGN IDEAS ....................................................30–42 (complete list on page 30) Design Tools ......................................43 Sales Offices .....................................44 VOLUME XVIII NUMBER 4 2-Phase, Non-Synchronous Boost Controller Simplifies Design of High Voltage, High Current Supplies by Muthu Subramanian and Tick Houk Introduction Due to an increasing need for high power step-up power supplies in automotive and industrial applications, Linear Technology has recently introduced the LTC3862 family of 2-phase, single output non-synchronous boost DC/DC controllers. The LTC3862 provides a lexible, high performance step-up controller in three convenient package options: GN24, 5mm × 5mm 24-pin exposed pad QFN and 24-pin exposed pad TSSOP. The LTC3862 is optimized for power MOSFETs that require 5V gate drive, whereas the LTC3862-1 is designed for 10V gate drive MOSFETs. The LTC3862 utilizes a ixed frequency, peak current mode control topology to drive ground-referenced power MOSFETs, each with a current sense resistor in its source. The use of a precision transconductance (gm) error ampliier allows for easy loop compensation and facilitates the parallel connection of several ICs in multiphase applications. The operating frequency can be programmed from 75kHz to 500kHz using a single resistor, and a phase lock loop allows the switching frequency to be synchronized to an external clock over a 50kHz to 650kHz range. The LTC3862 is a versatile control IC optimized for a wide variety of step-up DC/DC converter applications. This makes it easy to optimize efficiency, size and weight of the power supply, while keeping component and manufacturing costs low. A 24V, 5A Car Audio Power Supply Today’s high end car audio systems require signiicant power to drive upwards of seven speakers inside the passenger compartment. High frequency speakers such as tweeters are generally very eficient, but low frequency drivers such as subwoofers require substantial power to achieve high volume. In addition to the need for high power, the car audio system should be itmmune to changes in the battery voltage. These requirements can be met through the use of a step-up converter for the power continued on page L, LT, LTC, LTM, Burst Mode, OPTI-LOOP, Over-The-Top and PolyPhase are registered trademarks of Linear Technology Corporation. Adaptive Power, Bat-Track, BodeCAD, C-Load, DirectSense, Easy Drive, FilterCAD, Hot Swap, LinearView, µModule, Micropower SwitcherCAD, Multimode Dimming, No Latency ΔΣ, No Latency Delta-Sigma, No RSENSE, Operational Filter, PanelProtect, PowerPath, PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT, TimerBlox, True Color PWM, UltraFast and VLDO are trademarks of Linear Technology Corporation. Other product names may be trademarks of the companies that manufacture the products. L LINEAR IN THE NEWS Linear in the News… Linear Unveils Battery Stack Monitor for Hybrid/Electric Vehicles In September, Linear announced an innovative new product focused on the challenge of monitoring a stack of batteries for applications such as hybrid/electric vehicles and battery backup systems. The company announced the product in a series of press meetings in North America, Europe and Asia, including press conferences in Munich and Beijing, as well as meetings in Silicon Valley, London, Paris, Stockholm, Seoul and Tokyo. Linear has already seen signiicant customer interest in the device for a broad range of applications. The LTC6802’s maximum measurement error is less than 0.25%, which allows cells to operate over their full charge and discharge limits, thus maximizing lifetime and useful battery capacity. The LTC6802 monitors each cell for undervoltage and overvoltage conditions, communicating to a host controller via a 1MHz serial interface. To address overcharge conditions, each of the LTC6802’s inputs supports a MOSFET switch for quick individual cell discharge. The LTC6802 incorporates a number of other features in its 8mm × 12mm surface mount package, including temperature sensor inputs, GPIO lines and a pin-accessible precision voltage reference. The LTC6802 is fully speciied for operation from –40°C to 85°C and offers diagnostics and fault detection. The combined robustness, exceptional precision and tiny package directly address the critical requirements of high powered, high performance battery systems. EDN Debuts Jim Williams Article Archive The anticipated migration to zero emission vehicles awaits the development of viable high performance battery systems. Lithium batteries offer the promise of high energy density, but improving reliability, prolonging lifetime and meeting cost targets require sophisticated battery management electronics. Battery management electronics must accurately monitor and balance each individual battery cell in long, high voltage battery strings—the type required for high power applications. This is a signiicant electronics challenge, combining automotive demands with the task of extracting small differential voltages from 0V to more than 1000V of common mode voltage. To address this need, Linear Technology developed the LTC6802. A single LTC6802 multicell battery monitoring IC is capable of precisely measuring the voltages of up to 12 series-connected battery cells. For longer battery strings, multiple LTC6802s can be placed in series to monitor large numbers of battery stacks. The LTC6802’s novel stacking technique allows multiple LTC6802s to be placed in series without optocouplers or isolators. Stacked LTC6802s can precisely measure all battery cell voltages, independent of battery string size, within 13ms. 2 EDN magazine has launched an archive of articles on their website, entitled, “How-to articles and Design Ideas from EDN’s most revered contributor, Jim Williams.” Thus far, EDN has posted Jim Williams’ in-depth applications articles from the present, going back to 1994—42 articles so far. The magazine has plans to continue building the archive, eventually posting articles as far back as 1980. This work is a tribute to the signiicant contributions made to the electronics design community by Jim Williams and the yeoman efforts of EDN’s analog editor, Paul Rako to make these technical articles available to a wide range of readers worldwide. You can access the articles and watch the archive as it grows at www.edn.com/jimwilliams. Linear Technology at IIC China Conference Linear will have a booth at three IIC Conference locations in the coming months: February 26–27 in Shenzhen, March 2–3 in Xian, and March 5–6 in Beijing. At the conference, Linear will focus on products for the industrial and automotive markets. China continues to be a signiicant growth market for Linear in a number of key product areas, including: q Data converters for industrial applications q Power products and signal conditioning products for industrial applications q Power µModule™ DC/DC regulators q Products for automotive applications, including: — Multicell battery stack monitors — Current sense ampliiers — LED drivers L Linear Technology Magazine • January 2009 DESIGN FEATURES L LTC862, continued from page VIN 5V TO 24V L1 4.2µH CDEP145-4R2 D1 MBRD835L 1nF GATE1 SENSE1 SLOPE BLANK 10nF 24.9k 84.5k 22µF 25V 22µF 25V 1µF SS LTC3862 26.7k ITH FB 100pF + RUN FREQ 1nF 0.007Ω 100µF 1W 35V 10nF PHASEMODE SENSE1– 45.3k Q1 Si7386DP 10Ω + + 3V8 DMAX 22µF 25V VIN 100µF 10µF 50V 35V 4.7µF INTVCC 6.98k 10Ω PGND SGND 130k VOUT Q2 Si7386DP GATE2 SENSE2– CLKOUT SYNC PLLFLTR 0.007Ω 1W VOUT 24V 5A (MAX) 10µF 50V 10µF 50V 10µF 50V 10nF L2 4.2µH CDEP145-4R2 SENSE2+ D2 MBRD835L Figure 1. A 120W 2-phase, 24V/5A output car audio power supply ampliiers. Figure 1 shows a 2-phase, 24V/5A output audio power supply that operates from a car battery, and Figure 2 shows the eficiency curve for this converter. A 2-phase design with an operating frequency of 300kHz allows the use of signiicantly smaller output capacitors and inductors than a single-phase design. To keep the output ripple voltage below 60mV peak-to-peak and satisfy the RMS ripple current demand, a combination of two 100µF, 35V aluminum electrolytic capacitors are connected in parallel with four 10µF, 50V ceramic capacitors. The 4.2µH, 10.6A inductor (CDEP145-4R2) from Sumida Inductors is chosen for its high 100 A 2-phase design with an operating frequency of 300kHz allows the use of significantly smaller output capacitors and inductors than a single-phase design. Also, the output current of this converter can easily be scaled by adding additional power stages and controllers, without modifying the basic design. 10000 VIN = 12V VOUT = 24V 95 EFFICIENCY (%) POWER LOSS 1000 85 80 75 100 POWER LOSS (mW) EFFICIENCY 90 ILOAD 5A/DIV IL1 5A/DIV IL2 5A/DIV VOUT 500mV/DIV 1000 LOAD CURRENT (mA) 100 10000 Figure 2. Efficiency and power loss vs load current for the 120W car audio power supply Linear Technology Magazine • January 2009 VIN = 12V VOUT = 24V ILOAD = 2A TO 5A 500µs/DIV Figure 3. Inductor current waveforms in load step show accurate current matching between load sharing channels saturation current rating and surface mount package design. The MOSFET is a Vishay Si7386DP, which has a maximum RDS(ON) of 7mΩ at VGS = 10V and 9.5mΩ at VGS = 4.5V. The 35V, 8A Schottky from On Semiconductor (MBRD835L) offers surface mount capability and small size. It should be noted that the output current of a converter such as this can easily be scaled by adding additional power stages and controllers, without modifying the basic design. Excellent Channel-to-Channel Current Matching Ensures a Balanced Thermal Design In order to provide the best channelto-channel inductor current matching, the LTC3862 is designed to make the transfer function from the output of the error ampliier (the ITH pin) to the current comparator inputs (SENSE+ and SENSE– pins) as accurate as possible. The speciication for the maximum current sense threshold is 75mV, and the channel-to-channel (VSENSE1 – VSENSE2) mismatch speciication is ±10mV, over the –40°C to 150°C temperature range. This excellent matching ensures balanced inductor currents and a thermally stable design, even with multiple regulators daisychained together. Figure 3 shows how 3 L DESIGN FEATURES SW1 50V/DIV SW1 10V/DIV SW1 50V/DIV IL1 5A/DIV SW2 50V/DIV IL2 5A/DIV VOUT 100mV/DIV AC COUPLED SW2 50V/DIV SW2 10V/DIV IL1 2A/DIV IL2 2A/DIV IL1 1A/DIV IL2 1A/DIV VIN = 12V VOUT = 48V ILOAD = 100mA VIN = 24V 2.5µs/DIV VOUT = 48V, 1.5A Figure 4. Inductor current and switch node voltage waveforms at heavy load, continuous conduction mode (CCM) well matched the inductor currents are for the car audio power supply during a load step. Constant Frequency Operation over a Wide Load Current Range 1µs/DIV VIN = 17V 1µs/DIV VOUT = 24V LIGHT LOAD (10mA) Figure 5. Inductor and switch node voltage waveforms at light load, discontinuous conduction mode (DCM) Figure 6. Inductor and switch node voltage waveforms at light load (pulse-skipping) the better, since constant frequency operation is maintained down to this threshold. In Figure 6 the onset of pulse-skipping occurs at a relatively low 0.2% of the maximum load current. For systems where synchronization to an external clock is required, the LTC3862 contains a phase lock loop (PLL). Figure 7 illustrates the switching waveforms with an external sync signal applied to the SYNC pin. SYNC 10V/DIV GATE1 10V/DIV GATE2 10V/DIV Constant frequency operation eases the task of input and output ilter design, and prevents a power supply from becoming audible at light load. At heavy load, the inductor currents are generally continuous (CCM), as shown in Figure 4. At light load, the inductor current will go discontinuous (DCM), as shown in Figure 5. When the load current drops below what can be supported by the minimum on-time of the converter (approximately 180ns), the controller will begin to skip cycles in order to maintain output regulation, CLKOUT 10V/DIV VIN = 12V 2µs/DIV VOUT = 48V 1A PHASEMODE = SGND Figure 7. Synchronizing the LTC3862 to an external clock using the phase lock loop Strong Gate Drivers and a High Current Internal LDO as shown in Figure 6. This is a normal Complete the Package operating condition that doesn’t cause any problems in the system, as long as the peak inductor current is low. In general, the lower the load current at the onset of pulse-skipping, VIN 8.5V TO 28V L1 58µH PA2050-583 D1 B3100 1nF SENSE1+ BLANK RUN FREQ 150k 6.8µF 50V 6.8µF 50V 1µF SS LTC3862-1 45.3k INTVCC 5.62k 10Ω SGND 324k CLKOUT 0.020Ω 1W 2.2µF 100V s6 Q2 HAT2267H 10nF SENSE2+ L2 58µH PA2050-583 D2 B3100 Figure 8. An 8.5V–28V input, 72V/1.5A output low emissions diesel fuel injector actuator supply 4 VOUT 20V/DIV PGND GATE2 SENSE2– SYNC PLLFLTR VOUT 72V 47µF 100V 4.7µF 100pF FB 6.8µF 50V VIN ITH VOUT 47µF 100V 24.9k 0.1µF 1.5nF 0.020Ω 1W 10nF PHASEMODE SENSE1– 45.3k 10Ω + SLOPE Q1 HAT2267H GATE1 + 3V8 DMAX In high output voltage systems, switching losses in the power MOSFETs can sometimes exceed the conduction losses. In order to reduce switching losses as much as possible, the LTC3862 incorporates strong gate drivers. The PMOS pull-up transistor has a typical RDS(ON) of 2.1Ω, and the NMOS pull-down transistor has a typical RDS(ON) of 0.7Ω. In addition to reducing switching losses, these strong gate drivers allow two power MOSFETs to be connected in paral- IL 5A/DIV VIN = 24V VOUT = 72V 500µs/DIV Figure 9. Load step waveforms for diesel fuel injector actuator supply Linear Technology Magazine • January 2009 DESIGN FEATURES L lel for each channel in high current applications. In order to simplify operation in single-supply systems, the LTC3862 includes a 5V low dropout regulator (LDO) that can support output currents up to 50mA. The use of a PMOS output transistor ensures that the full supply voltage is available for driving the power MOSFETs under low supply conditions, such as during automotive cold cranking. An undervoltage lockout circuit detects when the LDO output voltage falls below 3.3V and shuts off the gate drivers, thereby protecting the power MOSFETs from switching at low VGS. The LTC3862 is capable of operation over a 4V to 36V input voltage range, making it suitable for a wide variety of boost applications. Lower Emissions Diesel Fuel Injection: A 8.5V–28V Input, 72V, 1.5A Output Boost Tomorrow’s low emissions diesel fuel injection systems require more precise and faster actuation of the fuel injectors than do their gasoline counterparts. Stepping up the voltage VIN 4.5V TO 5.5V L1 2.7µH CDEP145-2R7 of the system is an easy way to achieve fast actuation by increasing di/dt in the actuator, since the energy stored on a capacitor is CV2/2. Boosting the car battery voltage from 13V to 72V signiicantly increases the di/dt, enabling faster actuation. The actuation of the injector typically discharges the supply capacitor by 10V–20V, after which the boost converter recharges the output cap to 72V. Figure 8 illustrates this 8.5V to 28V input, 72V/1.5A output 2-phase boost converter. Figure 9 illustrates the load step for a simulated injector. D1 MBRB2515LT41 1nF GATE1 SLOPE BLANK 10nF ON/OFF CONTROL 0.005Ω 220µF 1W 16V PHASEMODE SENSE1– + 45.3k FREQ RUN 10nF SS 10nF Q1 HAT2165H 10Ω SENSE1+ LTC3862 3.83k ITH FB 330pF 1µF 33µF 10V 33µF 10V + 3V8 DMAX 33µF 10V VIN 220µF 15µF 25V 16V 4.7µF INTVCC 18.7k 10Ω PGND SGND 165k VOUT 15µF 25V 0.005Ω 1W 15µF 25V Q3 HAT2165H GATE2 15µF 25V SENSE2– CLKOUT SYNC PLLFLTR VOUT 12V 15A 10nF SENSE2+ L2 2.7µH CDEP145-2R7 L1 2.7µH CDEP145-2R7 D2 MBRB2515LT41 D1 MBRB2515LT41 1nF GATE1 SENSE1+ SLOPE BLANK PHASEMODE RUN FREQ 1µF SS 330pF 0.005Ω 220µF 1W 16V 10nF SENSE1– + 45.3k Q1 HAT2165H 10Ω LTC3862 ITH FB SGND 33µF 10V 33µF 10V + 3V8 DMAX 33µF 10V VIN 220µF 15µF 25V 16V 4.7µF INTVCC 10Ω PGND 0.005Ω 1W Q3 HAT2165H GATE2 10nF 10k 10nF SENSE2+ 15µF 25V 15µF 25V SENSE2– CLKOUT SYNC PLLFLTR 15µF 25V L2 2.7µH CDEP145-2R7 D2 MBRB2515LT41 Figure 10. A 4-phase, 12V/15A industrial power supply that operates from a 5V input Linear Technology Magazine • January 2009 5 L DESIGN FEATURES ILOAD 2.5A-5A 5A DIV IL1 MASTER 5A/DIV IL2 MASTER 5A/DIV IL1 SLAVE 5A/DIV IL2 SLAVE 5A/DIV VIN 5V/DIV IL1 MASTER 5A/DIV IL2 MASTER 5A/DIV IL1 SLAVE 5A/DIV IL2 SLAVE 5A/DIV VOUT 200mV/DIV VOUT 10V/DIV VIN = 5V VOUT = 12V RLOAD = 10Ω 1ms/DIV VIN = 5V VOUT = 12V Figure 11. Power supply start-up waveforms for 4-phase, 12V/15A industrial power supply This power supply operates at a switching frequency of 300kHz in order to reduce switching losses and uses a 57.8µH, 5A inductor (PA2050-583). An 80V Renesas HAT2267H MOSFET was chosen for this application, in order to provide suficient guardband above the 72V output. The MOSFET has a maximum RDS(ON) of 13mΩ at VGS = 10V. The Diodes Inc surface mount diode (B3100) was chosen for the 3A output current level. A combination of a two 47µF, 100V electrolytic and six 2.2µF, 100V low ESR ceramic capacitors are used to reduce the output ripple to below 100mV peak-to-peak and satisfy the RMS ripple current requirement. A 4-Phase, 5V Input, 12V/15A Output, Industrial Power Supply Figure 10 illustrates an industrial power supply that converts a 5V input to a 12V output at up to 15A of load current. The use of four phases greatly eases the task of choosing the power components, and reduces output ripple signiicantly. Figure 11 250µs/DIV Figure 12. Load step waveforms for 4-phase, 12V/15A industrial power supply In high output voltage systems, switching losses in the power MOSFETs can sometimes exceed the conduction losses. In order to reduce switching losses as much as possible, the LTC3862 incorporates strong gate drivers. The PMOS pull-up transistor has a typical RDS(ON) of 2.1Ω, and the NMOS pull-down transistor has a typical RDS(ON) of 0.7Ω. In addition to reducing switching losses, these strong gate drivers allow two power MOSFETs to be connected in parallel for high current applications. shows the start-up waveforms for this converter. Figure 12 shows the load step waveforms. Multiphase operation is made possible using the PHASEMODE, SYNC and CLKOUT pins. The PHASEMODE pin controls the phase relationship between GATE 1 and GATE 2, as well as between GATE 1 and CLKOUT. The CLKOUT pin of a master controller is connected to the SYNC pin of a slave, where the phase lock loop ensures proper synchronization. The PHASEMODE pin can be used to program 2-, 3-, 4-, 6- and 12-phase operation. 48V/5A Demo Circuit The DC1286A demonstration circuit board is designed for high power applications, providing a 48V/5A output using the GN24 package option of the LTC3862 or LTC3862-1. The 6-layer PCB design ensures proper routing of the SENSE lines, and exhibits minimal jitter even at 50% duty cycle. Jumpers are provided to easily change the BLANK time, PHASE, maximum duty, and SLOPE compensation. There is an optional onboard 12V VIN supply to power the IC, and the component footprint provides lexibility to use various inductors, MOSFET’s and diodes. Conclusion The LTC3862 is a versatile control IC optimized for a wide variety of stepup DC/DC converter applications. Its lexible, high performance operation and three convenient package options make it possible to optimize eficiency, size and weight of the power supply, while keeping the total component and manufacturing costs low. L Figure 13. 48V/5A output, high power demonstration circuit 6 Linear Technology Magazine • January 2009 DESIGN FEATURES L Reliable Precision Voltage Reference with 5ppm/°C Drift is Factory Trimmed and Tested at –40°C, 25°C and 125°C by Michael B. Anderson and Brendan Whelan Introduction The LTC6652 reference is a precision low drift voltage reference that includes advanced curvature compensation circuitry and post-package trim. To guarantee reliable performance, these parts are tested at –40°C, 25°C and 125°C to verify they meet speciication across the entire temperature range. This comprehensive testing ensures that the LTC6652 can be used with conidence in demanding applications. One result of this testing is demonstrated in Figure 1. The output voltage versus temperature for several randomly chosen parts shows a drift characteristic that is consistent from part to part. This is a result of a propriLinear Technology Magazine • January 2009 2.504 GUARANTEED VOUT (V) 2.502 2.496 –50 Compare the Real Specs: Is the Temperature Range Operating or Functional? When comparing voltage references for use in demanding environments, it is important to know, with conidence, how the voltage reference performs at the extremes. When it is important for the reference to provide precision (not just survive) in a harsh environment, the LTC6655 leaves most competing voltage references behind. For example, many applications requiring a precision reference are designed to work over the industrial temperature range (–40°C to 85°C). If the ambient temperature reaches 85°C, the interior of the enclosure and the temperature of the reference will 2.500 2.498 0 50 100 TEMPERATURE (°C) 150 Figure 1. Typical drift characteristics of production trimmed and tested parts likely exceed 85°C. It is not uncommon in this case for the interior of a circuit enclosure to climb above 100°C due to the thermal dissipation of its components. In addition, any comparable voltage reference fully loaded at 5mA with a 13.2V input voltage would self-heat an additional 18°C, raising its own internal junction temperature to 118°C. This temperature is well outside the useful range of most voltage references. The LTC6652, however, maintains exceptional performance in these conditions, despite the extreme environment. By comparison, the drift of a reference speciied only to 85°C will 180 30 1004 UNITS 160 25 LTC6652A LIMITS 140 NUMBER OF UNITS Factory Calibration Means Dependable Precision etary curvature compensation circuit that tracks the operating conditions and the manufacturing process, yielding consistent results. Figure 2 shows a typical temperature drift distribution of randomly selected production tested LTC6652s, illustrating how well the design and testing methodology works. Finally, the initial accuracy distribution is tightly controlled, as shown in Figure 3. NUMBER OF UNITS High precision requirements are no longer limited to the most exotic and expensive measurement equipment. Designers of industrial monitors and automotive monitor and control circuits are using precision circuits to maximize the performance and uninterrupted operating times of their products. Improved precision allows for more accurate assessment of sensor outputs that measure ambient conditions, equipment position, battery condition, component wear and many other system indicators. Precise and consistent measurements are the key to managing system elements that change very little over their operating lives. Recognizing these slight changes can allow estimation of the remaining lifetime of lamps, motors, and other components, or allow control of battery charge and discharge to maximize operating life. These applications not only require high accuracy, low drift and low noise, but also a wide operating temperature range and reasonable cost. 20 15 10 120 80 60 40 5 0 20 0 0.5 1.0 1.5 2.0 2.5 DRIFT (ppm/°C) 3.0 3.5 Figure 2. Drift distribution (–40°C to 125°C) 0 2.4985 2.4995 2.5005 OUTPUT VOLTAGE (V) 2.5015 Figure 3. Typical VOUT distribution for LTC6652-2.5 7 L DESIGN FEATURES After any precision reference is soldered onto a printed circuit board, thermal hysteresis will likely shift the output from its factory trimmed value. Further temperature cycling will also contribute to a shift in the output voltage. Over time, the output will tend to drift slightly as well due to aging of the circuit. The circuit design, fabrication process and mechanical design of the LTC6652 is optimized for low thermal hysteresis and excellent long-term stability, reducing the need for ield calibration. Thermal hysteresis is caused by differing rates of expansion and contraction of materials within a packaged semiconductor device as the device experiences temperature changes. As the package material and the semiconductor die expand and contract at different rates, mechani8 125°C TO 25°C –40°C TO 25°C 30 25 20 15 10 5 0 –250 50 –150 –50 DISTRIBUTION (ppm) 150 Figure 4. Hysteresis plot (–40°C to 125°C) cal force changes device parameters (ever so slightly) and cause the output voltage to change. This change is measured in parts per million (ppm) and is shown in Figure 4. The LTC6652 boasts a typical thermal hysteresis value of 105ppm over its full temperature range. What this means is that when a device goes The LTC6652 reference family is designed and factory trimmed to yield exceptional drift and accuracy performance. The entire family is guaranteed and production tested at –40°C, 25°C and 125°C to ensure dependable performance in demanding applications. Low thermal hysteresis and low long-term drift reduce or eliminate the need for field calibration. 160 from room temperature to 125° and back again to room temperature, the output will typically shift 105ppm. For a 2.5V voltage option, the output would shift –260µV. A cold excursion would shift the most recent room temperature measurement +260µ. Typical hysteresis of 105ppm is equivalent to 0.0105%; just a small fraction of the initial accuracy. It may be convenient to compare typical values for thermal hysteresis when choosing a voltage reference. It is important to remember that these numbers do not tell the whole story. It is the distribution of expected hysteresis that must be used to determine the expected error caused by temperature cycling. Referring to Figure 4, some parts will have better or worse hysteresis. This chart helps to estimate a realistic error budget. This is something our competitors don’t always include, yet is critically important when specifying precision systems. Over time a reference is likely to shift on its own even if it’s kept at a constant temperature. This is known as long-term drift. Long-term drift is measured in ppm/√khr and has a logarithmic characteristic where the change in output voltage decays as time passes. Figure 5 shows the long-term drift of the LTC6652. Note that most of the drift occurs within the irst 1,000 or 2,000 hours as the PCB and package settle. Afterward the drift tends to settle, and the slope is reduced over time as a function of √khr. Direct measurement on soldered down parts is the only way to determine LTC6652-2.5 120 LONG TERM DRIFT (ppm) Eliminate Field Calibration 35 NUMBER OF UNITS likely exhibit substantial additional error, or it may even fail to operate. Other references that claim similar performance to the LTC6652 often are only “functional”, meaning they don’t fail, but they don’t meet speciication either at temperatures exceeding 85°C or below 0°C. These competing parts are rarely tested across their entire speciied temperature range. The reality of industrial circuit design is that in many cases, component speciications over “industrial” temperatures are woefully inadequate. In contrast, every LTC6652 is fully tested at 25°C, –40°C and again at 125°C for every device, not just a small sample. This extensive testing proves the consistently high quality of the LTC6652 over its entire wide temperature range. Further, the LTC6652 was designed from the ground up to accommodate a wide temperature range. Figure 1 clearly illustrates its consistent performance over the entire range. There is no need to question or derate the performance of a system that uses the LTC6652 at its temperature extremes. The consistent, guaranteed performance makes it easy to design, specify and calibrate a high performance system. This is not the case with some competing products. 80 40 0 –40 –80 –120 –160 0 1000 2000 3000 TIME (HOURS) 4000 5000 6000 Figure 5. Example of long-term drift Linear Technology Magazine • January 2009 DESIGN FEATURES L Small Footprint and Output Capacitor Optional The performance of the LTC6652 is often only found in larger packages such as an SOIC. However, the LTC6652 is packaged in a small 8-lead MSOP and does not require an input or output capacitor. This minimizes required board space, thus simplifying the design of applications with tight PCB constraints such as small sensor enclosure applications. Another advantage of not using capacitors is eliminating energy storage devices tied to sensitive circuits. This 2.5005 2.5000 Output Can Source and Sink Current 25°C –40°C 2.4990 2.4985 2.4980 0 2 8 6 10 4 INPUT VOLTAGE (V) 12 14 Figure 6. Line regulation The LTC6652 reference family has seven output voltage options, making it suitable for a variety of today’s demanding applications. These options are 1.25V, 2.048V, 2.5V, 3V, 3.3V, 4.096V, and 5V. is a useful feature in safety critical systems, where energy storage must be minimized. If, however, low noise is a priority, an input capacitor may be added to suppress high frequency transients on the supply line, while an output capacitor will reduce wideband noise and improve AC PSRR. Either way, the LTC6652 offers stable operation. Small size and a range of useful input and output capacitors allows the LTC6652 to satisfy the requirements of many different applications. This includes everything from small, 10 OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) 125°C 2.4995 10 1 0.1 tight-itting portable applications to high precision, low noise measurement applications. 2.5010 OUTPUT VOLTAGE (V) long-term drift. Accelerated testing does not work. Some users burn in their boards, which helps eliminate this initial slope, further reducing the effect of long-term drift. The three curves shown in Figure 5 give a general indication of how much long-term drift to expect. The typical speciication is 60ppm/√khr, which translates into 150µV drift. Combining the typical thermal hysteresis and long-term drift numbers yields 165ppm. To put this in perspective, the LTC6652 temperature coeficient is typically 2ppm/°C over 165°C temperature range, which yields 330ppm due to drift alone. The combined thermal hysteresis and long-term drift is half this number (or just 20% of the maximum drift speciication). The superior thermal hysteresis and longterm drift performance of the LTC6652 ensures accuracy and reliability over the product lifetime, virtually eliminating the need for ield calibration. 25°C Wide Input Range, Low Dropout, and Seven Voltage Options 1 25°C 125°C, –40°C 125°C –40°C 0.01 0.001 0.01 0.1 1 0.1 0.001 INPUT-OUTPUT VOLTAGE (V) 0.01 0.1 OUTPUT-INPUT VOLTAGE (V) a. Sourcing current b. Sinking current Figure 7. Dropout voltage sourcing and sinking current Linear Technology Magazine • January 2009 The LTC6652 is a series voltage reference that can source current, but it can also sink current like a shunt reference. Some series voltage references can only source output current and rely on a resistor divider for feedback and to sink a small amount of current. These types of devices can experience long settling times, especially when charge is kicked back from a switched capacitor circuit causing the output voltage to rise. The sink (overvoltage) settling time on a source only reference is dominated by the RC time constant of the output capacitor and the resistive divider. For example, a 2.2µF output capacitor and a 125kΩ resistive divider will have a 275ms time constant. Depending on the size of the perturbation and the system precision, a source only reference may not settle in a timely fashion. The LTC6652 current sink capacity is 5mA and will dynamically respond for faster settling. Shunt references are two terminal devices that maintain the output voltage by sinking more or less current. The sinking ability of the LTC6652 allows it to operate in a similar, but more eficient manner. In fact, for voltage options of 3V or higher, the VIN pin can actually go below the VOUT pin while sinking currents of 100µA and higher and still maintain good regulation. 1 The LTC6652 reference family has seven output voltage options to choose from, making it suitable for a variety of today’s demanding applications. These options are 1.25V, 2.048V, 2.5V, 3V, 3.3V, 4.096V, and 5V. For low input voltage requirements, the 1.25V and 2.048V options work with input voltages down to 2.7V. The other ive options require only 300mV input-tocontinued on page 4 9 L DESIGN FEATURES Ultralow Noise 15mm ×15mm × 2.8mm µModule Step-Down Regulators Meet the Class B of CISPR 22 and Yield High Efficiency at up to 36VIN by Judy Sun, Jian Yin, Sam Young and Henry Zhang Introduction Power supply designers face many tradeoffs. Need high eficiency, large conversion ratios, high power and good thermal performance? Choose a switching regulator. Need low noise? Choose a linear regulator. Need it all? Compromise. One compromise is to follow a switcher with a linear regulator (or regulators). Although this cleans up the output noise relative to a switcher-only solution, a good portion of the conducted and radiated EMI remains—even if ferrite beads, π ilters, and LC ilters are used. The problem can always be traced back to the switcher, where fast dI/dt transitions and high switching frequencies These µModule step-down regulators are designed to achieve both high power density and meet EMC (electromagnetic compatibility) standards. The integrated ultralow noise feature allows both devices to pass the Class B of CISPR 22 radiated emission limit, thus eliminating expensive EMI design and lab testing. lead to high frequency EMI, but some applications, especially those with large conversion ratios, require a switcher. Fortunately, the LTM4606 and LTM4612 µModule regulators offer the advantages of a switching regulator while maintaining ultralow conducted and radiated noise. These µModule step-down regulators are designed to achieve both high power density and meet EMC (electromagnetic compatibility) standards. The integrated ultralow noise feature allows both devices to pass the Class B of CISPR 22 radiated emission limit, thus eliminating expensive EMI design and Table 1. Feature comparison of ultralow noise µModule regulators 10 Feature LTM4606 LTM4612 VIN 4.5V to 28V 5V to 36V VOUT 0.6V to 5V 3.3V to 15V IOUT 6A DC Typical, 8A Peak 5A DC Typical, 7A Peak CISPR 22 Class B Compliant L L Output Voltage Tracking and Margining L L PLL Frequency Synchronization L L ±1.5% Total DC Error L L Power Good Output L L Current Foldback Protection L L Parallel/Current Sharing L L Low Input and Output Referred Noise L L Ultrafast Transient Response L L Current Mode Control L L Programmable Soft-Start L L Output Overvoltage Protection L L Package 15mm × 15mm × 2.8mm 15mm × 15mm × 2.8mm Linear Technology Magazine • January 2009 DESIGN FEATURES L >1.9V = ON <1V = OFF MAX = 5V VOUT RUN PGOOD 5.1V ZENER COMP 1.5µF INPUT FILTER VIN 4.5V TO 28V + CIN 60.4k VD INTERNAL COMP CD POWER CONTROL SGND M1 VOUT 2.5V AT 6A MARG1 MARG0 VFB 50k RFB 19.1k NOISE CANCELLATION 50k fSET M2 22µF + COUT 41.2k PGND FCB 10k MPGM TRACK/SS CSS PLLIN 50k 4.7µF INTVCC DRVCC Figure 1. Simplified block diagram of the LTM4606 (LTM4612 is similar). Only a few capacitors and resistors are required to build a complete wide-input-range regulator. requiring only a few input and output capacitors. For more output power, both parts can be easily paralleled, where output currents are automatically shared due to the current mode control structure. 100 90 EFFICIENCY (%) lab testing. See Table 1 for a feature comparison of these two parts. Both µModule regulators are offered in space saving, low proile and thermally enhanced 15mm × 15mm × 2.8mm LGA packages, so they can be placed on the otherwise unused space at the bottom of PC boards for highaccuracy point-of-load regulation. This is not possible with linear regulators that require a bulky cooling system. Almost all support components are integrated into the µModule package, so layout design is relatively simple, 80 70 1.2VOUT 1.5VOUT 2.5VOUT 3.3VOUT 5VOUT 60 50 0 1 2 3 4 LOAD CURRENT (A) 5 6 Figure 2. Efficiency of the LTM4606 with a 12V input. Easy Power Supply Design with Ultralow Noise µModule Regulators With a few external input and output capacitors, the LTM4612 can deliver 4.5A of DC output current 95 CLOCK SYNC R4 100k CIN 10µF x 2 50V ON/OFF C1 10µF 50V C4 0.01µF VIN PLLIN PGOOD VOUT RUN LTM4612 VD VFB INTVCC DRVCC FCB fSET MARG0 MARG1 TRACK/SS MPGM COMP SGND PGND 90 C3 100pF RSET 5.23k COUT1 22µF 25V VOUT 12V 4.5A COUT2 180µF 16V DCM CCM 80 75 70 MARGIN CONTROL 65 R1 392k 5% MARGIN 60 Figure 3. A few capacitors and resistors complete an 18V–36V input, 12V/4.5A output design. Linear Technology Magazine • January 2009 85 EFFICIENCY (%) VIN 18V TO 36V 55 24VIN, 12VOUT 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 LOAD CURRENT (A) Figure 4. Efficiency for the circuit in Figure 3. 11 L DESIGN FEATURES LT4606 OR LTC4612 L1 VIN VIN + VD C2 10µF ×3 C1 150µF C3 10µF Figure 6. Input π filter reduces high frequency input noise. Figure 5. Thermal image of an LTM4606 with 24V input and 3.3V output at 6A 97mVP–P 10.6mVP–P VIN 50mV/DIV VIN 5mV/DIV VOUT 5mV/DIV VOUT 2mV/DIV 13.8mVP–P 4.4mVP–P VIN = 5V 2µs/DIV VOUT = 1.2V ILOAD = 5A CIN = 3×10µF/25V CERAMIC AND 1×150µF/25V ELECTROLITIC COUT = 1×100µF/25V AND 3×22µF/25V CERAMIC SCOPE BW = 300MHz VIN = 5V 2µs/DIV VOUT = 1.2V ILOAD = 5A CIN = 3×10µF/25V CERAMIC AND 1×150µF/25V ELECTROLITIC COUT = 1×100µF/25V AND 3×22µF/25V CERAMIC SCOPE BW = 300MHz Figure 7. Input and output noise of comparable µModule regulator without low noise feature Figure 8. Input and output noise of LTM4606 µModule regulator is significantly lower than the regulator in Figure 7. 80 VIN = 24V VOUT = 12V SIGNAL AMPLITUDE (dBµV) 70 60 CIS25QP 50 40 30 20 10 0 0.15 1 FREQUENCY (MHz) 10 30 Figure 9. The conducted EMI test of the LTM4612 passes EMI standard CISPR 25 level 5. and the LTM4606 can deliver 6A. The LTM4612’s programmable output can be precisely regulated in a 3.3V-to-15V range from a 4.5V-to-36V input; the LTM4606 can produce 0.6V to 5V from a 4.5V-to-28V range. With current mode control and optimized internal compensations, both offer stable output even in the face of signiicant load transients. 12 Figure 1 shows the simpliied block diagram of the LTM4606 with an input from 4.5V to 28V and 2.5V/6A output. Figure 2 shows the eficiency test curves with 12V input voltage under CCM mode. About 92% eficiency is achieved at full load with LTM4606, running at 900kHz switching frequency. Figure 3 shows a complete 18V–36V VIN, 12V/4.5A VOUT design with the LTM4612. Figure 4 shows the eficiency. Both parts offer good thermal performance with a large output load current. Figure 5 shows the LTM4606 thermal image with 24V input and 3.3V output at 6A load current. The maximum case temperature is only 73.5oC with the 20W output power. Both include a number of built-in features, such as controllable softstart, RUN pin control, output voltage tracking and margining, PGOOD indicator, frequency adjustment and external clock synchronization. Eficiency can be further improved by applying an external gate driver voltage to the DRVCC pin, especially in high VIN applications. Discontinuous mode operation can be enabled to increase the light load eficiency. Reduce Conducted EMI Conducted input and output noise of switching regulators (aka ripple) is usually a problem when the regulator operates at high frequency, which is common in space-constrained applications. The LTM4606 and LTM4612 reduce peak-to-peak ripple at the input by integrating a high frequency inductor as shown in Figure 6. The external input capacitors at the VD and VIN pins form a high frequency input π ilter. This effectively reduces conductive EMI coupling between the module and the main input bus. Since most input RMS current lows into capacitor C3 at the VD pin, C3 should have enough capacity to handle the RMS current. A 10µF ceramic capacitor is recommended. To effectively attenuate EMI, place C3 as close as possible to the VD pin. The ceramic capacitors C2 mainly determine the ripple noise attenuation, so the capacitor value can be varied to meet the different input ripple requirements. C1 is only needed if the input source impedance is compromised by long inductive leads or traces. Since these µModule regulators are used in a buck circuit topology, the lowpass ilter formed by the output inductor L and capacitor COUT Linear Technology Magazine • January 2009 DESIGN FEATURES L LTM4606 µMODULE REGULATOR RESISTIVE LOAD EMISSIONS LEVEL (dBµV/m) 90 DC POWER SUPPLY Reduce Radiated EMI Switching regulators also produce radiated EMI, caused by the high dI/ dt signals inherent in high eficiency regulators. The input π ilter helps to limit radiated EMI caused by high dI/dt loops in the immediate module area, but to further attenuate radiated EMI, the LTM4606 and LTM4612 include an optimized gate driver for the MOSFET and a noise cancellation network. To test radiated EMI, several setups are tested in a 10-meter shielded chamber as shown in Figure 10. To ensure a low baseline radiated noise, Linear Technology Magazine • January 2009 CISPR22, CLASS B 30 10 0 100 200 300 400 500 600 700 FREQUENCY (MHz) 800 900 1000 Figure 11. Radiated emission scan of baseline noise (no switching regulator module) EMISSIONS LEVEL (dBµV/m) 90 70 50 CISPR22, CLASS B 30 VIN = 12V VOUT = 2.5V ILOAD = 6A 10 0 0 100 200 300 400 500 600 700 FREQUENCY (MHz) 800 900 1000 Figure 12. Radiated emission peak scan of a typical module without the low noise features. 90 EMISSIONS LEVEL (dBµV/m) can similarly reduce the conducted output EMI. To show the relative noise attenuation of these µModule regulators, a similar module without the low noise feature is compared to the LTM4606 for input and output noise, as shown in Figure 7 and Figure 8. Both modules are tested from 5V input to 1.2V output at 5A with resistive loads. The same board layout and I/O capacitors are used in the comparison. The results show that the LTM4606 produces much lower input and output noise, with a nearly 10× reduction of the peak-to-peak input noise and better than 3× reduction of the output noise compared to the similar module in Figure 7. Figure 9 shows the conducted EMI testing results for the LTM4612 with a 24V VIN, 12V/5A VOUT, which accommodates the EMI standard CISPR 25 level 5. The input capacitance for this test comes from 4 × 10µF/50V ceramics plus a single 150µF/50V electrolytic. 50 0 70 50 CISPR22, CLASS B 30 VIN = 12V VOUT = 2.5V ILOAD = 6A 10 0 0 100 200 300 400 500 600 700 FREQUENCY (MHz) 800 900 1000 Figure 13. The radiated EMI test of the LTM4606 passes EMI standard CISPR 22 Class B. 90 EMISSIONS LEVEL (dBµV/m) Figure 10. Setup of the radiated emission scan 70 70 50 CISPR22, CLASS B 30 VIN = 24V VOUT = 12V ILOAD = ??A 10 0 0 100 200 300 400 500 600 700 FREQUENCY (MHz) 800 900 1000 Figure 14. The radiated EMI test of the LTM4612 passes EMI standard CISPR 22 Class B. 13 L DESIGN FEATURES Table 2. Noise margins are good for radiated emission results shown in Figure 13 EUT Antenna Uncorrected Frequency Antenna Azimuth Height Amplitude ACF (MHz) Polarization (Degrees) (cm) (dBµV) (dB/m) Pre-Amp Gain (dB) CBL (dB) Corrected DCF Amplitude (dB) (dBµV) Limit (dBµV) Margin (dB) 134.31 H 354 364 1.3 11.428 0 1.532 0 14.26 30 15.74 119.96 V 184 110 3.5 12.694 0 1.456 0 17.65 30 12.35 160.02 H 0 354 0.5 10.499 0 1.793 0 12.792 30 17.208 174.37 H 0 100 1.2 9.638 0 1.944 0 12.782 30 17.218 224.28 V 0 100 –1.87 10.586 0 2.044 0 10.76 30 19.24 263.63 H 0 371 –4.72 12.6 0 2.385 0 10.265 37 26.735 a linear DC power supply is used for the input, and a resistive load is employed on the output. The baseline noise is checked with the power supply providing a DC current directly to the resistive load. The baseline emission scan results are shown in Figure 11. There are two traces in the plot, one for the vertical and horizontal orientations of the receiver antenna. Figure 12 shows the peak scan results of a µModule buck regulator—not the LTM4606 or LTM4612—without the integrated low noise feature. The scan results show that the noise below 350MHz is produced by the µModule switching regulator, when compared to the baseline noise level. Radiated EMI here does not meet the Class B of CISPR 22 (quasi-peak) radiated emission limit. LTC6652, continued from page 9 output headroom while fully loaded, and they require less headroom with a reduced load or while sinking current. Popular application requirements, such as a 2.5V reference operating on a 3V supply, or a 4.096V reference operating on a 5V supply, are easily accommodated. For high input voltage requirements, all voltage options work up to 13.2V. Regardless of input voltage the LTC6652 maintains its excellent accuracy as shown in the line regulation plot in Figure 6. A plot of the dropout voltage for both sourcing and sinking current is shown in Figures 7a and 7b, respectively. 14 In contrast, Figure 13 shows the peak scan results of the low noise LTM4606 module. To ensure enough margin to the quasi-peak limit for different operation conditions, the six highest noise points are checked as shown in the table of Figure 13 using the quasi-peak measurement. The results show that it has more than 12dBµV margin below the Class B of CISPR 22(quasi-peak) radiated emission limit. Figure 14 shows the results for the LTM4612 meeting the Class B of CISPR 22 radiated emission limit at 24V VIN, 12V/5A VOUT. Conclusion The LTM4606 and LTM4612 µModule regulators offer all of the high performance beneits of switching regulators minus the noise issues. The ultralow Superior Performance While many references share some features of the LTC6652, it’s dificult to ind any that include all the features at the same level of performance and reliability. Additional features include low noise, good AC PSRR, and excellent load regulation (both sourcing and sinking current). Low power consumption and a shutdown mode round out the feature list. Conclusion The LTC6652 reference family is designed and factory trimmed to noise optimized design produces radiated EMI performance with enough margin below the Class B of CISPR 22 limit to simplify application in noisesensitive environments. Design is further simpliied by exceptional thermal performance, which allows them to achieve high eficiency and a compact form factor. A low proile 15mm × 15mm × 2.8mm package contains almost all of the support components—only a few input and output capacitors are required to complete a design. Several µModule regulators can be easily run in parallel for more output power. The versatility of these parts is rounded out by optional features such as soft-start, RUN pin control, output voltage tracking and margining, PGOOD indicator, frequency adjustment and external clock synchronization. L yield exceptional drift and accuracy performance. The entire family is guaranteed and production tested at –40°C, 25°C and 125°C to ensure dependable performance in demanding applications. Low thermal hysteresis and low long-term drift reduce or eliminate the need for ield calibration. The small 8-lead MSOP package and sparse capacitor requirements minimize required board space. The wide input range from 2.7V to 13.2V and seven output voltage options will tackle the needs of most precision reference users. L Linear Technology Magazine • January 2009 DESIGN FEATURES L Dual Hot Swap Controller Brings Digital Monitoring to AdvancedTCA, µTCA and AMC Applications by Josh Simonson Introduction Recently ratiied plug-in card bus standards, such as AdvancedTCA, µTCA and AMC, reduce the number of power supplies that are routed across the connector when compared to earlier standards, such as CompactPCI. Bulk power is limited to one fairly high voltage supply, making for an eficient distribution channel. For instance, distributed 12V power is locally converted to lower voltages to minimize distribution currents and related losses in connectors and power handling circuitry. Some cards also have a lower voltage (3.3V) maintenance power supply that provides low current Even with the simplification that new plug-in standards bring, there remain rigorous power, heat dissipation and reliability requirements for Hot Swap, monitoring and control. The LTC4222 satisfies these requirements with integrated dual Hot Swap controllers and voltage and current monitoring via an onboard ADC. housekeeping functionality to a card even when the bulk supply is off. Even with the obvious simpliication that these standards bring, there remain rigorous power, heat dissipation and reliability requirements, which demand advanced Hot Swap, monitoring and control capability. The LTC4222 satisies these requirements with dual Hot Swap controllers and integrated voltage and current monitoring via an onboard ADC. Hot swapping requires a power switch to initially isolate the board, and a controller to slowly turn on the switch to minimize backplane distur- Table 1. A few of the LTC4222’s many features Feature Benefits Wide Input Voltage Range: Operates from inputs of 2.9V to 29V, with 35V absolute maximum ❏ Suitable for 3.3V, 5V, 12V and 24V systems ❏ Simpliies design because part functions on a semi-regulated supply ❏ Large overvoltage transient range eases design tolerances for transient protection ❏ Increases reliability 10-Bit ADC: Monitors current, output voltage and external pin voltage ❏ Board power information provides an early warning of board failure ❏ Verify board is staying within its allotted power ❏ Allows integrity check of redundant supply paths ❏ Allows active power management to safely maximize power utilization within the chassis cooling constraints I2C/SMBus: Communicates as a read-write slave device using a 2-wire serial interface ❏ Improves integration with the host system. Interface allows the host to conigure the part, determine which faults are present or have occurred, and read back ADC measurements ❏ Provides lexibility for different architectures Optionally Coupled Faults: The conig pin allows channels to function ❏ Allows the part to power two independent independently or couples faults to shut down sockets or sequence the application of power both channel if either generates a fault ❏ Enables both channels to shut down on a fault, isolating a faulty board Fast short Circuit Response: Fast (<1µs) current limit response to shorts ❏ Protects connector from overcurrent Alert Host After Faults: When conigured (using I2C), faults activate an active pull-down on the ALERT pin ❏ Interrupting the host for immediate fault servicing limits system damage Linear Technology Magazine • January 2009 ❏ Limits the disturbance to the input supply from a short circuit ❏ Reduces the bus trafic for polling 15 L DESIGN FEATURES bances. Since the Hot Swap controller monitors card voltage and current, it is a natural place to integrate higher level monitoring with a data converter. This provides detailed information about the health of the power path and the power consumption of down-stream circuits. Such information can be used to monitor performance over time and identify boards that are drifting towards failure or out of spec. The LTC4222 works in applications from 24V (with transients to 35V) down to 3.3V where the operating input voltage could drop to 2.9V. Functionally, the LTC4222 is very similar to a pair of LTC4215s or LTC4260s. Table 2 compares features of the LTC4222, LTC4215 and LTC4260. Since all three parts may be used for 12V systems, Table 2 may be used to select the part(s) with the optimal set of features for a speciic 12V application. Table 2. Feature comparison of the LTC4222, LTC4215 and LTC4260 Feature LTC4222 LTC4215 LTC4260 Channels 2 1 1 VDD Abs Max 35V 24V 100V VDD Min 2.9V 2.9V 8.5V Current Limit/Circuit Breaker 50mV 25mV 50mV Circuit Breaker Precision 5% 10% 10% Built in Overvoltage Threshold Optional Coupled Faults L ADC Direct Address/Alert L ADC Resolution 10-bit 8-bit 8-bit ADC SOURCE LSB 31.25mV 60mV 400mV ADC VSENSE LSB 62.5µV 151µV 300µV ADC ADIN LSB 1.25mV 4.85mV 10mV Internally Generated VCC 3.3V 3.1V 5.5V Package 5mm x 5mm QFN 4mm x 5mm QFN 5mm x 5mm QFN AMC Application The LTC4222 combines a robust Hot Swap circuit with a data converter and I2C interface to allow power monitoring in addition to hot plug functionality and fault isolation. In a typical application, see Figure 1, the LTC4222 uses external N-channel pass transistors to isolate the hot swapped board from the backplane when it is irst inserted. After a debounce time the controller can begin to apply power to the board or wait for a turn-on command from a host processor. Power is gradually ramped up to minimize any backplane disturbance. After the power-up process is complete, the LTC4222 continues to monitor for faults in the power path. The CONFIG pin controls whether the two channels start-up and turn-off at the same time or independently. Some of the major features of the LTC4222 are listed in Table 1. An N-channel pass transistor, Q1, controls the application of power to VOUT1 on the board as in Figure 1. A series sense resistor, RSENSE, allows the LTC4222 to measure the current in the power-path with the ADC and provides the current sense input to the current limit and circuit breaker. Resistor R5 suppresses self-oscilla16 15.6V tions in Q1. Resistors R1–R3 set the undervoltage (UV) and overvoltage (OV) fault thresholds. Capacitor CF ilters the power signal to prevent faults from noise or transient events. R7 and R8 select the power good threshold and set the foldback current limit level, which dramatically improves safe operating RSENSE1 6mΩ VIN1 12V Q1 Si7336ADP R51 10Ω R21 1.02k R31 3.4k ON SDA SCL ALERT NC C3 0.1µF UV1 VDD1 OV1 ON SDA SCL ALERT CONFIG ADR0 ADR1 ADR2 INTVCC GND R32 3.4k VOUT1 12V 7.4A R71 10.2k R11 34k CF1 0.1µF OV2 UV2 VDD2 R81 3.57k SENSE1– GATE1 SOURCE1 FB1 GPIO1 EN1 ADIN1 TIMER R41 10k 12PGOOD CTIMER 1µF LTC4222 SS ADIN2 EN2 CSS 68nF AUXPGOOD GPIO2 FB2 SENSE2 GATE2 SOURCE2 – R22 1.02k CF2 0.1µF VIN2 3.3V area (SOA) requirements for Q1. Capacitor CSS sets a maximum inrush current slew rate to avoid transient glitches on the backplane and CTIMER is used to set the start-up time limit, which protects Q1 by turning it off if the system attempts to start-up into an excessive load. C3 is used to bypass R52 10Ω CG2 10nF R12 6.65k R82 3.57k R42 10k R72 4.99k RSENSE2 300mΩ Q2 Si1046R BACKPLANE PLUG-IN CARD VOUT2 3.3V 150mA Figure 1. Typical AMC application Linear Technology Magazine • January 2009 DESIGN FEATURES L the internal 3.3V core voltage on the INTVCC pin and prevent the LTC4222 from resetting on input supply glitches. The INTVCC pin may also be used to power external loads, such as an I2C bus buffer, up to 10mA. The behavior of channel 2 is identical to channel 1. Typically, the pins on the connector are staggered so that bulk power is applied irst with the longest pins, followed by communication lines on medium length pins, and inally, Hot Swap control lines such as the supply for the UV, OV, or EN pins. The UV, OV, and EN pins must be in the correct state for a period of 100ms before Q1 is allowed to turn on to allow any connector signal bouncing to subside before starting up. At this point the ON pin turns the part on immediately if it is high, or holds the part off if it is low. The ON pin can be overridden and Q1 turned on or off through the I2C bus by writing to the ON bit in the control register. If the CONFIG pin is low, these conditions must be met for both channels to initiate start-up, and both channels will start up at the same time, as shown in Figure 2. A fault on either channel when the CONFIG pin is low results in both channels turning off, as shown in Figure 3, at which point they latch off or auto-retry together as conigured in the control registers. This allows a faulting board to be entirely disconnected. When the CONFIG pin is tied high, the two channels can start-up independently as long as both VDD voltages are above their UVLO levels. If one channel is enabled during the 100ms debounce time of the other channel, the 100ms debounce is restarted and both channels will start together, however if one channel is enabled while the other channel is starting up or going through an overcurrent cool-down cycle, the channel attempting to start must wait for the other channel to inish before it is allowed to start. With CONFIG tied high, the two channels can easily be sequenced by tying the power good output on the GPIO pin of one channel to the UV pin of the other channel. The GPIO pin pulls down the UV pin and holds the other channel off until the irst channel starts up and the FB pin detects that power is good, at which point the GPIO pin releases the UV pin and the second channel starts up, as shown in Figure 4. VDD1/2 10V/DIV VDD1/2 10V/DIV VOUT1 10V/DIV VOUT1 10V/DIV VOUT2 10V/DIV VOUT2 10V/DIV GPIO2 PGOOD 10V/DIV GPIO2 PGOOD 10V/DIV 50ms/DIV 50ms/DIV Figure 2. Start-up waveform with coupled turn-on Figure 4. Start-up waveform with sequencing VSENSE1 150mV/DIV VSENSE1 150mV/DIV VOUT1 10V/DIV VOUT1 10V/DIV VOUT2 10V/DIV VOUT2 10V/DIV ALERT 5V/DIV ALERT 5V/DIV 10µs/DIV Figure 3. Fault-off waveform with coupled faults Linear Technology Magazine • January 2009 10µs/DIV Figure 5. Fault-off waveform with independent faults If one channel experiences a fault when the CONFIG pin is tied high, the other channel remains on, as shown in Figure 5. This allows the LTC4222 to supply two slots on a backplanebased application where non-failing slots are supposed to remain on when adjacent slots fail, such as providing 12V payload power switching for two µTCA slots as shown in Figure 6. Measure Board Power with Integrated ADC Monitoring the supply voltage and current is a useful way of tracking the health of the power path. New data can be compared with historical data for the same card to detect changes in power consumption that could indicate that the card is behaving abnormally. An abnormal card can be shut down and lagged for service, perhaps before a more severe fault or system malfunction occurs. The LTC4222 includes a 10-bit data converter that continuously monitors six voltages: two ADIN pins, two SOURCE pins and two current sense voltages between the SENSE+ and SENSE– pins. The ADIN pins are uncommitted ADC inputs that allow the user to monitor any available voltage. The ADIN pins are monitored with a 1.28V full scale and are connected directly to the data converter input without any signal scaling. The SOURCE pins use a 1:24 divider at the input, which gives a 32V full scale. The SENSE voltage ampliiers have a voltage gain of 20, which results in a 64mV full scale. The converter uses an over-sampling and offset cancellation method that preserves the full 10-bit dynamic range on the SENSE channels. If the data converter reads more than 2mV on a VDD–SENSE channel while the external switch is turned off, the LTC4222 generates a FET-SHORT fault to indicate that the switch may be damaged. The presence of this condition is indicated in the STATUS register bit C5 for the originating channel and logged to FAULT register bit D5. The LTC4222 takes no action in this condition other than logging the fault and generating an alert if conigured to do so. 17 L DESIGN FEATURES The results from each conversion are stored in 12 ADC registers. The default behavior of the data converter is a free-running mode in which it sequentially measures all six channels continuously and updates the output registers 15 times per second. The data converter can be stopped by setting ADC_CONTROL register bit 0 (HALT)—subsequent writes to the ADC_CONTROL register with the HALT bit set initiate a single conversion on the data converter channel selected by ADC_CONTROL register bits 1–3. An optional alert can be generated on the ALERT pin to indicate a conversion has inished by setting ADC_CONTROL register bit 4, or alternately the ADC_BUSY bit (ADC_CONTROL bit 5) can be polled until it indicates that the data converter has completed the conversion. Note that the ADC_BUSY bit is always set when the data converter is in its free-running mode. When the data converter is halted, the data converter registers may be written to and read from for software testing. Versatile Inrush Current Control As described above, the LTC4222 waits to turn on each channel’s external switch until the channel’s input has met the UV and OV thresholds and an internal 100ms debounce timer has expired. The start-up time is determined by the capacitor on the TIMER pin, or 100ms if the TIMER pin is tied to INTVCC. During this time the circuit breaker is disabled to prevent an overcurrent fault from occurring, the power good signal from the corresponding GPIO pin is also disabled to prevent turning on a load before the current limit has reached the full value via the SS (soft-start) and FB (foldback) pins. The inrush current slew rate (dI/dt) is limited via the SS pin. The inrush current is also folded back from 50mV to 17mV via the FB pin. An optional RC network on the external MOSFET gate can be used to set the inrush current below the foldback level by setting the maximum slope of the output voltage. When both channels are starting up at the same 18 time, the current sense voltages are both regulated to the lowest value commanded by the two FB pins and the SS pin. At the end of the start-up period the current limit circuit is checked. If the current limit is still regulating the current, the LTC4222 determines that the output failed to come up and generates an overcurrent fault. If the current limit circuit is not active then the current limit threshold is moved to 150mV, the power good signal to the GPIO pin is enabled and the 50mV circuit breaker is armed. The SS pin sets the current slew rate limit at start-up. It starts at ground, which corresponds to a negative voltage on the sense resistor and results in the MOSFET being turned off. A current into the soft-start capacitor produces a ramp that corresponds to increasing VDD–SENSE voltage. When either channel’s current limit circuit releases the gate (when the commanding V DD –SENSE voltage becomes positive) the current from the SS pin is stopped to wait for that GATE pin to rise and start to turn on the MOSFET. Once the current limit circuit begins to regulate the VDD–SENSE voltage, the current from the SS pin is resumed and the ramp continues until it reaches the foldback level. It is important that the SS pin stop the ramp while the GATE pins are slewing because the ramp would otherwise continue and result in an uncontrolled step in current once the MOSFET threshold is reached. An uncontrolled step may violate inrush speciications and cause supply glitches on the backplane. Due to offset differences between the current limit circuits, the soft-start ramp may pause twice as each gate slews at a different time when both channels turn on in the same start-up cycle. If the soft-start ramp reaches one of the the foldback current limit levels, the soft-start circuit stops the ramp. The ramp is allowed to continue as the voltage at the lowest FB pin rises and increases the foldback current limit, still limited in slope and limited in magnitude by foldback as well. The FB pin for a channel that is either on or off while the other is starting up is ignored and does not affect the startup current limit. If an RC network is placed on a GATE pin to manually set the inrush current to a value below the foldback level, the current limit circuit leaves regulation and begins slewing when it is unable to achieve the VDD–SENSE voltage commanded by the SS and FB pins. If the start-up timer expires in the meantime, an overcurrent fault is not generated because the current limit is not active. The power good output for the GPIO pin relays the state of the FB pin, and the circuit breaker is armed. Either the output voltage inishes rising and a power good is asserted when the FB pin crosses it’s 1.235V threshold, or the current rises to the circuit breaker threshold and the part generates an overcurrent fault. In the event there is an overcurrent condition after start-up, the current limit circuit limits the VDD–SENSE voltage to 150mV while the circuit breaker waits for a 20µs timeout before producing an overcurrent fault. After any overcurrent fault, the part waits for a cool-down period of 50 times the start-up time before allowing either channel to start or restart via auto-retry, or cycling the EN, UV or OV pins. The ON pins or the ON bits in the control registers can be cycled to bypass the cool-down time. Controlled Turn-Off When the LTC4215 is turned off by a fault or I2C transaction, the GATE pin is pulled down with a 1mA current source. Once the GATE pin is below the SOURCE pin, a diode from SOURCE to GATE turns on and the voltage at the SOURCE pin is discharged by the same 1mA current. If there is a short that causes the sense voltage to exceed 150mV, a 450mA pull-down current from GATE to SOURCE removes the gate charge of the switch. Once the sense voltage falls to 150mV, the current limit regulates there for 20µs before turning the gate off with the 1mA current source. If there is a signiicant inductance between VDD (SENSE+) and upstream bulk capacitance, across a connecLinear Technology Magazine • January 2009 DESIGN FEATURES L tor for instance, it is possible that a short circuit at the output with a very fast discharge time could cause the VDD input voltage to collapse while the current through this inductance slews. In this case, after 2µs, the VDD undervoltage lockout circuit turns on and discharges the GATE pin with the 450mA pull-down to the SOURCE pin to quickly turn the switch off. the 20% circuit breaker frees 4A for use elsewhere, or allows the use of a 30% smaller, and less expensive, power supply. High Voltage Rating for 12V Applications The LTC4222 has a maximum input voltage rating of 35V, which is higher Save Power with Precise 50mV Circuit Breaker In systems where a circuit breaker has only 20% accuracy, the designer must be able to safely provide 50% more power than the card actually consumes to ensure that the application doesn’t suffer from heat and supply limitations on the high side or produce a fault in normal operation on the low side. For instance, in a system that requires 10A, a 20% accurate hot swap must have a nominal circuit breaker threshold of 12.5A. Since the threshold could be as high as 15A, the power supply needs to be able to supply 15A. In the case of a 5% threshold, the nominal threshold is 10.5A and the maximum possible current is 11A. Using the part with a 5% circuit breaker over the part with The LTC4222 is a smart power gateway for boards with two or more hotswappable supplies. It provides fault isolation, closely monitors the health of the power paths and provides a versatile means of controlling the inrush current profile. It logs faults, provides real-time status information, and can interrupt the host if necessary. Meanwhile, an internal 10-bit ADC continuously monitors board current and voltages. 6mΩ 12V 12V 10Ω 12.1k 2k UV1 VDD1 OV1 ON SDA SCL ALERT CONFIG ADR0 ADR1 ADR2 INTVCC GPIO1 EN1 ADIN1 UV2 VDD2 TIMER SS LOAD 1 PWR GOOD 1 1µF 68nF ADIN2 EN2 GPIO2 PWR GOOD 2 FB2 SENSE2– GATE2 SOURCE2 2k µTCA PLUG-IN CARD 2 12.1k 10Ω 0.1µF µTCA PLUG-IN CARD 1 LTC4222 GND OV2 100k SENSE1– GATE1 SOURCE1 FB1 0.1µF 10.2k The LTC4222 is a smart power gateway for boards with two or more hotswappable supplies. It provides fault isolation, closely monitors the health of the power paths and provides versatile means of controlling the inrush current proile. It logs faults, provides real-time status information, and can interrupt the host if necessary. Meanwhile, an internal 10-bit ADC continuously monitors board current and voltages. These features make the LTC4222 an ideal power gateway for high availability systems. L 93.1k 0.1µF NC Conclusion Si7336ADP 93.1k 10.2k than the breakdown voltage of the external MOSFET for most 12V applications, and also allows the LTC4222 to be used in 24V applications. If the breakdown voltage of the external MOSFET is less than the 35V abs-max of the LTC4222, there is no need for a transorb at the input in a card-resident application because voltage surges are safely absorbed by the MOSFET. If a transorb is still required, the high voltage rating of the LTC4222 makes it easy to select a transorb above the maximum operating range of the application, and below the 35V maximum for the part. 93.1k 100k LOAD 2 93.1k 12V 12V 6mΩ Si7336ADP BACKPLANE Figure 6. µTCA application supplying 12V payload power to two µTCA slots Linear Technology Magazine • January 2009 19 L DESIGN FEATURES ±32V Triple-Output Supply for LCDs, CCDs and LEDs Includes Fault Protection in a 3mm × 3mm QFN by Eko T. Lisuwandi Introduction The task of designing a battery powered system with multiple high voltage supplies is a daunting one. In such systems board space is at a premium and high eficiency is required to extend battery life. Supplies must be sequenced in start-up and shut-down, and multiple supplies must be able to maintain regulation without interaction across supplies. The LT3587 is a 1-chip solution that combines three switching regulators and three internal high voltage switches to produce two high voltage boost converters and a single high voltage inverter. The LT3587 is designed to run from inputs ranging from 2.5V to 6V, making it ideal for battery powered systems. Small package size and low component count produces a small, eficient solution. Typical applications include digital still and video cameras, high performance portable scanners and display systems, PDAs, cellular phones and handheld computers that have high voltage peripherals such as CCD sensors, LED backlights, LCD displays or OLED displays. Features To keep the component count low, the LT3587 integrates three high voltage power switches capable of switching 0.5A, 1A and 1.1A at up to 32V in a 3mm × 3mm QFN package. Each of the positive channels includes an output disconnect to prevent a direct DC path from input to output when LED DRIVER 20mA UP TO 24V RVFB3 1.65M (OPTIONAL) C4 2.2µF DS3 VFB3 VOUT3 CAP3 L4 10µH SW3 L1 15µH VIN C6 1µF SW1 RIFB3 8.06k IFB3 CFB1 2.7pF FLT RFB1 1M EN/SS1 FB1 EN/SS3 SW2 C5 100nF VVIN 2.5V TO 6V Triple-Output Supply for CCD Imager and LED Backlight DS1 C1 10µF CAP1 LT3587 C3 100nF VVIN 2.5V TO 6V L2 15µH C2 2.2µF GND L3 15µH DS2 C1: MURATA GRM21BR61C106KE15L C2: MURATA GRM188R61C225KE15D C3, C5: MURATA GRM033R60J104KE19D C4: MURATA GRM21BR71E225KA73L C6: MURATA GRM155R61A105KE15D C7: TAIYO YUDEN LMK212BJ226MG-T FB2 CCD POSITIVE 15V 50mA VOUT1 RFB2 1M CFB2 6.8pF C7 22µF CCD NEGATIVE –8V 100mA CFB1: MURATA GRM1555C1H2R7BZ01D CFB2: MURATA GRM1555C1H6R8BZ01D L1, L2, L3: SUMIDA CDRH2D18/HP-150N L4: TOKO 1071AS-100M DS1, DS2, DS3: IR IR05H40CSPTR Figure 1. Solution for a Li-Ion powered camera provides positive and negative supplies for biasing a CCD imager and an LED driver for a 5-LED backlight 20 the switches are disabled. The LT3587 also includes a bidirectional fault pin (FLT), which can be used for fault indication (output) or for emergency shutdown (input). The LT3587 offers a wide output range, up to 32V for the positive channels (channels 1 and 3) and –32V for the inverter (channel 2). Channel 3 is conigurable as either a voltage or current regulator. When conigured as a current regulator, channel 3 uses a 1-wire output that requires no current sense or high current ground return lines, easing board layout. A single resistor programs each of the three channels output voltage levels and/or the channel 3 output current level. Intelligent soft-start allows for sequential soft-start of channel 1 followed by the inverter negative output using a single capacitor. Internal sequencing circuitry disables the inverter until channel 1 output has reached 87% of its inal value. Figure 1 shows a typical application providing a positive and negative voltage bias for a CCD imager and a 20mA current bias for an LED backlight. All three channels of the LT3587 use a constant frequency, current mode control scheme to provide voltage and/or current regulation at the output. The positive CCD bias is conigured as a simple non-synchronous boost converter. Its output voltage is set to 15V via the feedback resistor RFB1. The 15µH inductor (L1) is sized for a maximum load of 50mA. The negative CCD bias is conigured as a non-synchronous Ćuk converter. Its output voltage is set at –8V using the feedback resistor RFB2. The two 15µH Linear Technology Magazine • January 2009 DESIGN FEATURES L VEN/SS1 2V/DIV IVIN 500mA/DIV VVOUT1 10V/DIV VNEG 10V/DIV VEN/SS1 2V/DIV 0V IVIN 500mA/DIV 0mA 0V VVOUT1 10V/DIV 0V VNEG 10V/DIV 0mA 0V 0V 400µs/DIV 4ms/DIV Figure 2. Start-up waveforms with no soft-start capacitor, and with a 10nF soft-start capacitor (L2 and L3) inductors are sized for a maximum load of 100mA. The LED backlight driver is conigured as an output-current-regulated boost converter. Its output current is set at 20mA using the current programming resistor RIFB3. The 10µH inductor (L4) is sized for a typical load of 20mA at up to 24V. Note the optional voltage feedback resistor, RVFB3, on the LED driver. This resistor acts as a voltage clamp on the LED driver output, so that if one of the LED fails open, the voltage on the LED driver output is clamped to 24V. Soft-Start All channels feature soft-start (a slow voltage ramp from zero to regulation) to prevent potentially damaging large inrush currents at start-up. Softstart is implemented via two separate soft-start control pins: EN/SS1 and EN/SS3. The EN/SS1 pin controls the soft-start for channel 1 and the inverter, while the EN/SS3 pin controls the soft-start for channel 3. Both of these soft-start pins are pulled up with a 1µA internal current source. A capacitor from the EN/SS1 pin to ground (C3 in Figure 1) programs a soft-start ramp for channel 1 and channel 2 (the inverter). As the 1µA current source charges up the capacitor, the regulation loops for channel 1 and channel 2 are enabled when the EN/SS1 pin voltage rises above 200mV. During start-up, the peak switch current for channel 1 proportionally rises with the soft-start voltage ramp at the EN/SS1 pin. The inverter switch current also follows the voltage ramp at the EN/SS1 pin, but its switch current ramp does not start until the Linear Technology Magazine • January 2009 voltage on the EN/SS1 pin is at least 600mV. This ensures that channel 2 starts up after channel 1. Channel 1 and channel 2 regulation loops are free running with full inductor current when the voltage at the EN/SS1 pin is above 2.5V. In a similar fashion, a capacitor from the EN/SS3 pin to ground (C5 in Figure 1) sets up a soft-start ramp for channel 3. When the voltage at the EN/SS3 pins goes above 200mV, regulation loop for channel 3 is enabled. When the voltage at the EN/SS3 pin is above 2V, the regulation loop for channel 3 is free running with full inductor current. Start-Up Sequencing The LT3587 also includes internal sequencing circuitry that inhibits the channel 2 from operating until the feedback voltage of channel 1 (at the FB1 pin) reaches about 1.1V (about 87% of the inal voltage). The size of the soft-start capacitor controls channel 2 start-up behavior. If there is no soft-start capacitor, or a very small capacitor, then the negative channel starts up immediately with full inductor current when the positive output reaches 87% of its inal value. If a large soft-start capacitor is used, then the EN/SS1 voltage controls the inverter channel past the point of regulation of the positive channel. Figure 2 shows the start-up sequencing without soft-start and with a 10nF soft-start capacitor. Output Disconnect Both of the positive channels (channels 1 and 3) have an output disconnect between their respective CAP and VOUT pins. This disconnect feature prevents a DC path from forming between VIN and VOUT through the inductors when switching is disabled (Figure 1). For channel 1, this output disconnect feature is implemented using a PMOS (M1) as shown in the partial block diagram in Figure 3. When turned on, M1 normally provides a low resistance, low power dissipation path for delivering output current between the CAP1 pin and the VOUT1 pin. M1 is on as long as the voltage difference between CAP1 and VIN is greater than 2.5V. This allows the positive bias to stay high as long as possible while the negative bias discharges during turn off. LT3587 OVERVOLTAGE PROTECTION CAP3 CAP1 M2 C1 C4 M3 M1 VOUT3 VOUT1 DISCONNECT CONTROL SHDN1 TO INTERNAL CIRCUIT DISCONNECT CONTROL SHDN3 IFB3 RIFB3 Figure 3. Partial block diagram of the LT3587 showing the disconnect PMOS for channels 1 and 3 21 L DESIGN FEATURES IVOUT1 500mA/DIV IVOUT3 500mA/DIV 0mA IL1 500mA/DIV VCAP1 10V/DIV VVOUT1 10V/DIV IL4 500mA/DIV VCAP3 10V/DIV 15V 15V VVIN = 3.6V C1 = 4.7µF 40µs/DIV VCAP3 10V/DIV 24V VVIN = 3.6V C4 = 1µF 40µs/DIV Figure 5. Channel 3 short circuit condition with and without 20mA current limit PART RESET ENSS1/ENSS3 5V/DIV VNEG 10V/DIV 24V VVOUT3 10V/DIV 40µs/DIV VFLT 5V/DIV VVOUT1 10V/DIV 0mA IL4 500mA/DIV VVOUT3 10V/DIV Figure 4. Channel 1 short circuit event VFLT 5V/DIV FLT FORCED LOW PART RESET ENSS1/ENSS3 5V/DIV VVOUT1 10V/DIV SHORT AT VOUT1 VNEG 10V/DIV VVOUT3 20V/DIV VVOUT3 20V/DIV 100ms/DIV Figure 6. Fault detection of a short circuit event The disconnect transistor M1 is current limited to provide a maximum output current of 155mA. There is also a protection circuit for M1 that limits the voltage drop across CAP1 and VOUT1 to about 10V. When the voltage at CAP1 is greater than 10V, such as during an output overload or short circuit to ground, then M1 is set fully on, without any current limit, to allow for the voltage on CAP1 to discharge as fast as possible. When the voltage across CAP1 and VOUT1 reduces to less than 10V, the output current is then again limited to 155mA. Figure 4 shows the output voltage and current during an overload event with VCAP1 initially at 15V. The output disconnect feature on channel 3 is implemented similarly using M3 (Figure 3). However, in this case M3 is only turned off when the EN/SS3 pin voltage is less than 200mV and the regulation loop for channel 3 is disabled. The disconnect transistor M3 is also current limited, providing a maximum output current at VOUT3 of 100mA. M3 also has a similar protection circuit as M1 that limits the voltage drop across CAP3 and VOUT3 to about 10V. Figure 5 22 IVOUT3 500mA/DIV 0mA 100ms/DIV Figure 7. Waveforms for when the FLT pin is externally forced low Fault Detection and Indicator The LT3587 is a versatile, highly integrated device that provides a compact solution for devices such as cameras, handheld computers and terminals requiring multiple high voltage supplies. A low part count and a 3mm × 3mm package keep the solution size small. High efficiency conversion makes it suitable for battery powered applications. Adjustable output voltage and wide output range of up to 32V for the positive boosts, and –32V for the inverter, make it a flexible solution for systems that require high voltage supplies. shows the output voltage and current during an overload event with VCAP3 initially at 24V. The LT3587 features fault detection on all outputs and a fault indicator pin, FLT. The fault detection circuitry is enabled only when at least one of the channels has completed the soft-start process and is free running with full inductor current. Once fault detection is enabled, if any of the enabled channel feedback voltages (VFB1, VFB2 or the greater of VVFB3 and VIFB3) falls below its regulation value for more than 16ms, the FLT pin pulls low. One particularly important case is an overload or short circuit condition on any of the outputs. In this case, if the corresponding loop is unable to bring the output back into regulation within 16ms, a fault is detected and the FLT pin pulls low. Note that the fault condition is latched—once activated all three channels are disabled. Enabling any of the channels requires resetting the part by shutting it down (forcing both the EN/SS1 and EN/SS3 pins low below 200mV) and then on again. Figure 6 shows the waveforms when a short circuit condition occurs at channel 1 for more than 16ms and the subsequent resetting of the part. Linear Technology Magazine • January 2009 DESIGN FEATURES L VVIN 2.5V TO 5V 10µH VVIN 2.5V TO 5V 10µH VIN SW3 1µF VIN SW3 LT3587 LT3587 VOUT3 IFB3 DAC LTC2630 VDAC-OUT 1µF CAP3 CAP3 VOUT3 LED DRIVER IFB3 EN/SS3 LED DRIVER EN/SS3 RIFB3 8.06k RIFB3 8.06k 2.5V PWM FREQ MN1 Si1304BDL 0V Figure 8. Analog dimming using a DAC and a resistor Besides acting as a fault output indicator, the FLT pin is also an input pin. If this pin is externally forced below 400mV, the LT3587 behaves as if a fault event has occurred and all the channels turn off. In order to turn the part back on, remove the external voltage that forces the pin low and reset the part. Figure 7 shows the waveforms when the FLT pin is externally forced low and the subsequent resetting of the part. Dimming Control for Channel 3 as a CurrentRegulated LED Driver As shown in Figure 1, one of the most common applications for the channel 3 is as a current regulator for a backlight LED driver. In many high end display applications requiring an LED backlight, the ability to dim the display brightness is crucial for implementing a power saving mode or to maintain contrast in different ambient lighting conditions. There are two different ways to implement a dimming control of the LED string. LED current can be adjusted by either using a digital to analog converter (DAC) and a resistor RIFB3 or by using a PWM signal. Analog Dimming Using a DAC and a Resistor For some applications, the preferred method of brightness control is using a DAC and a resistor. This method Linear Technology Magazine • January 2009 Figure 9. Driver for six LEDs with PWM dimming is more commonly known as analog dimming. This method is shown in Figure 8. Since the programmed VOUT3 current is proportional to the current through RIFB3 , the LED current can be adjusted by changing the DAC output voltage. A higher DAC output voltage level results in lower LED current and hence lower overall brightness. For accurate dimming control, keep the DAC output impedance low enough to sink approximately 1/200 of the desired maximum LED current. Note the maximum possible output current is limited by the output disconnect current limit to 100mA. PWM Dimming One problem with analog dimming as described above is that changing the forward current lowing in the LEDs not only changes the brightness intensity of the LEDs, it also changes the color. This is a problem for applications IVOUT3 13mA/DIV 0mA IL4 200mA/DIV 0mA ENSS3 5V/DIV 0V VVIN = 3.6V 6 LEDs 2ms/DIV Figure 10. PWM dimming waveforms that cannot tolerate any shift in the LED chromaticity. Controlling the LED intensity with a direct PWM signal allows dimming of the LEDs without changing the color. A PWM frequency of ~80Hz or higher guarantees that there is no visible licker. The amount of on-time in the PWM signal is proportional to the intensity of the LEDs. The color of the LEDs remains unchanged in this scheme since the LED current value is either zero or a constant value (IVOUT3 = 160V/RIFB3). Figure 9 shows an LED driver for six white LEDs. If the voltage at the CAP3 pin is higher than 10V when the LED is on, direct PWM dimming method requires an external NMOS. This external NMOS is tied between the cathode of the lowest LED in the string and ground. The output disconnect feature and the external NMOS ensure that the LEDs quickly turn off without discharging the output capacitor. This allows the LEDs to turn on faster. Figure 10 shows the PWM dimming waveforms for the circuit in Figure 9. The time it takes for the LED current to reach its programmed value sets the achievable dimming range for a given PWM frequency. At extreme lower end of the duty cycle, the linear relation between the average LED current and the PWM duty cycle is no longer preserved. The minimum on time is 23 L DESIGN FEATURES chosen based on how much linearity is required for the average LED current. For example for the circuit in Figure 9, to produce approximately 10% deviation from linearity at the lower duty cycle, the minimum on time of the LED current is approximately 320µs (3.2% duty cycle) for a 3.6V input voltage and a 100Hz PWM frequency. The achievable dimming range for this application is then 30 to 1 (approximately the reciprocal of the minimum duty cycle). The dimming range can be signiicantly extended by combining PWM dimming with analog dimming. The color of the LEDs no longer remains constant because the forward current of the LED changes with the output voltage of the DAC. For the six LED application described above, the LEDs can be dimmed irst by modulating the duty cycle of the PWM signal with the DAC output at 0V. Once the minimum duty cycle is reached, the value of the DAC output voltage can be increased to further dim the LEDs. The use of both techniques together allows the average LED current for the six LED application to be varied from 20mA down to less than 1µA (a 20000:1 dimming ratio). Channel 3 Overvoltage and Overcurrent Protection Channel 3 can be conigured either as a voltage regulated boost converter or as a current regulated boost converter. The regulation loop of channel 3 uses the greater of the two voltages at VFB3 and IFB3 as feedback to set the peak current of its power switch. This architecture allows for a programmable current limit on voltage regulation or voltage limit on current regulation. When conigured as a boost voltage regulator, a feedback resistor from the output pin VOUT3 to the VFB3 pin sets the voltage level at VOUT3 at a ixed level. In this case, the IFB3 pin can either be grounded if no current limiting is desired or be connected to ground with a resistor to set an output current limit value (ILIMIT). As briely noted before, the pull up current on the IFB3 pin is controlled to be typically 1/200 of the output load current at 24 Channel 3 can be configured either as a voltage-regulated boost converter or as a current-regulated boost converter. The regulation loop of channel 3 uses the greater of the two voltages at VFB3 and IFB3 as feedback to set the peak current of its power switch. This architecture allows for a programmable current limit on voltage regulation or a voltage limit on current regulation. the VOUT3 pin. In this case, when the load current is less than ILIMIT, channel 3 regulates the voltage at the VFB3 pin to 0.8V. If there is an increase in load current beyond ILIMIT, the voltage at VFB3 starts to drop and the voltage at IFB3 rises above 0.8V. The channel 3 loop then regulates the voltage at the IFB3 pin to 0.8V, limiting the output VVOUT3 5V/DIV IVOUT3 13mA/DIV 15V current at VOUT3 to ILIMIT. Figure 11 compares the transient responses with and without current limit when a current overload occurs. The channel 3 CAP3 pin has over voltage protection. When the voltage at CAP3 is driven above 29V, the channel 3 loop is disabled and SW3 pin stops switching. When conigured as a boost current regulator, a feedback resistor from the IFB3 pin to ground sets the output current at VOUT3 at a ixed level. In this case, if the VFB3 pin is grounded then the over voltage protection defaults to 29V. On the other hand a resistor can be connected from the VOUT3 pin to the VFB3 pin to set an output voltage clamp (VCLAMP) level lower than 29V. In this case, when the voltage level is less than VCLAMP, the channel 3 loop regulates the voltage at the IFB3 pin to 0.8V. On the other hand, when the output load fails open circuit or disconnected, the voltage at IFB3 drops to relect the lower output current and the voltage at VFB3 starts to rise. When the voltage at VOUT3 rises beyond VCLAMP, the voltage at the VFB3 pin goes VVOUT3 5V/DIV 20mA LOAD STEP IVOUT3 13mA/DIV 15V 20mA LOAD STEP IL4 200mA/DIV IL4 200mA/DIV 200µs/DIV VVIN = 3.6V WITHOUT CURRENT LIMIT: IFB3 CONNECTED TO GND VOUT3 STAYS AT 15V, OUTPUT CURRENT INCREASES FROM 20mA TO 40mA 200µs/DIV VVIN = 3.6V WITH 20mA CURRENT LIMIT: RIFB3 = 8.06k OUTPUT CURRENT STAYS AT 20mA, VOUT3 DROPS FROM 15V TO 7.5V Figure 11. Channel 3 in an output current overload event with and without output current limit VVOUT3 10V/DIV 20V OUTPUT LOAD DISCONNECTED IL4 200mA/DIV VVOUT3 10V/DIV 20V OUTPUT LOAD DISCONNECTED IL4 200mA/DIV 200µs/DIV VVIN = 3.6V WITHOUT PROGRAMMED OUTPUT VOLTAGE CLAMP: VFB3 CONNECTED TO GND 200µs/DIV VVIN = 3.6V WITH PROGRAMMED OUTPUT VOLTAGE CLAMP AT 24V Figure 12. Channel 3 in an output open circuit with and without programmed output voltage clamp Linear Technology Magazine • January 2009 DESIGN FEATURES L above 0.8V. The channel 3 loop then regulates the voltage at the VFB3 pin to 0.8V, limiting the voltage level at VOUT3 to VCLAMP. Figure 12 contrasts the transient responses with and without programmed VCLAMP when the output load is disconnected. Adjustable output voltage and wide output range of up to 32V for the positive boosts, and –32V for the inverter, make it a lexible solution for systems that require high voltage supplies. Channel 3’s ability to work as a voltage regulator or as a true 1-wire current Low Input Voltage LED DRIVER 20mA UP TO 12V While the LT3587’s VIN supply voltage range is 2.5V to 6.0V, the inductors can run off a lower voltage. Most portable devices and systems have a separate 3.3V logic supply voltage, which can be used to power the LT3587. This allows the outputs to be powered straight from the lower voltage power source such as two alkaline cells. This coniguration results in higher eficiency. Figure 13 shows a typical digital still camera application powered this way. It has positive and negative CCD supplies and an LED backlight supply. Conclusion The LT3587 is a versatile, highly integrated device that provides a simple solution to devices such as cameras, handheld computers and terminals requiring multiple high voltage supplies. A low part count and a compact 3mm × 3mm package keep the solution size small. High eficiency conversion makes it suitable for battery powered applications. Linear Technology Magazine • January 2009 VFB3 VOUT3 CAP3 L4 10µH 2AA CELLS 2V TO 3.2V L1 15µH SW3 DS1 C1 4.7µF SW1 IFB3 CAP1 CFB1 3.3pF FLT LT3587 EN/SS1 EN/SS3 RFB1 787k FB1 VIN 3.3V SW2 C6 1µF L2 15µH 2AA CELLS 2V TO 3.2V GND C2 2.2µF C1: MURATA GRM21BR61E475KA12L C2: MURATA GRM188R61C225KE15D C4: MURATA GRM188R61E105KA12B C6: MURATA GRM155R61A105KE15D C7: MURATA GRM21BR71A106KE51L CFB2 6.8pF RFB2 1M L3 15µH CCD POSITIVE 15V 10mA VOUT1 FB2 CCD NEGATIVE –8V 20mA C7 10µF DS2 Replace Inductor with Schottky for Smaller Footprint If higher current ripple is tolerable at the output of the inverter (channel 2), replace inductor L3 with a Schottky diode D3 as shown in Figure 14. Since the Schottky diode footprint is usually smaller than the inductor footprint, this alternate topology is recommended for space constrained applications. This topology is only viable if the absolute value of the inverter output is greater than VIN. This Schottky diode is conigured with the anode connected to the output of the inverter and the cathode to the output end of the lying capacitor C2 as shown in Figure 14. C4 1µF DS3 RVFB3 787k (OPTIONAL) RIFB3 8.06k regulator give the LT3587 status as a true all-in-one power supply. Additional features, such as softstart, supply sequencing, output disconnect and fault handling also add to the versatility of this part and further simplify power supply design. L CFB1: MURATA GRM1555C1H3R3BZ01D CFB2: MURATA GRM1555C1H6R3BZ01D L1, L2, L3: SUMIDA CDRH2D18/HP-150N L4: TOKO 1071AS-100M DS1, DS2, DS3: NXP PMEG2005EB Figure 13. Two AA cells produce CCD positive and negative supplies and a driver for a 3-LED backlight. OLED DRIVER 16V 20mA C4 1µF RVFB3 1.07M RIFB3 7.15k (OPTIONAL) VOUT3 VFB3 L4 10µH DS3 CAP3 SW3 L1 15µH VIN C6 1µF C1 DS1 4.7µF SW1 CAP1 IFB3 CFB1 2.7pF LT3587 FLT EN/SS1 EN/SS3 C3 100nF C5 100nF VVIN 2.5V TO 6V VVIN 2.5V TO 6V L2 15µH FB1 GND SW2 C2 2.2µF DS2 C1: TAIYO YUDEN TMK212BJ475KG-T C2: TAIYO YUDEN EMK107BJ225KA-T C3, C5: TAIYO YUDEN JMK063BJ104KP-F C4: TAIYO YUDEN GMK107BJ105KA-T C6: TAIYO YUDEN LMK105BJ105KV-F VOUT1 FB2 D3 RFB1 1M RFB2 1M CFB2 6.8pF C7 22µF CCD POSITIVE 15V 50mA CCD NEGATIVE –8V 100mA C7: TAIYO YUDEN LMK212BJ226MG-T CFB1: TAIYO YUDEN EMK105SK2R7JW-F CFB2: TAIYO YUDEN EMK105SH6R8JW-F L1, L2: SUMIDA CDRH2D18/HP-150N L4: TOKO 1071AS-100M DS1, DS2, DS3, D3: NXP PMEG2005EB Figure 14. Li-ion driver for an OLED panel and a CCD imager with a Schottky diode replacing the inverter’s output inductor 25 L DESIGN FEATURES PD Interface for PoE+ Includes 25.5W Classification and Protection Features in a Low Profile 4mm × 3mm DFN by Kirk Su Introduction Overview of the Third Generation Power over Ethernet System (PoE+) The Power over Ethernet (PoE) standard speciies how DC power can be distributed alongside high speed data through a single RJ45 connector. The second generation standard (IEEE 802.3af) allows Powered Devices (PDs) to draw 12.95W from Power Sourcing Equipment (PSEs). The popularity of the standard has PD equipment vendors running up against the 12.95W power limit. To answer the call for more power, the newer IEEE 802.3at standard (also called PoE+) establishes a high power allocation while maintaining compatibility with the existing IEEE 802.3af systems. In the new standard, PSEs and PDs are distinguished as Type-1 if they comply with the IEEE 802.3af power levels, or Type-2 if they comply with the IEEE 802.3at power levels. The maximum available power to a Type-2 PD is 25.5W. The IEEE 802.3at standard also establishes a new method for Type-2 equipment to mutually identify each other while maintaining compatibility with the existing PoE systems. A Type-2 PSE has the option of declaring the presence of high power by performing 2-event classiication (Layer 1) or by communicating with the PD over the data line (Layer 2). In turn, a Type-2 PD must recognize both layers of communications and identify a Type-2 PSE before beginning 25.5W operations. L 26 GND (V) 40 1st CLASS 2nd CLASS 30 ON UVLO 20 10 DETECTION V1 DETECTION V2 1st MARK 2nd MARK INRUSH PD CURRENT No additional external components are required to program the LTC4265 since all features (signature resistance, UVLO, OVLO, inrush current, and thermal protection) are built in and programmed into the LTC4265 50 LOAD, ILOAD 1st CLASS 2nd CLASS 40mA TIME DETECTION V1 DETECTION V2 50 GND – VOUT (V) The LTC4265 is a PoE PD interface that can identify 2-event classification protocol and present an active signal as required for operation in an IEEE 802.3at-compliant PD. In addition, the LTC4265 may be configured for a variety of auxiliary power options with the aid of the shutdown and signature corrupt features. to guarantee a smooth power-up transition and PD operation with any Power Sourcing Equipment (PSE). This eliminates additional component costs and cumbersome calculations that 1st MARK 2nd MARK dV = INRUSH dt C1 40 30 UVLO ON UVLO 20 T = RLOAD C1 10 TIME TIME GND – T2PSE (V) The third generation Power over Ethernet standard increases the power available to PDs to 25.5W, up from the earlier standard’s 12.95W (see sidebar). In the new standard, a Type-2 (high power) PD must communicate via handshake with Type-2 power sourcing equipment (PSE) to determine that the PSE is capable of providing high power. Type-2 PSEs are backwards compatible to the old standard. The LTC4265 is a PoE PD interface that can identify 2-event classiication (see sidebar) protocol and present an active signal as required for operation in an IEEE 802.3at-compliant PD. In addition, the LTC4265 may be conigured for a variety of auxiliary power options with the aid of the shutdown and signature corrupt features. The LTC4265 is highly integrated and easy to apply, requiring only one classiication programming resistor. –10 –20 –30 –40 TRACKS VIN –50 INRUSH = 100mA ILOAD = RCLASS = 30.9Ω VIN RLOAD GND LTC4265 IIN PSE RCLASS GND RCLASS RLOAD C1 VOUT T2PSE VIN VOUT Figure 1. Example of 2-event classification waveform Linear Technology Magazine • January 2009 DESIGN FEATURES L are required in other power interface products to set thresholds, signature resistance, and current limits. The LTC4265 comes in a low proile, thermally enhanced, 4mm × 3mm DFN package. input voltage into the Mark voltage range of 6.9V to 10V, signaling the 1st Mark event. The PD in the Mark voltage range presents a load current between 0.25mA to 4mA. A Type-2 PSE repeats this sequence, signaling What is 2-Event Classification? ACTIVE-HIGH ENABLE The IEEE 802.3at establishes two ways to communicate the presence of a Type-2 PSE. The Layer 1 approach requires a PSE to perform 2-event classiication, where classiication probing is performed twice. The Layer 2 approach requires the PSE to communicate over the high speed data line. A Type-2 PD is required to recognize a Type-2 PSE using either layer of communication. Layer 1 communication using 2-event classiication is included in the IEEE 802.3at standard for the beneit of PSEs/power injectors which do not have access to the high speed data line. Since Layer 2 communications takes place directly between the PSE and the LTC4265 load, the LTC4265 concerns itself only with recognizing 2-event classiication. Figure 1 shows an example of a 2-event classiication. The 1st classiication event occurs when the PSE presents an input voltage between 14.5V to 20.5V and the LTC4265 presents a class 4 load current. A Type-2 PSE then drops the GND TO PSE VIN TO PD LOAD VOUT GND RS 10k LTC4265 TO PSE R9 100k PWRGD PD LOAD SHDN D9 5.1V MMBZ5231B –54V VIN VOUT ACTIVE-LOW ENABLE GND RS 10k LTC4265 TO PSE R10 100k PWRGD V+ PD LOAD Q1 FMMT2222 D9 MMBD4148 –54V VIN VOUT 4265 F08 Figure 3. Examples of enabling/disabling the PD load via the complementary power good pins 2 3 TX+ T1 TVS + TX– RX+ TO PHY 4 C1 BR1 PD LOAD – RX– 36V SPARE+ GND 7 8 T2PSE TO PD LOAD OPTION 2: SHUNT CONFIGURATION FOR ACTIVE HIGH/OPEN COLLECTOR OUTPUT Figure 2. Interfacing with the Type-2 PSE via the T2PSE pin Linear Technology Magazine • January 2009 LTC4265 + 10k 5 RP VOUT 0.1µF 100V 100k GND VIN VIN RUN ACTIVE-LOW ENABLE 6 V+ –54V PWRGD –54V 1 RP OPTION 1: SERIES CONFIGURATION FOR ACTIVE LOW/LOW IMPEDANCE OUTPUT TO PSE PD LOAD LTC4265 TO PSE RJ45 T2PSE LTC4265 GND V+ LTC4265 –54V the 2nd Classiication and 2nd Mark event occurrence. The Type-2 PSE then applies power to the PD and the LTC4265 charges up the reservoir capacitor C1 with a controlled inrush current. When C1 is fully charged, and the LTC4265 BR2 SPARE– 10k – ISOLATED WALL ADAPTER SHDN VIN VOUT + D1 – T1 = COILCRAFT ETHI-230LD BR1, BR2 = DF1501S Figure 4. Auxiliary power supply. Auxiliary power takes precedence over PoE power (using the SHDN pin). 27 28 3.65k T2P (TO MICROCONTROLLER) VCC 1.2k PS2801-1-L 2k TLV431A 10nF 4.7nF 5.1Ω 2.2nF 2kV 5.1Ω 158k 158k 100pF 332k 82k GND BLANK 10.0k PGND SD_VSEC VOUT T2PSE VIN SHDN 1.5 0.1µF 100V 2 2.5 3 3.5 4 LOAD CURRENT (A) 4.5 42V 50V 57V 5 30.9Ω 1 0.5 70 75 80 85 90 95 65 SMAJ58A RCLASS GND LTC4265 –54V FROM SPARE PAIR –54V FROM DATA PAIR B1100 s 8 PLCS Figure 5. PoE-based self-driven synchronous forward power supply PS22801-1-L 20k 5V 51k GND 0.22µF 22.1k ROSC SS_MAXDC DELAY FB VREF LT1952 SOUT VIN BAS516 10µF 100V + 10µH 2.2µF 100V 237k 10µF 16V 33k VCC 0.1µF BC857BF 33k COMP OC ISENSE 133Ω OUT 10k BAS516 0.1µF BAS516 IRF6217 1.5k 4.7nF 250V 22k FDS2582 • 50mΩ • • PA2431NL BAS516 1mH DO1608C-105 18V PDZ18B GND EFFICIENCY (%) The LTC4265 has three output signals that interface to other blocks within a PD. The Type-2 PSE indicator bit (T2PSE) alerts the PD load that it may consume the full 25.5W available in the new IEEE 802.3at speciication. Two complementary power good pins (PWRGD and PWRGD) are typically used to enable a DC/DC converter after the PD is fully powered. When a Type-2 PSE completes the 2-Event classiication sequence, the LTC4265 recognizes this sequence, and provides an indicator bit, declaring the presence of a Type-2 PSE. The open drain output provides the capability to use this signal to communicate to the PD load. Figure 2 shows two interface options using the T2PSE pin and an optoisolator. The T2PSE pin is active low and connects to the optoisolator to communicate across the isolation barrier. The pull up resistor RP is sized according to the requirements of the optoisolator operating current, the pull-down capability of the T2PSE pin, and the choice of V+. V+ can come from the PoE supply rail (which the LTC4265 GND is tied to), or from the voltage source that supplies power to the DC/DC converter. The former has the advantage of not drawing power unless T2PSE is declared active. Figure 3 shows options for interfacing the LTC4265 power good pin to the PD load, usually via the run/ enable/shutdown pins of a DC/DC converter. The active high PWRGD pin features an open collector output referenced to VOUT, which can interface directly with the run/enable pin of a DC/DC converter. When the PD is powered FDS8880 Interfacing to the LTC4265 5.1Ω FDS8880 1nF 1nF 6.8µH PG0702.682 + declares power good, the T2PSE output presents an active low signal, or low impedance output with respect to VIN, which alerts the PD load that a Type-2 PSE is present and 25.5W applications may operate. In essence, a Type-2 PSE recognizes a Type-2 PD when the PSE classiies the PD and sees a class 4 load current. A Type-2 PD recognizes a Type-2 PSE when the PSE classiies twice. 11.3k 5V 5A 220µF 6.3V PSLVOJ227M(12) L DESIGN FEATURES Linear Technology Magazine • January 2009 T2P (TO MICROCONTROLLER) 47µF 16V + Linear Technology Magazine • January 2009 10k LTV357TA 1 51k GND Figure 6. High efficiency 12V isolated power supply 10k 33pF 0.1µF 38.3k 2.2k PGDLY tON SYNC RCMP VIN 29.4k 3.01k FB VCC 100k ENDLY LT3825 UVLO SHDN SG SG 20Ω 12k VC GND OSC SFST CCMP SENSE– 4.7nF 33mΩ PG SENSE+ FDS2582 15µF 16V PE-68386 4 5 • • 8 1nF 1µF 100Ω SG 2.2nF 2kV 47pF BAS21 BAT54 15Ω 2.2nF FDS3572 15Ω 470pF 2kV • • 150Ω 39k 2.2µF 100V 77 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 LOAD CURRENT (A) 79 81 83 85 89 91 93 87 42V 48V 57V EXCLUDING BRIDGES T2PSE VOUT –54V FROM SPARE PAIR 30.9Ω RCLASS LTC4265 GND 14k 383k 10µF 100V + 10µH SMAJ58A 0.1µF 100V B1100 s 8 PLCS –54V FROM DATA PAIR continued on page 4 GND In many applications, the PD can run from the PoE port and/or from an auxiliary power source such as a wall adapter. Auxiliary power can be injected into an LTC4265-based PD at the input of the LTC4265, the output of the LTC4265, or even the output of the DC/DC converter. Some PD applications may also prioritize the auxiliary supply or the PoE supply, and/or require a seamless transition between PoE and auxiliary power. Figure 4 shows the most common auxiliary power method where auxiliary power is injected between the PD interface and the DC/DC converter. In this example, the auxiliary port injects 48V onto the line via diode D1. The components surrounding the SHDN pin are selected so that the LTC4265 disconnects power to the output when the auxiliary supply reaches 36V. This coniguration is an auxiliarydominant coniguration. That is, the auxiliary power source supplies the power even if PoE power is already present. When the auxiliary power is applied, the PoE channel stops drawing power. The PSE at this point recognizes that the PD does not draw any current and may cease power delivery to the PD. This coniguration also provides a seamless transition from PoE to auxiliary power when auxiliary power MMBT3906 MMBT3904 1µF 16V 20k 10µF 16V 0.33µH • PA2467NL Configuring a PD for Auxiliary Power EFFICIENCY (%) up by the PSE, the PWRGD pin is high impedance with respect to VOUT. An internal 14V clamp protects the DC/DC converter from excessive voltage. The PWRGD pin is also designed to become high impedance when the SHDN pin is invoked in an auxiliary power application. This prevents the PWRGD pin from interfering with the converter operation when auxiliary power is present. The active low PWRGD pin connects to an internal, open drain MOSFET referenced to VIN and can interface directly to the shutdown pin of a DC/ DC converter. When the PD is powered up by the PSE, the PWRGD pin is low impedance with respect to VIN. 12V 2A DESIGN FEATURES L 29 L DESIGN IDEAS Primary-Side Sensing Takes Complexity out of Isolated Flyback Converter Design Introduction Flyback converters are widely used in isolated DC/DC applications, but they are not necessarily a designer’s irst choice. Power supply designers grudgingly choose a lyback out of necessity for electronic isolation; certainly not because they are an easy to design. A lyback converter requires that signiicant design time be devoted to transformer design, a task further complicated by limited off-the-shelf transformer selection and the necessity for customized magnetics. Moreover, the lyback converter has stability issues due to the wellknown right-half-plane (RHP) zero in the control loop, which is further complicated by the propagation delay of an optocoupler. The LT3573 isolated monolithic lyback converter solves many of the design dificulties commonly associDESIGN IDEAS Primary-Side Sensing Takes Complexity out of Isolated Flyback Converter Design ..................30 Tiger Zhou Easy Automotive Power Supplies: Compact Regulator Produces Dual Outputs as Low as 0.8V from 3.6V–36V and is Unfazed by 60V Transients..................................32 Peter J. Andrews High Power 2-Phase Synchronous Boost Replaces Hot Diodes with Cool FETs—No Heat Sinks Required .........................................................35 Narayan Raja, Tuan Nguyen and Theo Phillips 100V Controller in 3mm × 3mm QFN or MSE Drives High Power LED Strings from Just About Any Input ..........................................37 Keith Szolusha Parallel Buck-Boost µModule Regulators to Produce High Current in Sub-2.8mm Height Applications .........................................................40 Judy Sun, Sam Young and Henry Zhang 30 by Tiger Zhou T1 1:1 VIN 5V TO 15V 4.7µF 0.22µF VIN 200k 2k D1 T1 SHDN/UVLO 90.9k D2 LT3573 RFB VOUT+ 5V, 0.2A 47µF VOUT– 27.4k RREF 6.04k TC RILIM SS VC 20k GND SW BIAS 24.9k 10k 0.01µF 2.2nF VIN T1: BH ELECTRONICS, L10-1022 D1: B240A D2: 1N4148W Figure 1. Amazingly simple flyback converter takes advantage of the primary side sensing scheme of the LT3573. Note the absence of an optocoupler. Also note the tiny coupling inductor available from many magnetics vendors. ated with lyback converters by using a primary-side sensing scheme that is capable of detecting the output voltage through the lyback switching node waveform. During the switch off-period, the diode delivers the current to the output, and the output voltage is thus relected to the primary-side of the lyback transformer (or the switch node). The magnitude of the switch node voltage is the summation of the input voltage and relected output voltage. The lyback converter is able to reconstruct the output voltage from the measurement of the switching node voltage during the off period. This scheme has previously proven itself in Linear Technology’s family of photolash capacitor charger ICs. Design is simpliied by getting rid of the optocoupler while maintaining the galvanic isolation between the primary-side and secondary-side of the transformer. The LT3573’s utilization of boundary mode operation further reduces converter size and simpliies system design. The lyback converter turns on the 1.25A, 60V internal switch right after the secondary diode current reduces to zero, while it turns off when the switch current reaches the pre-deined current limit. Thus it always operates at the transition of continuous conduction mode (CCM) and discontinuous conduction mode (DCM), which is called boundary mode. Boundary mode operation also offers a superior load regulation. Other features, such as soft-start, adjustable current limit, undervoltage lockout and temperature compensation further facilitate the lyback converter design. Figure 1 shows a simple flyback converter using LT3573. Primary-Side Sensing Needs No Optocoupler An optocoupler is essential for a traditional lyback converter. It transmits the output voltage feedback signal through an optical link while maintaining an isolation barrier. However, the optocoupler current transfer ratio (CTR) often changes with temperature, degrading accuracy. Also, the optocoupler causes a propagation delay, which impacts the dynamic response of the control loop. The LT3573 eliminates the need for an optocoupler by sensing the output Linear Technology Magazine • January 2009 DESIGN IDEAS L SW VOLTAGE The LT3573 simplifies the design of flyback converters by using a primary-side sensing scheme that detects the output voltage through the flyback switching node waveform. SW CURRENT DIODE CURRENT Figure 2. LT3573 flyback converter in boundary mode. voltage on the primary-side. The output voltage is accurately measured at the primary-side switching node waveform during the off period. In addition to the obvious simpliication and cost savings of this design, this scheme improves dynamic performance during load transients, which further simpliies the control loop design. Figure 2 shows the LT3573 lyback converter voltage and current waveform in boundary mode. Assuming a 1:1 transformer is used; the controlto-output transfer function is: ¥ 1 ´ R ¦ RC s v C µ¶ § 1 D v 1 2 R RC svC Boundary Mode Operation Reduces Converter Size and Simplifies System Design G VC Since the lyback converter operates in boundary mode, the switch is always turned on at zero current and the diode has no reverse recovery loss. Reducing power losses allows the lyback converter to operate at a relatively high switching frequency, which in turn reduces the transformer size when compared to lower frequency operation. Figure 1 shows an isolated lyback using a small coupling inductor with 19µH primary inductance. Another beneit of boundary mode operation is a simpliied control loop. Where R is the load resistor, C is the output capacitor, RC is the ESR of the output capacitor and D is the duty cycle. From this, a load pole at sp 1 RC and ESR zero at sz 1 RCC are observed. This reduced-order transfer function can be easily compensated by an external VC network. T1 3:1:1 VIN 9V TO 30V 4.7µF 0.22µF VIN 357k 2k D1 VOUT 5V, 1A D2 51.1k LT3573 84.5k RFB RREF TC 6.04k RILIM SW SS GND TEST BIAS VC D3 20k 10k 24.9k 0.01µF 2.2nF 1µF Boundary Mode Operation for Superior Load Regulation Since the diode voltage drop is included in the relected output voltage, it can affect load regulation in primary-side sensing lyback converters that operate in CCM. The reason is the diode has nonlinear I-V characteristics. Other methods such as load regulation compensation must be used if a tight load regulation is required. However, the load regulation is much improved in boundary mode operation because the relected output voltage is always sampled at the diode current zero-crossing. The LT3573 lyback converter has a typical 1% load regulation. Figure 3 shows a 5V, 1A lyback converter that accepts a 9V to 30V input. The BIAS winding is used to improve the system eficiency. The TC resistor compensates the output voltage at all temperatures, the UVLO resistors set the intended input range, and the current limit resistor programs the output current. 47µF COM SHDN/UVLO The simpliied control loop network also eases transformer design. The control-to-output transfer function has no inductance component, which means the lyback converter easily tolerates transformer variations. The transformer inductance only affects the converter switching frequency; it does not affect the converter output capability and stability. The data sheet includes a detailed design example, which outlines converter design guidelines. D1: B340A D2: 1N4148W D3: CMDSH-3 T1: PULSE PA2454NL Conclusion The LT3573 simpliies the design of isolated lyback converters with a primary-side sensing scheme and boundary mode operation. Its wide 3V to 40V input range, and its ability to deliver 7W output power make it suitable for industrial, automotive and medical applications. It also includes undervoltage lockout, softstart, temperature compensation, adjustable current limit and external compensation. L Figure 3. A 9V–30V input, 5V/1A flyback converter with a BIAS winding to maximize the system efficiency. Linear Technology Magazine • January 2009 31 L DESIGN IDEAS Easy Automotive Power Supplies: Compact Regulator Produces Dual Outputs as Low as 0.8V from 3.6V–36V and is Unfazed by 60V Transients by Peter J. Andrews Introduction The LT3509 dual channel step-down regulator operates over an impressively vast supply range of 3.6V to more than 36V, but its real distinguishing feature is its ability to handily protect both itself and downstream components from transient input voltages up to 60V. It accomplishes this by entering a safe shutdown mode when the supply exceeds 38V, such as load dump events in automotive electrical systems. In a vehicle electrical system, overvoltage transients can occur when heavy loads are switched because the rapid change in current across the wiring inductance induces a high voltage. These transients are usually short in duration, from several microseconds to several milliseconds. Longer duration voltage surges can happen when the battery is disconnected and the alternator and its regulator must respond to reduce the energizing ield in the rotor. This can take several hundred milliseconds, enough time to damage electronic components and subsystems. 6V TO 36V (TRANSIENT TO 60V) R1 24.9k C4 2200µF + R1 1M R5 100k FAULT Q1 BC847B/C RUN/SS1,2 R3 499k R2 931k Q2 BC847B/C R4 210k Figure 1. LT3509 RUN/SS to FAULT signal interface The LT3509 protects itself and downstream systems from transient overvoltage events by shutting down for the duration of the event. For non-critical systems, that is all the protection that is needed, as long as power is restored relatively quickly. For critical systems that require full functionality during a transient event, a supercapacitor ride-through circuit can continue to provide hold-up power (see Linear Technology Design Note 450 or the cover article from the September 2008 issue of Linear Technology magazine). This article shows a circuit that allows powered systems to ride-through transients without requiring a reset. A Little About the LT3509 The LT3509 integrates popular high voltage features into a compact dual supply solution for a wide range of applications. Each of two channels can produce up to 0.7A at an output voltage as low as 0.8V to within a C1 4.7µF L1 3.3µH VOUT1 1.8V 700mA VIN 6V TO 16V (TRANSIENT TO 60V) VOUT 3.3V C2 0.1µF VIN BD BOOST1 BOOST2 SW1 L2 C3 0.1µF 6.8µH VOUT2 3.3V 700mA SW2 LT3509 D1 C5 10µF D2 DA1 DA2 FB1 FB2 R5 931k RUN/SS1 RUN/SS2 R2 20k D1, D2 = DFLS160 Q1, Q2 = BC847B/C R4 1M C6 2.2nF SYNC C7 2.2nF RT GND R3 61.9k R9 69.8k R8 100k Q1 R6 210k R7 499k + C9 1000µF FAULT Q2 R10 22.1k C8 10µF fSW = 700kHz Figure 2. 12V auto battery to 3.3V and 1.8V with hold-up capacitors and FAULT indicator 32 Linear Technology Magazine • January 2009 DESIGN IDEAS L half a volt of the input supply. It has integrated BOOST diodes and internal compensation to minimize the component count and the required board area. Robust short-circuit protection is also provided using catch diode current sensing. The ride-through feature is particularly useful in automotive applications, as is the wide operating frequency range of 300kHz to 2.2MHz and the ability to synchronize to an external reference clock. The switching frequency can be chosen or externally driven to meet stringent EMI requirements. Riding Through Supply Transients One way to reduce the ride-through energy storage requirements is to provide a FAULT signal to the powered systems so that that they can enter a low power state for the duration of the event. For example a microcontroller could enter a HALT state, digital circuitry could stop or reduce the clock frequency, displays could be blanked and audio circuits muted. This reduces the power draw to a minimum so that the output voltages can be maintained with relatively small electrolytic capacitors. The LT3509 itself does not provide a dedicated logic signal to indicate that an overvoltage event has occurred but it is possible to detect the event by monitoring the RUN/SS pins. These pins are pulled low by an internal device whenever an overvoltage condition exists, but as they were not intended to drive logic directly a small interface circuit is required as shown in Figure 1. The RUN/SS IL 0.5A/DIV VOUT 5V/DIV TIME 1ms/DIV Figure 3. Soft-start waveforms pins are pulled up to approximately 3.0V by an internal 1µA pull-up in normal operation and are pulled to about 0.6V during a fault condition. This circuit has a switching threshold of around 1.4V and draws very little input current. The circuit operates at a very low current and the transistors were carefully selected—generic types may not give satisfactory performance. Q1’s collector must be supplied from VIN with a resistor divider as shown. If connected to VOUT, the collector base junction will be forward biased at power-up and thus preventing the LT3509 from starting up. The resistor divider keeps the collector-emitter voltage of Q1 below its breakdown voltage. Automotive Accessory Supply 3.3V and 1.8V with Ride-Through Capability The schematic in Figure 2 shows a typical application for a dual supply system requiring 3.3V and 1.8V rails, such as a radio or satellite navigation system. The goal is to maintain support for a ride-through capability described in the introduction where the output voltage is maintained just 14.2V NOMINAL (TRANSIENT TO 60V) 60V 14.2V VSW 20V/DIV TRANSIENT OVERVOLTAGE GENERATOR CONTROL PULSE VOUT, 3.3V LT3509 FIGURE 2 APPLICATION CIRCUIT FAULT SIGNAL Figure 4. Test and demonstration set-up Linear Technology Magazine • January 2009 CONTROLLABLE LOAD CIRCUIT OFF long enough for the powered circuitry to enter a low current state. The key features are that it includes the fault indication circuit of Figure 1 and the standard 10µF ceramic output capacitors C5 and C8 are augmented with 1000µF electrolytic capacitors C4 and C9. The ceramic capacitors should still be used to control high frequency ripple as they have much lower ESR than the electrolytic types. The operating frequency is kept low to ensure that the 1.8V channel operates in ixed frequency mode at the normal operating voltage. The output capacitors have to support the output voltage while the regulator shuts off due to an overvoltage ride-through event. They must also supply the full load current for the time taken from the start of the overvoltage event until the load is put in a powered down state. The delay time from the overvoltage condition until the fault signal is asserted is dependent on the capacitor value on the RUN/SS pin. With the component values in the example circuit this is approximately 40µs. To this must be added any time for the powered circuit to shut down. The voltage droop during this time can be calculated from ΔV = I • t/C. So for 700mA, 40µs and 1000µF gives ΔV = 0.7A • 40µs/1000µF = 28mV. Once the powered circuits have shut down, the droop rate depends on the residual current draw and the duration of the transient event. In an ideal case the system power should reduce to a few µA in which case the dominant current draw will be from the feedback divider, which in the example circuit takes around 37µA. Using the same equation, for a 400ms event, the droop during the transient is: ΔV = 40µA • 0.4s/1000µF = 16mV. Clearly the biggest droop occurs during the initial loss of power. One last thing to consider is what happens when the transient is inished and normal operation resumes. The FAULT signal de-asserts as soon as the RUN/SS pin rises above the threshold, but the regulator is not able to deliver full current until the RUN/SS pin reaches approximately 2V. It may be necessary to create a small delay, 33 L DESIGN IDEAS VIN 20V/DIV VIN 20V/DIV VIN 20V/DIV VOUT 1V/DIV VOUT 1V/DIV VOUT 1V/DIV RUN/SS2 2V/DIV RUN/SS2 2V/DIV RUN/SS2 2V/DIV FAULT 2V/DIV FAULT 2V/DIV FAULT 2V/DIV TIME 100µs/DIV Figure 5. Transition to ride-through mode by software perhaps, from the time FAULT goes away until full current is demanded. The LT3509 prevents inrush currents at start-up with a current limiting soft-start feature, which allows the available output current to ramp up slowly. Both the peak current limit and the valley current limit (the one sensed through the catch diodes) are controlled by the voltage on the RUN/SS pins, so as capacitors C6 and C7 charge up, the output current slowly increases to its normal maximum value. An example of the soft-start characteristic is shown in Figure 3. TIME 2ms/DIV TIME 100ms/DIV Figure 6. Complete ride-through event Demonstration and Test Results The ride-through performance the application of Figure 1 is tested using the setup shown in Figure 4. A switched supply produces either a normal input or an overvoltage transient. The output is connected to an active load circuit with ON/OFF controlled by the FAULT signal. Figure 5 shows the start of the overvoltage event on a fast time base to show the step that occurs as the regulator shuts off, but before the load is reduced. Figure 6 shows the entire 400ms transient and the droop that happens when there is no output but also very little load. Figure 7 shows Figure 7. End of ride-through event the end of the event on an expanded timescale. Conclusion Overvoltage transients are a fact of life in automobile and industrial power systems. The LT3509, combined with a small, low cost capacitor, can be used to both protect components from overvoltage transients and allow the downstream systems to ride through the event without having to completely reset. It is possible to ride through an overvoltage transient of even several hundred milliseconds, provided a brief interruption of service can be tolerated. L LTC4265, continued from page 29 is applied. That is, the DC/DC converter continues to operate through the power transition. But the transition from auxiliary power to PoE power (when the auxiliary is removed) is not seamless since a PSE must redetect the PD before applying power. Guidelines for Pairing the LTC4265 with a DC/DC Converter The LTC4265 can be paired with just about any DC/DC converter, but two are particularly well suited to Type-2 Power over Ethernet Applications: the LT3825 lyback controller and LT1952 forward controller. Forward and lyback converters satisfy the electronic isolation requirement in the IEEE 802.3af and IEEE 802.3at speciications. In addition to the topology requirements, the LT3825 and LT1952 controllers are selected based on their ability to tolerate the wide PoE line voltage range, which varies from 36V to 57V. 34 As PoE power levels increase, the Schottky diode typically placed at the output of the secondary winding becomes an eficiency drain as it dissipates more power with increased output current. In addition, the output diode requires a considerably large heat sink and board area to displace the heat. For these reasons, many powerhungry PDs are better served by synchronous DC/DC topologies, where the output diode is replaced with an active switch synchronized to the operation of the controller. Both the LT3825 and LT1952 include built-in synchronous drivers, enabling the use of an active switch. Figure 5 shows the LTC4265 paired with an LT1952 in a self-driven synchronous forward power supply coniguration. Figure 6 shows the LTC4265 paired with a LT3825. This is a synchronous lyback power supply coniguration with no optoisolator feedback. The LT3825 may also be conigured for a forward topology. These are not the only DC/DC converter solutions that work well with the LTC4265. The LTC4265 can be easily applied in applications that already have a DC/DC converter. Conclusion The LTC4265 PD interface provides the features required in a PD interface to operate under the IEEE 802.3at standard with minimum component count. Since all of the features (signature resistance, UVLO, OVLO, inrush current, and thermal protection) are built in, little is needed around its low proile 4mm × 3mm DFN package to create a complete PoE Type-2 interface. Simply pair it with a PoE-ready DC/DC converter by hooking up the Type-2 and power good indicator pins, and a high power PD is ready to go. Add to this the ability to handle auxiliary power, and the LTC4265 proves a versatile PoE+ tool. L Linear Technology Magazine • January 2009 DESIGN IDEAS L High Power 2-Phase Synchronous Boost Replaces Hot Diodes with Cool FETs—No Heat Sinks Required by Narayan Raja, Tuan Nguyen and Theo Phillips Introduction For low power designs, non-synchronous boost converters offer a simple solution. However, as power levels increase, the heat dissipated in the boost diode becomes a signiicant design problem. In such cases, a synchro- nous boost converter, with the diode replaced with a lower forward voltage drop switch, signiicantly improves eficiency and relieves many issues with thermal layout. Although the topology is more complicated, Linear Technol- ogy offers controller ICs that simplify the design of high power synchronous boost applications. The LTC3782A boost controller, for instance, includes pre-drive outputs for external synchronous switch drivers. It also integrates 5V PD3S160 Q1 VCC 1µF 4.7µF VIN 10V TO 14V + SGATE1 TG 1µF IN TS DFLS160 L1 8.3µH BG1 BG1 Q2 53.6k 1% Q3 SGATE2 BGATE1 BG1 SGATE1 BGATE2 BG2 0.008Ω 0.008Ω – SENSE1 RUN 10Ω SYNC GBIAS DELAY GBIAS1 DCL GBIAS2 L2 8.3µH 5V PD3S160 Q4 SENSE1+ 2.2nF SENSE1– 4.7µF SENSE1– SENSE2– 2.2nF VCC 1µF BST VEE1 GND TG VEE2 IN TS RSET GND DFLS160 1µF LTC4440-5 SLOPE SGATE2 SENSE2– SENSE2+ FB BG2 0.008Ω 0.01µF 0.1µF 220pF 60.4k Q5 BG2 Q6 SENSE2+ VC SS 0.008Ω SENSE2– 15k 6.8nF 51.1k + SENSE1+ LT3782A 30.9k VOUT 24V AT 8A 680µF SENSE1+ 22pF 10µF s4 475k 1% 825k VCC1 SGATE2 GND SGATE1 10µF s4 680µF BST LTC4440-5 316k 10Ω SENSE2+ Q1–Q6 = HAT2266 Figure 1. Compact high power boost application efficiently produces a 24V/8A output from a 10V–15V input. Linear Technology Magazine • January 2009 35 L DESIGN IDEAS 100 97 94 10 VIN = 12V 93 VIN = 24V 92 POWER LOSS 91 90 1 1 Figure 2. Layout of the circuit in Figure 1. Note that no heat sinks are needed, even at the high power levels produced by this relatively compact circuit. strong bottom switch drivers for high gate charge high voltage MOSFETs and uses a constant frequency, peak current mode architecture to produce high output voltages from 6V to 40V inputs. Its 2-phase architecture keeps external components small and low proile. Synchronous Operation At high current levels, a boost diode dissipates a signiicant amount of power, while a synchronous switch can burn far less. It all comes down to the forward voltage drop. The power dissipated in the boost diode is IIN • VD, while the power dissipated by the synchronous switch is I2IN • RDS(ON). (or IIN • VDS(ON)). A typical sub-10mΩ MOSFET running 10A dissipates 1W, while the 0.5V drop of a typical a. Thermal image of the board in Figure 2 built up with synchronous FETs 2 5 3 4 LOAD CURRENT (A) 6 7 Figure 3. Efficiency and power loss of the circuit in Figure 1 compared to the efficiency of the circuit when the synchronous FETs are replaced with non-synchronous boost diodes. Schottky diode burns a whopping 5W. Because the forward drop of a synchronous MOSFET is proportional to the current lowing through it, FETs can be paralleled to share current and drastically reduce power dissipation. On the other hand, paralleling boost diodes does little to reduce power dissipation as the forward drop through the diodes holds fairly constant. The non-synchronous boost diode topology is more than just ineficient relative to a synchronous solution—the extra heat generated in a boost diode must go somewhere, necessitating a larger package footprint and heat sinking. At high power levels, a non-synchronous boost application becomes larger in size and higher in cost over a synchronous solution. COOL FETs POWER LOSS (W) VIN = 12V 95 EFFICIENCY (%) VIN = 24V EFFICIENCY 96 Multiphase Operation Reduces Application Size There are a number of good reasons to choose a multiphase/multi-channel DC/DC converter over an equivalent single-phase solution, including reduced EMI and improved thermal performance, but the biggest advantage can be a signiicant reduction in application size. Although a 2-phase solution requires more components, two inductors and two MOSFETs instead of one, it offers a net reduction in space and cost. This is because the inductors and MOSFETs are more than proportionally smaller than those required in the single-phase solution. Moreover, because the switching signals are mutually anti-phase, their output ripples tend to cancel each continued on page 9 HOT DIODES HEAT UP THE WHOLE BOARD b. Thermal image of the board in Figure 2 built up with boost diodes Figure 4. The board in Figure 2 runs fairly cool (a), but when the synchronous FETs are replaced with boost diodes, the entire board heats up considerably with the diodes running significantly hotter than the FETs (b). (VIN = 12V, ILOAD = 6A, two minutes after power up.) 36 Linear Technology Magazine • January 2009 DESIGN IDEAS L 100V Controller in 3mm × 3mm QFN or MSE Drives High Power LED Strings from Just About Any Input by Keith Szolusha Introduction Strings of high power solid-state LEDs are replacing traditional lighting technologies in large area and high lumens light sources because of their high quality light output, unmatched durability, relatively low lifetime cost, constant-color dimming and energy eficiency. The list of applications grows daily, including LCD television backlights and projection system bulbs, industrial and architectural lighting systems, automotive headlamps, taillights and indicator lights, computer monitors, street lights, billboards and even stadium lights. As the number of applications expands, so does the complexity of input requirements for the LED drivers. LED drivers must be able to handle wide ranging inputs, including the harsh transient voltage environment presented by automotive batteries, the wide voltage range of the Li-ion cells and wallwart voltages. For LED lighting manufacturers and designers, applying a different LED driver for each application means stocking, testing and designing with a wide variety of LED controllers. This can be an expensive and time-consuming proposition. It would be far better to use a controller that can be applied to many solutions. The LT3756 high voltage LED driver features a unique topological versatility that allows it to be used in boost, buck-boost mode, buck mode, SEPIC, lyback and other topologies. Its high power capability provides potentially hundreds of watts of steady-state LED power over a very wide input voltage range. Its 100V loating LED current sense inputs allow the LED string to loat above ground, as shown in the buck mode and buck-boost mode topologies in this article. Excellent PWM dimming architecture produces high dimming ratios, up to 3000:1. Linear Technology Magazine • January 2009 L1A, B 22µH 2× VIN = PVIN 40V TO 60V (LED CURRENT REDUCED WHEN VIN < 40V) 2.2µF 100V ×2 499k SHDN/UVLO OVP = 95V FB VREF ISP 1M 24.3k LT3756 0.068Ω CTRL Q1A, B GATE SENSE OPENLED 0.018Ω 100k 0.1µF 10k 42.2k 250kHz 1% ILED 1.5A ISN 30.9k INTVCC 2.2µF 100V ×5 1.8M VIN 23.2k PDS5100 PWM SS RT VC 83V LED STRING PWMOUT GND INTVCC 10k Si7322DN 4.7µF 4700pF L1 = 2× SERIES SLF12575T-220M4R0 Q1 = 2× PARALLEL Si7322DN Figure 1. A 125W, 83V at 1.5A, 97% efficient boost LED driver for stadium lighting A number of features protect the LEDs and surrounding components. Shutdown and undervoltage lockout, when combined with analog dimming derived from the input, provide the standard ON/OFF feature as well as a reduced LED current should the battery voltage drop to unacceptably low levels. Analog dimming is accurate and can be combined with PWM dimming for an extremely wide range of brightness control. The soft-start feature prevents spiking inrush currents during start-up. The OPENLED pin informs of open or missing LEDs and the SYNC (LT3756-1) pin can be used to sync switching to an external clock. The 16-pin IC is available in a tiny QFN (3mm × 3mm) and an MSE package, both thermally enhanced. For applications with lower input voltage requirements, the 40VIN, 75VOUT LT3755 LED controller is a similar option to the LT3756. Although it is typically used as an LED driver, the LT3756’s voltage FB pin provides a well-regulated output voltage if the constant current sense voltage is not used. This is a side beneit of the LT3756’s overvoltage protection feature, in which the current control loop is superceded by the FB voltage loop in the case of an open LED string, thus preventing the controller from a running up the voltage in an effort to maintain current. 125W Boost LED Driver for Stadium Lights or Billboards Lighting systems for stadiums, spotlights and billboards require huge strings of LEDs running at high power. The LT3756 controller can drive up to 100V LED strings with its loating sense resistor inputs ISP and ISN. The 125W LED driver in Figure 1 accepts a wide-range 40V–60V input taken from the output of a high power transformer. The LT3756’s high power GATE driver switches two 100V MOSFETs at 250kHz. This switching frequency minimizes the size of the discrete components while maintaining high 97% eficiency, thus producing a less-than37 L DESIGN IDEAS 100 2.2µF 100V ×2 196k VIN ISP SHDN/UVLO 6.2V 30.9k VREF 0V–12V FOR 0A–1A ILED 120k 0.1Ω CTRL 51k LT3756 PWMOUT 0.1µF 10k 69.8k 150kHz 4.7k 80 12.4k M2 1k 1N4448HWT 90 ISN FB 9.1k PWM 147k ILED 1A Q1 10µF 16V PWM 1 OR 2 LEDs 3.5V–7V 0A–1A M3 OPTIONAL VLED = 7V 70 VLED = 3.5V 60 50 40 30 20 L1 33µH 10 D1 0 0 OPENLED M1 SS GATE RT VC SENSE GND INTVCC 0.01µF 0.05Ω 4.7µF 100k D1: DIODES INC B2100 L1: SUMIDA CDRH8D38-330 M1: VISHAY SILICONIX Si4484EY M2: VISHAY SILICONIX Si2307BDS M3: VISHAY SILICONIX Si2328DS Q1: MMBT5401 Figure 2. An 80VIN buck mode LED driver with PWM dimming for single or double LEDs 50°C discrete component temperature rise—far more manageable than the potential heat produced by the 83V string of 1.5A LEDs. Even if PWM dimming is not required, the PWMOUT dimming MOSFET is useful for LED disconnect during shutdown. This prevents current from running through the string of ground-connected LEDs—possible under certain input conditions. If an LED fails open or if the LED string is removed from the high power driver, the FB constant voltage loop takes over and regulates the output at 95V until a proper string is attached between LED+ and LED–. Without overvoltage protection, the LED sense resistor would see zero LED current and the control loop would work hard to increase its output. Eventually, the output capacitor voltage would go over 100V, exceeding the maximum rating of several components. While in OVP the OPENLED status lag goes low. High Voltage Buck Mode LED Driver with High PWM Dimming Ratio When the input voltage is higher than the LED string voltage, the LT3756 can serve equally well as a constant current buck mode converter. For example, an automotive battery’s voltage can present a wildly moving target, 38 EFFICIENCY (%) VIN 10V TO 80V from drooping voltages to dizzyingly high voltage spikes, The buck mode LED driver in Figure 2 is perfect for such harsh environments. It operates with a wide 10V-to-80V input range to drive one or two 3.5V LEDs (7V) at 1A. In this case, both the VIN pin and ISP and ISN current sense inputs can go as high as 80V. PWM dimming requires a level-shift from the PWMOUT pin to the high side LED string as shown in Figure 2. The maximum PWM dimming ratio increases with higher switching frequency, lower PWM dimming frequency, higher input voltage and lower LED power. In this case, a 100:1 dimming ratio is possible with a 100Hz dimming frequency, a 48V input, a 3.5V or 7V LED at 1A, and a 150kHz switching frequency. Although higher switching frequency is possible with the LT3756, the duty cycle eventually has its limits. Generous minimum on-time and minimum off-time restrictions require a frequency on the lower end of its range (150kHz) to meet both the harsh high-VIN-to-low-VLED (80VIN to one 3.5V LED) and low-VIN-dropout requirements (10VIN to 7VLED) of this particular converter. The overvoltage protection of the buck mode LED driver has a level shift as well. Q1, a pnp transistor, helps regulate the maximum allowable 10 20 30 40 50 VIN (V) 60 70 80 Figure 3. Efficiency for the buck mode converter in Figure 2 output capacitor voltage to a level just beyond that of the LED string. Without the level-shifted OVP network tied to FB, an open LED string would result in the output capacitor charging up to the input voltage. Although the buck mode components will survive this scenario, the LEDs may not survive being plugged back into a potential equal to the input voltage. That is, a single 3.5V LED might not survive being connected directly to 80V. Single Inductor Buck-Boost Mode LED Driver One increasingly common LED driver requirement is that the ranges of both the LED string voltage and the input voltage are wide and overlapping. In fact, some designers prefer to use the same LED driver circuit for several different battery sources and several different LED string types. Such a versatile coniguration trades some eficiency, component cost, and board space for design simplicity, but the tradeoffs are usually mitigated by the signiicantly reduced time-to-market by producing an essentially off-theshelf multipurpose LED driver. The buck-boost mode topology shown in Figure 4 uses a single inductor and can both step-up and step-down the input voltage to the LED string voltage. It accepts inputs from 6V to 36V to drive 10V–50V LED strings at up to 400mA. The PWM dimming and OVP are level-shifted in a manner similar to the buck mode for optimal performance of these features. The inductor current is the sum of the input current and the LED string Linear Technology Magazine • January 2009 DESIGN IDEAS L 10V–50V LED– LED+ 100 VIN 9V TO 36V (6V UVLO) ILED 400mA D1 2.2µF 50V s2 110k 0.025Ω VIN 3906 4.7k 499k VIN GATE SENSE FB SHDN/UVLO 1M VLED = 10V 80 COUT 2.2µF 100V s2 M1 VLED = 50V 90 0.25Ω 2.49k EFFICIENCY (%) L1 22µH 70 60 50 40 30 20 10 0 130k 10 15 LT3756 PWMOUT CTRL 140k 4.7µF INTVCC VREF SS ISN GND VC 0.1µF 10k 5.1k Conclusion RT 28.7k 400kHz M1: VISHAY SILICONIX Si7454DP D1: DIODES INC. PDS3100 L1: SUMIDA CDRH127-220 4700pF Figure 4. A buck-boost mode LED driver with wide-ranging VIN and VLED current; the peak inductor current is also equal to the peak switching current—higher than either a buck mode or boost topology LED driver with similar specs due to the nature of the hookup. The 4A peak switch current and inductor rating relects the worst-case 9V input to 50V LED string at 400mA. Below 9V input, the CTRL analog dimming input pin is used to scale back the LED current to keep the inductor current under control if the battery voltage drops too low. The LEDs turn off below 6V input due to undervoltage lockout and will not turn back on until the input rises above 7V, to prevent lickering. In buck-boost mode, the output voltage is the sum of the input voltage and the LED string voltage. The output capacitor, the catch diode, and LT782A, continued from page 6 to level shift the SGATE signals and drive the synchronous MOSFETs. The 250kHz switching frequency optimizes eficiency and component size/board area. Figure 2 shows the layout. Proper routing and iltering of the sense pins, placement of the power components and isolation using ground and supply planes ensure an almost jitter free operation, even at 50% duty cycle. Figure 3 shows the eficiency of the circuit in Figure 1 with synchronous MOSFETs (measured to 8A) and the eficiency of an equivalent non-synchronous circuit using boost diodes (measured to 6A). The 1% improvement in peak eficiency may not seem signiicant, but take a look at the difference other out, thus reducing the total output ripple by 50%, which in turn reduces output capacitance requirements. The input current ripple is also halved, which reduces the required input capacitance and reduces EMI. Finally, the power dissipated as heat is spread out over two phases, reducing the size of heat sinks or eliminating them altogether. 24V at 8A from a 10V–15V Input Figure 1 shows a high power boost application that eficiently produces a 24V/8A output from a 10V–15V input. The LTC4440 high side driver is used Linear Technology Magazine • January 2009 30 the power MOSFET can see voltages as high as 90V for this design. ISP OPENLED 25 Figure 5. Efficiency for the buck-boost mode converter in Figure 4 PWM 100k 20 VIN (V) The 100V LT3756 controller is ostensibly a high power LED driver, but its architecture is so versatile, it can be used in any number of high voltage input applications. Of course, it has all the features required for large (and small) strings of high power LEDs. It can be used in boost, buck-boost mode, buck mode, SEPIC and lyback topologies. Its high voltage rating, optimized LED driver architecture, high performance PWM dimming, host of protection features and accurate high side current sensing make the LT3756 a single-IC choice for a variety of high voltage input and high power lighting systems. L in heat dissipation shown in Figure 4, which shows thermal images of both circuits under equivalent operating conditions. The thermal advantages of using synchronous switches are clear. Conclusion The 2-phase synchronous boost topology possible with the LT3782A offers several advantages over a nonsynchronous or a single-phase boost topology. Its combination of high eficiency, small footprint, heat sink-free thermal characteristics and low input/output capacitance requirements make it an easy it in automotive and industrial applications. L 39 L DESIGN IDEAS Parallel Buck-Boost µModule Regulators to Produce High Current in Sub-2.8mm Height Applications by Judy Sun, Sam Young and Henry Zhang Introduction For applications requiring DC/DC converters to regulate an output voltage that is somewhere in the middle of an input voltage range, circuit designers are always troubled by the complexity and/or low eficiency of available converter topologies, such as SEPIC, lyback or forward converters. As an alternative, Linear Technology offers a number of 4-switch synchronous buck-boost regulator/controller ICs that signiicantly improve eficiency and save space over other buck-boost topologies—even as they simplify design and produce higher power densities. Linear Technology µModules further simplify design by integrating A big advantage of µModule regulators is that they can be easily paralleled to increase output power capability. The current mode control scheme ensures balanced current sharing among the paralleled µModule regulators at both steady state and transient conditions, whether running in buck, boost, or buck-boost mode. most of the discrete components into a single package. For instance, the LTM4605 and LTM4607 buck-boost µModules fit almost all required components into a 15mm × 15mm × 2.8mm surface mount package, requiring only an external inductor, a current sensing resistor, a voltage setting resistor and a few input and output capacitors. µModule solutions also offer exceptional thermal performance, further simplifying already simple layout. Another big advantage of µModule regulators is that they can be easily paralleled to increase output power capability. The current mode VIN 5V TO 20V CLOCK SYNC 0° PHASE 10µF 35V R5 100k PGOOD VIN PLLIN V OUT RUN FCB LTM4605 COMP C1 0.1µF R4 324k V+ OUT1 GND OUT2 SET 5.1V SW2 PLLFLTR RSENSE EXTVCC SENSE+ STBYMD SENSE– SS C3 0.1µF MOD SGND 180µF 16V ×2 VOUT 12V 10A SW1 INTVCC LTC6908-1 22µF ×2 L1 3.3µH + PGND R2 7mΩ VFB RFB 3.57k 2-PHASE OSCILLATOR CLOCK SYNC 180° PHASE 10µF 35V PGOOD VIN PLLIN V OUT FCB RUN LTM4605 COMP 22µF x2 + 180µF 16V ×2 SW1 INTVCC SW2 PLLFLTR RSENSE EXTVCC SENSE+ STBYMD SENSE– SS SGND L2 3.3µH PGND R3 7mΩ VFB Figure 1. Paralleling two LTM4605s for high output current 40 Linear Technology Magazine • January 2009 DESIGN IDEAS L Paralleling the µModule buck-boost regulators is simple: just tie their VIN, VOUT, COMP, VFB, RUN and SS pins together, as shown in Figure 1. The LTC6908-1 oscillator synchronizes the two paralleled modules so that they operate with a 180° phase difference. Interleaving the power output in this way effectively cancels input and output ripple, thus minimizing required input and output capacitance. This circuit in Figure 1 accepts a 5V to 20V input, and generates a 12V output. The rated output current is 10A for boost mode and 20A for buck mode. Figure 2 shows the eficiency curves at a 300kHz switch- 95 90 65 0 6 4 2 0 5 10 15 LOAD CURRENT (A) 20 Figure 2. High efficiency from the parallel LTM4605s in Figure 1 (CCM mode) ing frequency. The paralleled modules achieve about 95% eficiency in boost mode and more than 97% eficiency in buck-boost and buck mode, over a wide load range. Because the inductor currents are sensed and controlled by the same COMP pin voltage, the current sharing is naturally guaranteed among paralleled µModules. It does not matter if the system is running in buck mode, buck-boost mode or boost INDUCTOR CURRENT (A) INDUCTOR CURRENT (A) IL1 VIN = 18V VIN = 12V VIN = 6V 70 10 8 80 75 12 IL2 85 10 10 IL1 8 IL2 6 4 2 4 6 8 10 12 14 16 18 20 LOAD CURRENT (A) 8 6 4 IL2 IL1 2 0 VIN = 12V –2 2 Need more output current than two LTM4605s can handle? In that case, just parallel more µModule regulators. 12 0 0 Parallel Four for 12V at 20A in Boost Mode, 40A in Buck Mode 12 VIN = 18V –2 mode, DC current sharing is excellent throughout. Figure 3 demonstrates well-balanced inductor currents for the two paralleled LTM4605s in all three operation modes. Thanks to the high eficiencies and well-balanced output currents, the thermal stress is evenly distributed between the two LTM4605s and two inductors, ensuring high system reliability. Figure 4 shows thermal pictures of the two paralleled LTM4605s, where the inductors are mounted above the LTM4605 µModules. The temperature rises of the two LTM4605s and two inductors are very similar in all three cases with VIN at 18V, 12V and 6V. Even without forced air low, the maximum temperature rise is only 45oC. INDUCTOR CURRENT (A) Parallel Two LTM4605 µModule Regulators for 12V at 10A in Boost Mode, 20A in Buck Mode 100 EFFICIENCY (%) control scheme ensures balanced current sharing among the paralleled µModules at both steady state and transient conditions, whether running in buck, boost, or buck-boost mode. VIN = 6V –2 0 2 4 6 8 10 12 14 16 18 20 LOAD CURRENT (A) 0 2 4 6 8 10 12 14 16 18 20 LOAD CURRENT (A) Figure 3. Balanced inductor currents for two paralleled LTM4605s in different operating modes VIN = 18V IOUT = 20A VIN = 12V IOUT = 10A VIN = 6V IOUT = 10A Figure 4. Thermal stress is evenly distributed between the two LTM4605s and two inductors for the circuit in Figure 1 (shown here with no air flow or heat sink). Linear Technology Magazine • January 2009 41 L DESIGN IDEAS 100 95 EFFICIENCY (%) 90 85 80 75 VIN = 18V VIN = 12V VIN = 6V 70 65 0 10 20 30 LOAD CURRENT (A) 40 Figure 6. The tested efficiency for the four LTM4605s paralleled in Figure 5 (CCM mode) Figure 5. Simple layout of four LTM4605 µModule regulators in parallel: top and bottom sides of the board (additional input and output bulk caps are placed on the top and bottom). is equally shared among the four inductors because of the internal current mode control scheme. High eficiency and well-balanced currents lead to excellent thermal performance, which allows this 240W system to it tight spaces. For example, simply connect the VIN, VOUT, COMP, VFB, RUN and SS pins of four LTM4605s in parallel to produce 20A in boost mode and more in buck mode. The LTM4605 or LTM4607 µModule is internally compensated so that it is stable in any parallel system. Figure 5 shows the layout of four paralleled LTM4605s. This simple design delivers 240W of output power with a high power density and low proile. The input range is 5V to 20V, producing a 12V output. It is capable of supporting 20A loads in boost mode and up to 40A in buck mode. A 4-phase oscillator synchronizes the µModule regulators with 90° phase interleaving. This effectively cancels input and output ripple. Figure 6 shows that eficiency is better than 95% in boost mode and up to 97% in buck mode, over a wide output current range. Figure 7 shows the thermal performance for the four paralleled LTM4605s running at full load at three different input voltages. Load current, and thus power dissipation, The LTM4605 and LTM4607 buckboost µModule regulators are ideal for the applications where the output voltage is within the input voltage range. In addition, these integrated µModules can be easily paralleled to provide more power. Outstanding current sharing performance is ensured by the internal current mode control scheme, whether the µModules are running in buck, buck-boost or boost mode. With minimum circuit and PCB layout design effort, the paralleled LTM4605 and LTM4607 µModules provide high output power, high eficiency, and high reliability in an extraordinarily compact form factor. L VIN = 18V IOUT = 40A VIN = 12V IOUT = 20A VIN = 6V IOUT = 20A The LTM4605 and LTM4607 buck-boost µModule regulators are ideal for the applications where the output voltage is within the input voltage range. Conclusion Figure 7. Thermal performance of the four LTM4605s paralleled in Figure 5 at 240W with no air flow or heat sink 42 Linear Technology Magazine • January 2009 DESIGN TOOLS L www.linear.com MyLinear (www.linear.com/mylinear) MyLinear is a customizable home page to store your favorite LTC products, categories, product tables, contact information, preferences and more. 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