INTERSIL ISL28236FBZ

ISL28136, ISL28236
®
Data Sheet
February 11, 2008
5MHz, Single and Dual Precision Rail-toRail Input-Output (RRIO) Op Amps
The ISL28136 and ISL28236 are low-power single and dual
operational amplifiers optimized for single supply operation
from 2.4V to 5.5V, allowing operation from one lithium cell or
two Ni-Cd batteries. These devices feature a gain-bandwidth
product of 5MHz and are unity-gain stable with a -3dB
bandwidth of 13MHz.
These devices feature an Input Range Enhancement Circuit
(IREC), which enables them to maintain CMRR performance
for input voltages greater than the positive supply. The input
signal is capable of swinging 0.25V above the positive
supply and to the negative supply with only a slight
degradation of the CMRR performance. The output
operation is rail-to-rail.
The parts typically draw less than 1mA supply current per
amplifier while meeting excellent DC accuracy, AC
performance, noise and output drive specifications.
Operation is guaranteed over -40°C to +125°C temperature
range.
FN6153.3
Features
• 5MHz Gain bandwidth product @ AV = 100
• 13MHz -3db unity gain bandwidth
• 900µA typical supply current (per amplifier)
• 150µV maximum offset voltage (8 Ld SOIC)
• 16nA typical input bias current
• Down to 2.4V single supply voltage range
• Rail-to-rail input and output
• Enable pin (ISL28136 only)
• -40°C to +125°C operation
• Pb-free (RoHS compliant)
Applications
• Low-end audio
• 4mA to 20mA current loops
• Medical devices
• Sensor amplifiers
Ordering Information
• ADC buffers
PART
NUMBER
(Note)
PART
MARKING
PACKAGE
(Pb-Free)
PKG.
DWG. #
• DAC output amplifiers
Pinouts
ISL28136FHZ-T7*
GABP
6 Ld SOT-23
MDP0038
ISL28136FHZ-T7A*
GABP
6 Ld SOT-23
MDP0038
ISL28136FBZ
28136 FBZ
8 Ld SOIC
MDP0027
ISL28136FBZ-T7*
28136 FBZ
8 Ld SOIC
MDP0027
OUT 1
Coming Soon
ISL28236FBZ
28236 FBZ
8 Ld SOIC
MDP0027
V- 2
Coming Soon
ISL28236FBZ-T7*
28236 FBZ
8 Ld SOIC
MDP0027
Coming Soon
ISL28236FUZ
8236Z
8 Ld MSOP
MDP0043
Coming Soon
ISL28236FUZ-T7*
8236Z
8 Ld MSOP
MDP0043
ISL28136
(8 LD SOIC)
TOP VIEW
ISL28136
(6 LD SOT-23)
TOP VIEW
+ -
IN+ 3
6 V+
NC 1
5 EN
IN- 2
4 IN-
IN+ 3
8 EN
7 V+
+
6 OUT
V- 4
5 NC
ISL28236
(8 LD MSOP)
TOP VIEW
ISL28236
(8 LD SOIC)
TOP VIEW
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
1
OUT_A 1
IN-_A 2
IN+_A 3
V- 4
8 V+
- +
+ -
OUT_A 1
7 OUT_B
IN-_A 2
6 IN-_B
IN+_A 3
5 IN+_B
V- 4
8 V+
7 OUT_B
- +
+ -
6 IN-_B
5 IN+_B
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2007, 2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL28136, ISL28236
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V
Supply Turn-on Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Resistance
θJA (°C/W)
6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
230
8 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . .
110
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . .
115
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data
established by characterization.
DESCRIPTION
CONDITIONS
MIN
(Note 1)
TYP
MAX
(Note 1)
UNIT
DC SPECIFICATIONS
VOS
Input Offset Voltage
ΔV OS
--------------ΔT
Input Offset Voltage vs Temperature
IOS
Input Offset Current
IB
8 Ld SOIC
-150
-270
±10
150
270
µV
6 Ld SOT-23
-400
-450
±10
400
450
µV
0.4
µV/°C
-10
-15
0
10
15
nA
TA = -40°C to +85°C
-10
-15
16
35
40
nA
TA = -40°C to +85°C
5
V
Input Bias Current
VCM
Common-Mode Voltage Range
Guaranteed by CMRR
0
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
90
85
114
dB
PSRR
Power Supply Rejection Ratio
V+ = 2.4V to 5.5V
90
85
99
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4V, RL = 100kΩ to VCM
600
500
1770
V/mV
140
V/mV
VO = 0.5V to 4V, RL = 1kΩ to VCM
VOUT
Maximum Output Voltage Swing
IS,ON
Supply Current, Enabled
IS,OFF
Supply Current, Disabled (ISL28136)
IO+
Short-Circuit Output Source Current
2
Output low, RL = 100kΩ to VCM
3
6
10
mV
Output low, RL = 1kΩ to VCM
70
90
110
mV
Output high, RL = 100kΩ to VCM
4.99
4.98
4.994
V
Output high, RL = 1kΩ to VCM
4.92
4.89
4.94
V
Per Amp
0.8
0.9
1.1
1.4
mA
10
14
16
µA
RL = 10Ω to VCM
48
45
56
mA
FN6153.3
February 11, 2008
ISL28136, ISL28236
Electrical Specifications
PARAMETER
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data
established by characterization. (Continued)
DESCRIPTION
CONDITIONS
MIN
(Note 1)
IO-
Short-Circuit Output Sink Current
RL = 10Ω to VCM
50
45
VSUPPLY
Supply Operating Range
V+ to V-
2.4
VENH
EN Pin High Level (ISL28136)
VENL
EN Pin Low Level (ISL28136)
IENH
EN Pin Input High Current (ISL28136)
VEN = V+
IENL
EN Pin Input Low Current (ISL28136)
TYP
MAX
(Note 1)
55
UNIT
mA
5.5
2
V
V
0.8
V
1
1.5
1.6
µA
VEN = V-
16
25
30
nA
AC SPECIFICATIONS
GBW
Gain Bandwidth Product
AV = 100, RF = 100kΩ, RG = 1kΩ to VCM
5
MHz
Unity Gain
Bandwidth
-3dB Bandwidth
AV = 1, RF = 0Ω, RL = 10kΩ to VCM,
VOUT = 10mVP-P
13
MHz
eN
Input Noise Voltage Peak-to-Peak
f = 0.1Hz to 10Hz, RL = 10kΩ to VCM
0.4
µVP-P
Input Noise Voltage Density
fO = 1kHz, RL = 10kΩ to VCM
15
nV/√Hz
iN
Input Noise Current Density
fO = 10kHz, RL = 10kΩ to VCM
0.35
pA/√Hz
CMRR
Input Common Mode Rejection Ratio
fO = to 120Hz; VCM = 1VP-P, RL = 1kΩ to
VCM
-90
dB
PSRR+
to 120Hz
Power Supply Rejection Ratio (V+)
V+, V- = ±1.2V and ±2.5V,
VSOURCE = 1VP-P, RL = 1kΩ to VCM
-88
dB
PSRRto 120Hz
Power Supply Rejection Ratio (V-)
V+, V- = ±1.2V and ±2.5V
VSOURCE = 1VP-P, RL = 1kΩ to VCM
-105
dB
TRANSIENT RESPONSE
SR
Slew Rate
VOUT = ±1.5V; Rf = 50kΩ, RG = 50kΩ to
VCM
±1.9
V/µs
tr, tf, Large
Signal
Rise Time, 10% to 90%, VOUT
AV = +2, VOUT = 2VP-P, Rg = Rf = RL = 1kΩ
to VCM
0.6
µs
Fall Time, 90% to 10%, VOUT
AV = +2, VOUT = 2VP-P, Rg = Rf = RL = 1kΩ
to VCM
0.5
µs
Rise Time, 10% to 90%, VOUT
AV = +2, VOUT = 10mVP-P,
Rg = Rf = RL = 1kΩ to VCM
65
ns
Fall Time, 90% to 10%, VOUT
AV = +2, VOUT = 10mVP-P,
Rg = Rf = RL = 1kΩ to VCM
62
ns
Enable to Output Turn-on Delay Time, 10% VEN = 5V to 0V, AV = +2,
EN to 10% VOUT (ISL28136)
Rg = Rf = RL = 1kΩ to VCM
5
µs
Enable to Output Turn-off Delay Time, 10% VEN = 0V to 5V, AV = +2,
Rg = Rf = RL = 1kΩ to VCM
EN to 10% VOUT (ISL28136)
0.3
µs
tr, tf, Small
Signal
tEN
NOTE:
1. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.
3
FN6153.3
February 11, 2008
ISL28136, ISL28236
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
1
15
Rf = Rg = 100k
5
Rf = Rg = 10k
0
V+ = 5V
RL = 1k
CL = 16.3pF
AV = +2
VOUT = 10mVP-P
-5
-10
-15
100
1k
Rf = Rg = 1k
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
0
10
10k
100k
1M
FREQUENCY (Hz)
10M
VOUT = 50mV
-4
VOUT = 10mV
-5
-6
-7
V+ = 5V
RL = 1k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
100k
1M
100M
0
VOUT = 1V
-2
VOUT = 100mV
-3
VOUT = 50mV
-4
VOUT = 10mV
V+ = 5V
RL = 10k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-9
10k
100k
-1
VOUT = 1V
-2
VOUT = 100mV
-3
VOUT = 50mV
-4
VOUT = 10mV
-5
-6
-7
-8
1M
10M
V+ = 5V
RL = 100k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-9
10k
100M
100k
1M
FREQUENCY (Hz)
10M
100M
FREQUENCY (Hz)
FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k
FIGURE 4. GAIN vs FREQUENCY vs VOUT, RL = 100k
1
70
0
RL = 100k
60
RL = 10k
50
AV = 1001
AV = 1001, Rg = 1k, Rf = 1M
-1
-2
RL = 1k
-3
GAIN (dB)
NORMALIZED GAIN (dB)
10M
FIGURE 2. GAIN vs FREQUENCY vs VOUT, RL = 1k
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
-3
1
-1
-8
VOUT = 100mV
FREQUENCY (Hz)
0
-7
-2
-9
10k
100M
1
-6
VOUT = 1V
-8
FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR
VALUES Rf/Rg
-5
-1
-4
-5
-6
-7
-8
V+ = 5V
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-9
10k
100k
40
20
0
10M
FREQUENCY (Hz)
FIGURE 5. GAIN vs FREQUENCY vs RL
4
100M
V+ = 5V
CL = 16.3pF
RL = 10k
VOUT = 10mVP-P
30
AV = 10
AV = 10, Rg = 1k, Rf = 9.09k
10
1M
AV = 101, Rg = 1k, Rf = 100k
AV = 101
AV = 1
-10
100
AV = 1, Rg = INF, Rf = 0
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
FIGURE 6. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
FN6153.3
February 11, 2008
ISL28136, ISL28236
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
1
V+ = 5V
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
0
-1
-2
-3
V+ = 2.4V
-4
-5
RL = 10k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-6
-7
-8
-9
10k
100k
1M
10M
100M
8
7
6
5
4
3
2
1
0
-1
-2
-3 V+ = 5V
-4 RL = 1k
-5 A = +1
V
-6
VOUT = 10mVP-P
-7
-8
10k
100k
20
20
0
0
-40
V+ = 2.4V, 5V
RL = 1k
CL = 16.3pF
AV = +1
VCM = 1VP-P
100
1k
10k
100k
-40
10M
100M
PSRR-
PSRR+
-80
-100
-120
10
10M
1M
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FIGURE 9. CMRR vs FREQUENCY; V+ = 2.4V AND 5V
FIGURE 10. PSRR vs FREQUENCY, V+, V- = ±1.2V
20
100
V+, V- = ±2.5V
0 RL = 1k
CL = 16.3pF
-20 A = +1
V
VSOURCE = 1VP-P
-40
V+ = 5V
RL = 1k
CL = 16.3pF
AV = +1
INPUT VOLTAGE NOISE (nV√Hz)
PSRR (dB)
1M
-60
FREQUENCY (Hz)
PSRR-
-60
PSRR+
-80
-100
-120
10
CL = 4.7pF
V+, V- = ±1.2V
RL = 1k
CL = 16.3pF
AV = +1
VSOURCE = 1VP-P
-20
-20
-100
10
CL = 16.7pF
FIGURE 8. GAIN vs FREQUENCY vs CL
PSRR (dB)
CMRR (dB)
FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
-80
CL = 26.7pF
FREQUENCY (Hz)
FREQUENCY (Hz)
-60
CL = 51.7pF
CL = 43.7pF
CL = 37.7pF
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
FIGURE 11. PSRR vs FREQUENCY, V+, V- = ±2.5V
5
1
10
100
1k
FREQUENCY (Hz)
10k
100k
FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY
FN6153.3
February 11, 2008
ISL28136, ISL28236
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
10
0.5
0.3
1
0.1
0
-0.1
-0.2
-0.4
-0.5
1
10
100
1k
FREQUENCY (Hz)
10k
100k
2
3
4
5
6
7
8
9
10
0.026
0.024
SMALL SIGNAL (V)
1.0
0.5
0
V+, V- = ±2.5V
RL = 1k
CL = 16.3pF
Rg = Rf = 10k
AV = 2
VOUT = 1.5VP-P
-0.5
-1.0
0
1
2
3
4
0.022
0.020
0.018
0.014
5
6
TIME (µs)
7
8
9
0.012
0
10
V-OUT
5
0.5
1.0
1.5
2.0
2.5
TIME (µs)
3.0
3.5
4.0
FIGURE 16. SMALL SIGNAL STEP RESPONSE
1.3
6
V-ENABLE
V+, V- = ±2.5V
RL = 1k
CL = 16.3pF
Rg= Rf = 10k
AV = 2
VOUT = 10mVP-P
0.016
FIGURE 15. LARGE SIGNAL STEP RESPONSE
100
80
1.1
60
0.9
3
2
1
0.7
0.5
0.3
0.1
0
40
VOS (µV)
V+ = 5V
Rg = Rf = RL = 1k
CL = 16.3pF
AV = +2
VOUT = 1VP-P
OUTPUT (V)
4
-1
1
FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz TO 10Hz
1.5
-1.5
0
TIME (s)
FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY
LARGE SIGNAL (V)
0.2
-0.3
0.1
V-ENABLE (V)
V+ = 5V
RL = 10k
CL = 16.3pF
Rg = 10, Rf = 100k
AV = 10000
0.4
INPUT NOISE (µV)
INPUT CURRENT NOISE (pA√Hz)
V+ = 5V
RL = 1k
CL = 16.3pF
AV = +1
20
0
-20
V+ = 5V
RL = OPEN
Rf = 100k, Rg = 100
AV = +1000
-40
-60
-80
0
10
20
30
40
50
60
TIME (µs)
70
80
90
FIGURE 17. ENABLE TO OUTPUT RESPONSE
6
-0.1
100
-100
-1
0
1
2
3
VCM (V)
4
5
6
FIGURE 18. INPUT OFFSET VOLTAGE vs COMMON-MODE
INPUT VOLTAGE
FN6153.3
February 11, 2008
ISL28136, ISL28236
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
100
80
60
I-BIAS (nA)
40
20
0
-20
V+ = 5V
RL = OPEN
Rf = 100k, Rg = 100
AV = +1000
-40
-60
-80
-100
-1
0
1
2
3
VCM (V)
4
5
6
FIGURE 19. INPUT OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE
11
1200
N = 1150
N = 1150
MAX
1000
MEDIAN
900
CURRENT (µA)
CURRENT (µA)
MAX
10
1100
MIN
800
9
MEDIAN
8
7
6
MIN
700
5
600
-40
-20
0
20
40
60
80
100
4
-40
120
-20
0
80
100
120
N = 1150
250
300
MAX
200
200
MAX
150
100
VOS (µV)
VOS (µV)
60
300
N = 1150
MEDIAN
0
-100
100
50
MEDIAN
0
-50
-100
-200
-150
MIN
-300
-400
-40
40
FIGURE 21. SUPPLY CURRENT DISABLED vs
TEMPERATURE, V+, V- = ±2.5V
FIGURE 20. SUPPLY CURRENT ENABLED vs
TEMPERATURE, V+, V- = ±2.5V
400
20
TEMPERATURE (°C)
TEMPERATURE (°C)
MIN
-200
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 22. VOS vs TEMPERATURE, V+, V- = ±2.5V,
SOT PACKAGE
7
120
-250
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 23. VOS vs TEMPERATURE, V+, V- = ±2.5V,
SOIC PACKAGE
FN6153.3
February 11, 2008
ISL28136, ISL28236
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
400
300
MAX
150
VOS (µV)
100
VOS (µV)
MAX
200
200
MEDIAN
0
-100
100
MEDIAN
50
0
-50
-100
-200
MIN
-150
-300
-20
0
20
40
60
80
100
MIN
-200
N = 1150
-400
-40
N = 1150
250
300
-250
-40
120
-20
0
20
FIGURE 24. VOS vs TEMPERATURE, V+, V- = ±1.2V, SOT
PACKAGE
120
MAX
20
20
15
15
10
IBIAS- (nA)
IBIAS+ (nA)
100
25
MAX
MEDIAN
5
10
0
-5
-5
MIN
-20
0
MEDIAN
5
0
MIN
N = 1150
N = 1150
20
40
60
80
TEMPERATURE (°C)
100
-10
-40
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 26. IBIAS+ vs TEMPERATURE, V+, V- = ±2.5V
FIGURE 27. IBIAS- vs TEMPERATURE, V+, V- = ±2.5V
20
15
N = 1150
MAX
15
10
MAX
10
5
0
IBIAS- (nA)
IBIAS+ (nA)
80
30
25
MEDIAN
-5
-10
5
0
MEDIAN
-5
-10
-15
-15
-20
-25
-40
60
FIGURE 25. VOS vs TEMPERATURE, V+, V- = ±1.2V, SOIC
PACKAGE
30
-10
-40
40
TEMPERATURE (°C)
TEMPERATURE (°C)
MIN
-20
0
20
N = 1150
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 28. IBIAS+ vs TEMPERATURE, V+, V- = ±1.2V
8
MIN
-20
-25
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 29. IBIAS- vs TEMPERATURE, V+, V- = ±1.2V
FN6153.3
February 11, 2008
ISL28136, ISL28236
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
10
12
8
10
MAX
8
6
IOS (nA)
IOS (nA)
MAX
6
4
MEDIAN
2
0
-2
4
2
MEDIAN
0
-2
-4
-4
MIN
-6
-8
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
MIN
-6
N = 1150
-8
-40
120
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 30. IOS vs TEMPERATURE, V+, V- = ±2.5V
FIGURE 31. IOS vs TEMPERATURE, V+, V- = ±1.2V
140
120
135
MAX
130
115
MAX
125
110
PSRR (dB)
CMRR (dB)
N = 1150
120
115
MEDIAN
110
105
100
MIN
MIN
N = 1150
-20
0
20
40
60
MEDIAN
100
95
95
90
-40
105
80
100
90
-40
120
-20
0
TEMPERATURE (°C)
FIGURE 32. CMRR vs TEMPERATURE, VCM = -2.5V TO +2.5V,
V+, V- = ±2.5V
20
40
60
80
TEMPERATURE (°C)
N = 1150
100
120
FIGURE 33. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.75V
200
4500
4000
180
MAX
MAX
3500
3000
AVOL (V/mV)
AVOL (V/mV)
160
2500
2000
MEDIAN
1500
MEDIAN
140
120
100
1000
MIN
MIN
80
500
0
-40
N = 1150
N = 1150
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 34. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V
TO +2V, RL = 100k
9
60
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 35. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V
TO +2V, RL = 1k
FN6153.3
February 11, 2008
ISL28136, ISL28236
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
75
4.960
N = 1150
MAX
4.955
70
4.950
65
VOUT (m V)
VOUT (V)
MAX
MEDIAN
4.945
4.940
60
MEDIAN
55
MIN
MIN
4.935
50
4.930
-40
45
-40
N = 1150
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 36. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V,
RL = 1k
FIGURE 37. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V,
RL = 1k
Pin Descriptions
ISL28136
(6 Ld SOT-23)
ISL28136
(8 Ld SOIC)
ISL28236
(8 Ld SOIC)
(8 Ld MSOP)
1, 5
4
2
2 (A)
6 (B)
PIN NAME
FUNCTION
NC
Not connected
ININ-_A
IN-_B
inverting input
EQUIVALENT CIRCUIT
V+
IN-
IN+
VCircuit 1
3
2
3 (A)
5 (B)
IN+
IN+_A
IN+_B
4
V-
3
4
Non-inverting input
Negative supply
See Circuit 1
V+
CAPACITIVELY
COUPLED
ESD CLAMP
VCircuit 2
1
6
1 (A)
7 (B)
OUT
OUT_A
OUT_B
Output
V+
OUT
VCircuit 3
6
7
5
8
8
V+
Positive supply
EN
Chip enable
See Circuit 2
V+
LOGIC
PIN
VCircuit 3
10
FN6153.3
February 11, 2008
ISL28136, ISL28236
Applications Information
Introduction
The ISL28136 and ISL28236 are single and dual channel
Bi-CMOS rail-to-rail input, output (RRIO) micropower
precision operational amplifiers. The parts are designed to
operate from single supply (2.4V to 5.5V) or dual supply
(±1.2V to ±2.75V). The parts have an input common mode
range that extends 0.25V above the positive rail and down to
the negative supply rail. The output operation can swing
within about 3mV of the supply rails with a 100kΩ load.
Rail-to-Rail Input
Many rail-to-rail input stages use two differential input pairs,
a long-tail PNP (or PFET) and an NPN (or NFET). Severe
penalties have to be paid for this circuit topology. As the
input signal moves from one supply rail to another, the
operational amplifier switches from one input pair to the
other causing drastic changes in input offset voltage and an
undesired change in magnitude and polarity of input offset
current.
The ISL28136 and ISL28236 achieve input rail-to-rail
operation without sacrificing important precision
specifications and degrading distortion performance. The
devices’ input offset voltage exhibits a smooth behavior
throughout the entire common-mode input range. The input
bias current versus the common-mode voltage range gives
an undistorted behavior from typically down to the negative
rail to 0.25V higher than the positive rail.
Rail-to-Rail Output
A pair of complementary bi-polar devices are used to
achieve the rail-to-rail output swing. The PNP sinks current
to swing the output in the negative direction. The NPN
sources current to swing the output in the positive direction.
The ISL28136 and ISL28236 with a 100kΩ load will swing to
within 3mV of the positive supply rail and within 3mV of the
negative supply rail.
Results of Over-Driving the Output
Caution should be used when over-driving the output for long
periods of time. Over-driving the output can occur in two ways.
1) The input voltage times the gain of the amplifier exceeds the
supply voltage by a large value or, 2) the output current
required is higher than the output stage can deliver. These
conditions can result in a shift in the Input Offset Voltage (VOS)
as much as 1µV/hr. of exposure under these conditions.
IN+ and IN- Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals (see “Pin
Descriptions” on page 10 - Circuit 1). For applications where
the input differential voltage is expected to exceed 0.5V, an
11
external series resistor must be used to ensure the input
currents never exceed 5mA (Figure 38).
VIN
VOUT
RIN
+
RL
FIGURE 38. INPUT CURRENT LIMITING
Enable/Disable Feature
The ISL28136 offers an EN pin that disables the device
when pulled up to at least 2.0V. In the disabled state (output
in a high impedance state), the part consumes typically 10µA
at room temperature. The EN pin has an internal pull-down.
If left open, the EN pin will pull to the negative rail and the
device will be enabled by default. The EN pin should never
be left floating. When not used, the EN pin should either be
left floating or connected to the V- pin.
By disabling the part, multiple ISL28136 parts can be
connected together as a MUX. In this configuration, the
outputs are tied together in parallel and a channel can be
selected by the EN pin. The loading effects of the feedback
resistors of the disabled amplifier must be considered when
multiple amplifier outputs are connected together. Note that
feed through from the IN+ to IN- pins occurs on any Mux
Amp disabled channel where the input differential voltage
exceeds 0.5V (e.g., active channel VOUT = 1V, while
disabled channel VIN = GND), so the mux implementation is
best suited for small signal applications. If large signals are
required, use series IN+ resistors, or a large value RF, to
keep the feed through current low enough to minimize the
impact on the active channel. See“Limitations of the
Differential Input Protection” on page 11 for more details.
Limitations of the Differential Input Protection
If the input differential voltage is expected to exceed 0.5V, an
external current limiting resistor must be used to ensure the
input current never exceeds 5mA. For non-inverting unity gain
applications, the current limiting can be via a series IN+ resistor,
or via a feedback resistor of appropriate value. For other gain
configurations, the series IN+ resistor is the best choice, unless
the feedback (RF) and gain setting (RG) resistors are both
sufficiently large to limit the input current to 5mA.
Large differential input voltages can arise from several
sources:
1) During open loop (comparator) operation. Used this way,
the IN+ and IN- voltages don’t track, so differentials arise.
2) When the amplifier is disabled but an input signal is still
present. An RL or RG to GND keeps the IN- at GND, while
the varying IN+ signal creates a differential voltage. Mux
Amp applications are similar, except that the active channel
VOUT determines the voltage on the IN- terminal.
FN6153.3
February 11, 2008
ISL28136, ISL28236
3) When the slew rate of the input pulse is considerably
faster than the op amp’s slew rate. If the VOUT can’t keep up
with the IN+ signal, a differential voltage results, and visible
distortion occurs on the input and output signals. To avoid
this issue, keep the input slew rate below 1.9V/µs, or use
appropriate current limiting resistors.
Large (>2V) differential input voltages can also cause an
increase in disabled ICC.
Using Only One Channel
The ISL28236 is a dual op amp. If the application only
requires one channel, the user must configure the unused
channel to prevent it from oscillating. The unused channel
will oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and possible
noise injection into the channel being used. The proper way
to prevent this oscillation is to short the output to the
negative input and ground the positive input (as shown in
Figure 39).
Power Dissipation
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related in Equation 1:
T JMAX = T MAX + ( θ JA xPD MAXTOTAL )
(EQ. 1)
where:
• PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
• PDMAX for each amplifier can be calculated using
Equation 2:
V OUTMAX
PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------R
L
(EQ. 2)
-
where:
+
• TMAX = Maximum ambient temperature
FIGURE 39. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
• θJA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
Current Limiting
• VS = Supply voltage (Magnitude of V+ and V-)
These devices have no internal current-limiting circuitry. If
the output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the
application
• RL = Load resistance
12
FN6153.3
February 11, 2008
ISL28136, ISL28236
SOT-23 Package Family
MDP0038
e1
D
SOT-23 PACKAGE FAMILY
A
MILLIMETERS
6
N
SYMBOL
4
E1
2
E
3
0.15 C D
1
2X
2
3
0.20 C
5
2X
e
0.20 M C A-B D
B
b
NX
0.15 C A-B
1
3
SOT23-5
SOT23-6
A
1.45
1.45
MAX
A1
0.10
0.10
±0.05
A2
1.14
1.14
±0.15
b
0.40
0.40
±0.05
c
0.14
0.14
±0.06
D
2.90
2.90
Basic
E
2.80
2.80
Basic
E1
1.60
1.60
Basic
e
0.95
0.95
Basic
e1
1.90
1.90
Basic
L
0.45
0.45
±0.10
L1
0.60
0.60
Reference
N
5
6
Reference
D
2X
TOLERANCE
Rev. F 2/07
NOTES:
C
A2
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
SEATING
PLANE
A1
0.10 C
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
NX
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
(L1)
6. SOT23-5 version has no center lead (shown as a dashed line).
H
A
GAUGE
PLANE
c
L
13
0.25
0° +3°
-0°
FN6153.3
February 11, 2008
ISL28136, ISL28236
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
±0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
±0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
±0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
±0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
±0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
±0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
±0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
±0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
14
FN6153.3
February 11, 2008
ISL28136, ISL28236
Mini SO Package Family (MSOP)
0.25 M C A B
D
MINI SO PACKAGE FAMILY
(N/2)+1
N
E
MDP0043
A
E1
MILLIMETERS
PIN #1
I.D.
1
B
(N/2)
e
H
C
SEATING
PLANE
0.10 C
N LEADS
SYMBOL
MSOP8
MSOP10
TOLERANCE
NOTES
A
1.10
1.10
Max.
-
A1
0.10
0.10
±0.05
-
A2
0.86
0.86
±0.09
-
b
0.33
0.23
+0.07/-0.08
-
c
0.18
0.18
±0.05
-
D
3.00
3.00
±0.10
1, 3
E
4.90
4.90
±0.15
-
E1
3.00
3.00
±0.10
2, 3
e
0.65
0.50
Basic
-
L
0.55
0.55
±0.15
-
L1
0.95
0.95
Basic
-
N
8
10
Reference
-
0.08 M C A B
b
Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
L
A1
0.25
3° ±3°
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
15
FN6153.3
February 11, 2008