ISL28278, ISL28478 ® Data Sheet July 11, 2007 Dual and Quad Micropower Single Supply Rail-to-Rail Input and Output (RRIO) Op-Amp The ISL28278 and ISL28478 are dual and quad channel micropower operational amplifiers optimized for single supply operation over the 2.4V to 5V range. They can be operated from one lithium cell or two Ni-Cd batteries. For equivalent performance in a single channel op-amp reference EL8178. These devices feature an Input Range Enhancement Circuit (IREC) which enables them to maintain CMRR performance for input voltages 10% above the positive supply rail and to 100mV below the negative supply. The output operation is rail to rail. The ISL28278 and ISL28478 draw minimal supply current while meeting excellent DC-accuracy, AC-performance, noise and output drive specifications. The ISL28278 contains a power down enable pin that reduces the power supply current to typically 4µA in the disabled state. Pinouts FN6145.2 Features • Low power 120µA typical supply current (ISL28278) • 225μV max offset voltage • 30pA max input bias current • 300kHz typical gain-bandwidth product • 105dB typical PSRR • 100dB typical CMRR • Single supply operation down to 2.4V • Input is capable of swinging above V+ and below V(ground sensing) • Rail-to-rail input and output (RRIO) • Enable Pin (ISL28278 only) • Pb-free plus anneal available (RoHS compliant) Applications • Battery- or solar-powered systems • 4mA to 25mA current loops ISL28278 (16 LD QSOP) TOP VIEW NC 1 16 NC NC 2 15 V+ 14 OUT_B + + OUT_A 3 IN-_A 4 13 IN-_B IN+_A 5 12 IN+_B EN_A 6 11 EN_B V- 7 10 NC NC 8 9 NC ISL28478 (16 LD QSOP) TOP VIEW OUT_A 1 16 OUT_D 15 IN-_D IN-_A 2 + + IN+_A 3 14 IN+_D V+ 4 13 V- IN+_B 5 • Medical devices • Thermocouple amplifiers • Photodiode pre-amps • pH probe amplifiers Ordering Information PART NUMBER (Note) PART MARKING PACKAGE (Pb-Free) PKG. DWG. # ISL28278FAZ* 28278FAZ 16 Ld QSOP MDP0040 ISL28478FAZ* 28478FAZ 16 Ld QSOP MDP0040 *“-T7” suffix is for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 12 IN+_C + - + - IN-_B 6 • Handheld consumer products 11 IN-_C 10 OUT_C OUT_B 7 NC 8 9 NC 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL28278, ISL28478 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage, V- to V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Tolerance Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Thermal Resistance θJA (°C/W) 16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . . 112 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Operating Junction Electrical Specifications PARAMETER V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data established by characterization DESCRIPTION CONDITIONS MIN (Note 1) TYP MAX (Note 1) UNIT DC SPECIFICATIONS VOS Input Offset Voltage ΔV OS --------------ΔT Input Offset Voltage vs Temperature IOS Input Offset Current IB -225 -450 ±0.20 225 450 1.0 µV µV/°C -30 -80 ±5 30 80 pA -40°C to +85°C -30 -80 ±10 30 80 pA -40°C to +85°C 5 V Input Bias Current CMIR Common-Mode Voltage Range Guaranteed by CMRR 0 CMRR Common-Mode Rejection Ratio VCM = 0V to 5V 80 75 100 dB PSRR Power Supply Rejection Ratio V+ = 2.4V to 5V 85 80 105 dB AVOL Large Signal Voltage Gain VO = 0.5V to 4.5V, RL = 100kΩ 200 190 300 V/mV VO = 0.5V to 4.5V, RL = 1kΩ 60 V/mV Output low, RL = 100kΩ 3 6 30 mV 130 175 225 mV VOUT Maximum Output Voltage Swing Output low, RL = 1kΩ IS,ON IS,OFF Quiescent Supply Current, Enabled Quiescent Supply Current, Disabled 2 Output high, RL = 100kΩ 4.990 4.97 4.996 V Output high, RL = 1kΩ 4.800 4.750 4.880 V ISL28278, All channels enabled. 120 156 175 µA ISL28478, All channels enabled. 240 315 350 µA 4 7 9 µA All channels disabled. ISL28278 FN6145.2 July 11, 2007 ISL28278, ISL28478 Electrical Specifications PARAMETER V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data established by characterization (Continued) DESCRIPTION CONDITIONS MIN (Note 1) TYP MAX (Note 1) UNIT IO+ Short Circuit Sourcing Capability RL = 10Ω 29 24 31 mA IO- Short Circuit Sinking Capability RL = 10Ω 24 20 26 mA VSUPPLY Supply Operating Range V- to V+ 2.4 VENH EN Pin High Level ISL28278 VENL EN Pin Low Level ISL28278 IENH EN Pin Input High Current VEN = V+ ISL28278 IENL EN Pin Input Low Current VEN = VISL28278 5.0 2 V V 0.8 V 0.8 1 1.5 µA 0 0.1 µA AC SPECIFICATIONS GBW Gain Bandwidth Product AV = 100, RF = 100kΩ, RG = 1kΩ, RL = 10kΩ to VCM 300 kHz en Input Noise Voltage Peak-to-Peak f = 0.1Hz to 10Hz 4.5 µVP-P Input Noise Voltage Density fO = 1kHz 45 nV/√Hz in Input Noise Current Density fO = 1kHz 0.04 pA/√Hz CMRR @ 60Hz Input Common Mode Rejection Ratio VCM = 1VP-P, RL = 10kΩ to VCM -70 dB PSRR+ @ 120Hz Power Supply Rejection Ratio, +V V+,V- = ±1.2V and ±2.5V, VSOURCE = 1VP-P, RL = 10kΩ to VCM -80 dB PSRR- @ 120Hz Power Supply Rejection Ratio, -V V+,V- = ±1.2V and ±2.5V VSOURCE = 1VP-P, RL = 10kΩ to VCM -60 dB TRANSIENT RESPONSE ±0.12 ±0.09 ±0.14 ±0.16 ±0.21 V/µs SR Slew Rate tEN Enable to Output Turn-on Delay Time, 10% EN to 10% Vout VEN = 5V to 0V, AV = -1, RG = RF = RL = 1k to VCM, ISL28278 2 µs Enable to Output Turn-off Delay Time, 10% EN to 10% Vout VEN = 0V to 5V, AV = -1, RG = RF = RL = 1k to VCM, ISL28278 0.1 µs NOTE: 1. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested. 3 FN6145.2 July 11, 2007 ISL28278, ISL28478 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. +1 45 35 V+,V-= ±1.2V RL = 10k 30 GAIN (dB) -2 GAIN (dB) 40 V+,V-= ±1.2V RL = 1k V+,V-= ±2.5V RL = 1k -1 V+,V-= ±2.5V RL = 10k -3 -4 20 15 -5 VOUT = 50mVP-P AV = 1 CL = 3pF RF = 0, RG = INF -6 -7 8 1k 10 5 10k 100k 1M V+,V-= ±2.5V 25 V+,V-= ±1.2V AV = 100 RL = 10kΩ CL = 3pF RF = 100kΩ RG = 1kΩ 0 100 5M V+,V-= ±1.0V 1k 10k FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGE FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE 80 120 200 100 150 80 40 80 PHASE PHASE GAIN (dB) -40 0 PHASE (°) 0 40 -80 100 10k 1k 100k 1M -120 10M 100 60 50 40 0 20 -80 -40 GAIN -50 0 -100 -20 10 100 10k 1k 100k -150 1M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 3. AVOL vs FREQUENCY @ 100kΩ LOAD FIGURE 4. AVOL vs FREQUENCY @ 1kΩ LOAD 10 0 -10 -20 10 V+,V- = ±2.5VDC 0 VSOURCE = 1VP-P RL = 10kΩ AV = +1 -10 -20 -30 CMRR (dB) PSRR (dB) GAIN (dB) GAIN 10 1M FREQUENCY (Hz) FREQUENCY (Hz) 1 100k PHASE (°) 0 PSRR - -40 -50 -60 PSRR + V+,V- = ±2.5VDC VSOURCE = 1VP-P RL = 10kΩ -30 -40 -50 -60 -70 -70 -80 -80 -90 -90 -100 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 5. PSRR vs FREQUENCY 4 1M -100 10 100 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 6. CMRR vs FREQUENCY FN6145.2 July 11, 2007 ISL28278, ISL28478 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. 1k CURRENT NOISE (fA/√Hz) VOLTAGE NOISE (nV/√Hz) 1k 100 100 10 10 1 10 100 FREQUENCY (Hz) 1k 10k 1 FIGURE 7. VOLTAGE NOISE vs FREQUENCY 10 100 FREQUENCY (Hz) 1k 10k FIGURE 8. CURRENT NOISE vs FREQUENCY 2.56 VIN 2.54 2.0 2.52 1.5 1.0 VOUT VOLTS (V) VOLTAGE NOISE (0.5µV/DIV) 2.5 0.5 0 2.50 2.48 -0.5 V+ = 5VDC VOUT = 0.1VP-P 2.46 -1.0 -1.5 RL = 1kΩ 2.44 AV = +1 -2.0 -2.5 2.42 0 1 2 3 4 5 6 7 8 9 0 10 2 4 6 8 10 FIGURE 9. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE V+ = 5VDC VOUT = 4VP-P RL = 1kΩ AV = -2 16 18 20 AV = -1 VIN = 200mVP-P V+ = 5V EN INPUT 1V/DIV VOUT 3 2 0 VIN 1 VOUT 0.1V/DIV VOLTS (V) 14 FIGURE 10. SMALL SIGNAL TRANSIENT RESPONSE 5 4 12 TIME (µs) TIME (1s/DIV) 0 0 0 50 100 150 200 250 10µs/DIV TIME (µs) FIGURE 11. LARGE SIGNAL TRANSIENT RESPONSE 5 FIGURE 12. ISL28278 ENABLE TO OUTPUT DELAY TIME FN6145.2 July 11, 2007 ISL28278, ISL28478 1000 100 800 80 600 60 400 40 IBIAS (pA) VOS (µV) Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. 200 0 -200 -400 -800 -1000 -1 0 1 2 3 VCM (V) 4 0 -20 -60 -80 5 -100 6 FIGURE 13. INPUT OFFSET VOLTAGE vs COMMON MODE INPUT VOLTAGE 280 20 -40 V+ = 5V RL = OPEN RF = 100k, RG = 100 AV = +1000 -600 2 3 VCM (V) 4 5 6 n = 12 4.6 MAX 4.4 CURRENT (µA) CURRENT (µA) 1 4.8 250 MEDIAN 240 230 MIN 220 MAX 4.2 MEDIAN 4.0 3.8 3.6 210 MIN 3.4 200 -20 0 20 40 60 80 TEMPERATURE (°C) 100 3.2 -40 120 FIGURE 15. ISL28478 SUPPLY CURRENT vs TEMPERATURE, V+,V- = ±2.5V, RL = INF -20 0 100 120 500 N = 1000 400 400 300 N = 1000 300 MAX MAX 200 20 40 60 80 TEMPERATURE (°C) FIGURE 16. ISL28278 DISABLED SUPPLY CURRENT vs TEMPERATURE, V+,V- = ±2.5V RL = INF 500 VOS (µV) 200 100 MEDIAN 0 -100 100 -100 MIN -200 -300 -300 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 17. VOS vs TEMPERATURE, VIN = 0V, V+,V- = ±2.5V 6 MEDIAN 0 -200 -400 -40 0 FIGURE 14. INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE 260 VOS (µV) -1 N = 1000 270 190 -40 V+ = 5V RL = OPEN RF= 100k, RG = 100 AV = +1000 -400 -40 MIN -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 18. VOS vs TEMPERATURE, VIN = 0V, V+,V- = ±1.2V FN6145.2 July 11, 2007 ISL28278, ISL28478 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. 200 500 n = 1000 n = 1000 0 0 IBIAS- (pA) IBIAS+ (pA) -200 -500 MAX -1000 -1500 0 20 40 60 80 -800 MEDIAN -1200 MIN -20 MAX -600 -1000 MEDIAN -2000 -2500 -40 -400 100 -1400 120 MIN -40 -20 0 TEMPERATURE (°C) 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 19. IBIAS+ vs TEMPERATURE, V+,V- = ±2.5V FIGURE 20. IBIAS- vs TEMPERATURE, V+,V- = ±2.5V 200 500 n = 1000 n = 1000 0 0 IBIAS- (pA) IBIAS+ (pA) -200 -500 MAX -1000 -1500 MAX -400 -600 -800 MEDIAN -2000 MEDIAN -1000 MIN MIN -2500 -1200 -40 -20 0 20 40 60 80 100 120 -40 -20 0 40 60 80 100 120 FIGURE 22. IBIAS- vs TEMPERATURE, V+,V- = ±1.2V FIGURE 21. IBIAS+ vs TEMPERATURE, V+,V- = ±1.2V 200 550 n = 1000 N = 1000 0 500 -200 450 -400 AVOL (V/mV) IOS (pA) 20 TEMPERATURE (°C) TEMPERATURE (°C) MAX -600 -800 MAX 400 350 MEDIAN 300 MEDIAN -1000 250 MIN -1200 -1400 -40 200 MIN -20 0 20 40 60 80 100 TEMPERATURE (°C) FIGURE 23. IOS vs TEMPERATURE, V+,V- = ±2.5V 7 120 150 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 24. AVOL vs TEMPERATURE, V+,V- = ±2.5V, RL = 100k FN6145.2 July 11, 2007 ISL28278, ISL28478 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. 135 90 N = 1000 N = 1000 MAX 125 80 70 60 CMRR (dB) AVOL (V/mV) MAX MEDIAN 50 MIN 40 30 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 MIN -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 26. CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V V+,V- = ±2.5V 4.91 N = 1000 N = 1000 MAX 130 4.90 120 4.89 VOUT (V) MAX 110 MEDIAN 4.88 MEDIAN 4.87 100 MIN MIN 90 80 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 4.86 100 4.85 -40 120 FIGURE 27. PSRR vs TEMPERATURE, V+,V- = ±1.2V TO ±2.5V 20 40 60 80 TEMPERATURE (°C) 100 120 N = 1000 MAX 4.9980 0 160 n = 12 4.9982 -20 FIGURE 28. VOUT HIGH vs TEMPERATURE, V+,V- = ±2.5V, RL= 1k 4.9984 150 4.9978 140 VOUT (mV) 4.9976 4.9974 MEDIAN 95 75 -40 120 140 PSRR (dB) 105 85 FIGURE 25. AVOL vs TEMPERATURE, V+,V- = ±2.5V, RL = 1k VOUT (V) 115 MEDIAN 4.9972 MIN 4.9970 MEDIAN 120 MIN 110 4.9968 100 4.9966 4.9964 -40 MAX 130 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 29. VOUT HIGH vs TEMPERATURE, V+,V- = ±2.5V, RL= 100k 8 90 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 30. VOUT LOW vs TEMPERATURE, V+,V- = ±2.5V, RL= 1k FN6145.2 July 11, 2007 ISL28278, ISL28478 4.3 + OUTPUT SHORT CIRCUIT CURRENT (mA) Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. n = 12 4.2 VOUT (mV) 4.1 4.0 3.9 MAX MEDIAN 3.8 3.7 MIN 3.6 3.5 3.4 -40 -20 0 20 40 60 80 100 120 41 N = 1000 39 MAX 37 35 33 MEDIAN 31 MIN 29 27 25 -40 -20 0 TEMPERATURE (°C) 40 60 80 100 120 FIGURE 32. + OUTPUT SHORT CIRCUIT CURRENT vs TEMPERATURE, VIN = -2.55V, RL = 10, V+,V- = ±2.5V FIGURE 31. VOUT LOW vs TEMPERATURE, V+,V- = ±2.5V, RL= 100k 0.19 -21 N = 1000 -23 -25 MAX -27 MEDIAN -29 MIN -31 N = 1000 0.18 + SLEW RATE (V/µs) - OUTPUT SHORT CIRCUIT CURRENT (mA) 20 TEMPERATURE (°C) 0.17 0.16 MAX 0.15 0.14 MEDIAN 0.13 0.12 MIN 0.11 0.10 -33 -40 -20 0 20 40 60 80 100 0.09 -40 120 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 34. + SLEW RATE vs TEMPERATURE, VOUT = ±1.5V, AV = +2 FIGURE 33. - OUTPUT SHORT CIRCUIT CURRENT vs TEMPERATURE, VIN = +2.55V, RL = 10, V+,V- = ±2.5V 0.20 0.19 N = 1000 - SLEW RATE (V/µs) 0.18 0.17 MAX 0.16 0.15 MEDIAN 0.14 0.13 MIN 0.12 0.11 0.10 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 35. - SLEW RATE vs TEMPERATURE, VOUT = ±1.5V, AV = +2 9 FN6145.2 July 11, 2007 ISL28278, ISL28478 Pin Descriptions ISL28278 (16 LD QSOP) ISL28478 (16 LD QSOP) PIN NAME EQUIVALENT CIRCUIT 3 1 OUT_A Circuit 3 Amplifier A output 4 2 IN-_A Circuit 1 Amplifier A inverting input 5 3 IN+_A Circuit 1 Amplifier A non-inverting input 15 4 V+ Circuit 4 Positive power supply 12 5 IN+_B Circuit 1 Amplifier B non-inverting input 13 6 IN-_B Circuit 1 Amplifier B inverting input 14 7 OUT_B Circuit 3 Amplifier B output 1, 2, 8, 9, 10, 16 8, 9 NC 10 OUT_C Circuit 3 Amplifier C output 11 IN-_C Circuit 1 Amplifier C inverting input 12 IN+_C Circuit 1 Amplifier B non-inverting input 7 DESCRIPTION No internal connection 13 V- Circuit 4 Negative power supply 14 IN+_D Circuit 1 Amplifier D non-inverting input 15 IN-_D Circuit 1 Amplifier D inverting input 16 OUT_D Circuit 3 Amplifier D output 6 EN_A Circuit 2 Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. 11 EN_B Circuit 2 Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. V+ V+ IN- IN+ LOGIC PIN V+ CAPACITIVELY COUPLED ESD CLAMP OUT V- CIRCUIT 1 V+ V- VCIRCUIT 2 Applications Information Introduction The ISL28278 and ISL28478 are dual and quad CMOS rail-to-rail input, output (RRIO) micropower operational amplifiers. These devices are designed to operate from a single supply (2.4V to 5.0V) or dual supplies (±1.2V to ±2.5V) while drawing only 120μA (ISL28278) of supply current. This combination of low power and precision performance makes these devices suitable for solar and battery power applications. VCIRCUIT 3 CIRCUIT 4 undesired change in magnitude and polarity of input offset current. The ISL28278 achieves input rail-to-rail without sacrificing important precision specifications and degrading distortion performance. The devices’ input offset voltage exhibits a smooth behavior throughout the entire common-mode input range. The input bias current versus the common-mode voltage range gives us an undistorted behavior from typically 100mV below the negative rail and 10% higher than the V+ rail (0.5V higher than V+ when V+ equals 5V). Input Protection Rail-to-Rail Input Many rail-to-rail input stages use two differential input pairs, a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an 10 All input terminals have internal ESD protection diodes to the positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. There is an additional pair of back-to-back diodes across the input terminals. For applications where the input differential voltage is expected to exceed 0.5V, external series resistors must be used to ensure the input currents never exceed 5mA. FN6145.2 July 11, 2007 ISL28278, ISL28478 Rail-to-Rail Output A pair of complementary MOSFET devices are used to achieve the rail-to-rail output swing. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive direction. Both parts, with a 100kΩ load, will typically swing to within 4mV of the positive supply rail and within 3mV of the negative supply rail. form a continuous loop around both inputs. For further reduction of leakage currents, components can be mounted to the PC board using Teflon standoff insulators. V+ HIGH IMPEDANCE INPUT IN Enable/Disable Feature The ISL28278 offers two EN pins (EN_A and EN_B) which disable the op amp when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 4µA. By disabling the part, multiple parts can be connected together as a MUX. The outputs are tied together in parallel and a channel can be selected by the EN pins. The loading effects of the feedback resistors of the disabled amplifier must be considered when multiple amplifier outputs are connected together. The EN pin also has an internal pull-down. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. Using Only One Channel The ISL28278 and ISL28478 are dual and quad channel op amps. If the application only requires one channel when using the ISL28278 or less than 4 channels when using the ISL28478, the user must configure the unused channel(s) to prevent them from oscillating. The unused channel(s) will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 36). FIGURE 37. GUARD RING EXAMPLE FOR UNITY GAIN AMPLIFIER Example Application Thermocouples are the most popular temperature-sensing device because of their low cost, interchangeability, and ability to measure a wide range of temperatures. The ISL28X78 (Figure 38) is used to convert the differential thermocouple voltage into single-ended signal with 10X gain. The ISL28X78's rail-to-rail input characteristic allows the thermocouple to be biased at ground and the amplifier to run from a single 5V supply. . R4 100kΩ R3 10kΩ R2 K TYPE THERMOCOUPLE 10kΩ V+ + ISL28X78 V- 410µV/°C + 5V R1 100kΩ - FIGURE 38. THERMOCOUPLE AMPLIFIER 1/2 ISL28278 1/4 ISL28478 + FIGURE 36. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Proper Layout Maximizes Performance To achieve the maximum performance of the high input impedance and low offset voltage of the ISL28278 and ISL28478, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. When input leakage current is a concern, the use of guard rings around the amplifier inputs will further reduce leakage currents. Figure 37 shows a guard ring example for a unity gain amplifier that uses the low impedance amplifier output at the same voltage as the high impedance input to eliminate surface leakage. The guard ring does not need to be a specific width, but it should 11 Current Limiting The ISL28278 and ISL28478 have no internal currentlimiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. Power Dissipation It is possible to exceed the +150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 1: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) (EQ. 1) FN6145.2 July 11, 2007 ISL28278, ISL28478 where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier is calculated in Equation 2: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------RL (EQ. 2) where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage (Magnitude of V+ and V-) • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance 12 FN6145.2 July 11, 2007 ISL28278, ISL28478 Quarter Size Outline Plastic Packages Family (QSOP) MDP0040 A QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY D (N/2)+1 N INCHES SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES E PIN #1 I.D. MARK E1 1 (N/2) A 0.068 0.068 0.068 Max. - A1 0.006 0.006 0.006 ±0.002 - A2 0.056 0.056 0.056 ±0.004 - b 0.010 0.010 0.010 ±0.002 - c 0.008 0.008 0.008 ±0.001 - D 0.193 0.341 0.390 ±0.004 1, 3 E 0.236 0.236 0.236 ±0.008 - E1 0.154 0.154 0.154 ±0.004 2, 3 e 0.025 0.025 0.025 Basic - L 0.025 0.025 0.025 ±0.009 - L1 0.041 0.041 0.041 Basic - N 16 24 28 Reference - B 0.010 C A B e H C SEATING PLANE 0.007 0.004 C b C A B Rev. F 2/07 NOTES: L1 A 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. c SEE DETAIL "X" 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 0.010 A2 GAUGE PLANE L A1 4°±4° DETAIL X All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 FN6145.2 July 11, 2007