Application Note, V 1.1, September 2010 ICE3BRxx65JF C o o l S E T ®- F 3 R ( F u l l P a k ) n e w J i t t e r v e r s i o n Design Guide Power Management & Supply N e v e r s t o p t h i n k i n g . Edition 2010-09-23 Published by Infineon Technologies Asia Pacific, 8 Kallang Sector, 349282 Singapore, Singapore © Infineon Technologies AP 2008. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. ICE3BRxx65JF Revision History: 2010-09-23 Previous Version: V1.0 Page V1.1 Subjects (major changes since last revision) Add ICE3BR1465JF ® CoolSET -F3R (FullPak) new Jitter version Design Guide: License to Infineon Technologies Asia Pacific Pte Ltd Kok Siu Kam Eric Kyaw Zin Min We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] AN-PS0028 ICE3BRxx65JF Table of Contents Page 1 Introduction ...................................................................................................................................5 2 List of Features .............................................................................................................................5 3 Package..........................................................................................................................................6 4 Block Diagram ...............................................................................................................................7 5 Typical Application Circuit...........................................................................................................8 6 6.1 6.1.1 6.2 6.3 6.3.1 6.3.2 6.3.3 6.3.4 6.4 6.4.1 6.4.2 6.4.3 6.5 6.6 6.6.1 6.6.2 6.6.3 Functional description and component design .........................................................................9 Startup time .....................................................................................................................................9 Vcc capacitor...................................................................................................................................9 Soft Start .......................................................................................................................................10 Low standby power - Active Burst Mode.......................................................................................10 Entering Active Burst Mode...........................................................................................................10 Working in Active Burst Mode .......................................................................................................11 Leaving Active Burst Mode ...........................................................................................................12 Minimum VCC supply voltage during burst mode...........................................................................13 Low EMI noise...............................................................................................................................13 Frequency jittering.........................................................................................................................13 Soft gate drive ...............................................................................................................................13 Other suggestions to solve EMI issue...........................................................................................14 Tight control in maximum power - Propagation delay compensation ...........................................14 Protection Features .......................................................................................................................15 Auto Restart Protection Mode .......................................................................................................15 Blanking Time for over load protection .........................................................................................15 User defined protection by external protection enable pin............................................................16 7 Input power curve .......................................................................................................................17 8 Layout Recommendation ...........................................................................................................22 9 Product Portfolio of CoolSET -F3R(FullPak) new Jitter version ...........................................22 10 Useful formula for the SMPS design .........................................................................................22 11 References ...................................................................................................................................23 ® Application Note 4 2010-09-23 ICE3BRxx65JF 1 Introduction ® The ICE3BRxx65JF is the latest development of the CoolSET -F3. It is a PWM controller with power MOSFET and startup cell in FullPak package. The switching frequency is running at 67 kHz and it is especially suitable for medium AC/DC power supply such as battery charger, LCD monitors, adapters for printers and notebook computers, DVD players and recorder, Blue-Ray DVD player and recorder, set-top boxes and industrial auxiliary power supplies. The ICE3BRxx65JF adopts the BiCMOS technology and provides a wider Vcc operating range up to 25V. It ® inherits the proven good features of CoolSET -F3 such as the active burst mode achieving the lowest standby power, the propagation delay compensation making the most precise current limit control in wide input voltage range, etc. In addition, it also adds on some useful features such as built-in soft start time, builtin basic with extendable blanking time for over load protection and built-in switching frequency modulation ( frequency jittering ), external auto-restart enable, etc. 2 List of Features ® 650V avalanche rugged CoolSET with built-in Startup Cell Active Burst Mode for lowest Standby Power Fast load jump response in Active Burst Mode 67 kHz internally fixed switching frequency Auto Restart Protection Mode for Over-load, Open Loop, Vcc Undervoltage, Over temperature & Vcc Over-voltage Built-in Soft Start Built-in blanking window with extendable blanking time for short duration high current External auto-restart enable pin Max Duty Cycle 75% Overall tolerance of Current Limiting < ±5% Internal PWM Leading Edge Blanking BiCMOS technology provides wide VCC range Built-in Frequency jitter feature and soft driving for low EMI Application Note 5 2010-09-23 ICE3BRxx65JF 3 Package The package for F3R ICE3BRxx65JF Jitter mode product is TO220 FullPak. Pin Symbol 1 Drain 2 CS Current Sense/650V CoolMOS Source 3 BA extended Blanking & Auto Restart enable 4 VCC Controller Supply Voltage 5 GND Controller Ground 6 FB Figure 1 Function 1) ® 650V CoolMOS Drain 1) ® Feedback Pin configuration 1 at Tj=110°C Application Note 6 2010-09-23 ICE3BRxx65JF 4 Figure 2 Block Diagram Block Diagram of ICE3BRxx65JF Application Note 7 2010-09-23 Figure 3 Application Note N 8 C1 0.22uF/275V C5 270pF L1 27mH 1.7A C2 RT1 2 CS 5 GND 3 BA R4 0.82R C8 1nF IC3 ICE3BR2565JF 6 FB 4 Vcc C7 0.1uF C3 100uF/400V 1 DRAIN C9 100pF R3 0.82R BR1 2KBB80R NTC 1R 0.1uF/275V Kyaw Zin Min,Eric Kok / 25 June 2008 VAR1 S10K275 2A ZD1 22V R2a 39R 2R R2 C6 22uF/35V D1 UF4005 R1 33k/2W 40W 18V SMPS Demoboard with ICE3BR2565JF(V0.1) 85V - 265Vac F1 + L + *FB1 *C17 SFH617A-3 2 TR1 LP=215uH 1 8 3 IC1 1 2 4 3 7 4 D2 1N4148 C4 2.2nF/630V CY1 R7 1.2k IC2 TL431 750R R6 R5 120k L2 C14 + *R8a C12 220nF 220uF/25V 4.7uH C11 270pF C10 + 1800uF/25V MUR815 D3 *R11 R8 20k 1% R10 24k 1% R9 100k 1% COM 18V/2.23A 5 5 2.2nF/250V,Y1 ICE3BRxx65JF Typical Application Circuit Typical application circuit with ICE3BR2565JF 40W 18V 2010-09-23 ICE3BRxx65JF 6 Functional description and component design 6.1 Startup time Startup time is counted from applying input voltage to IC turn on. ICE3BRxx65JF has a startup cell which is connected to input bulk capacitor. When there is input voltage, the startup cell will act as a constant current source to charge up the Vcc capacitor and supply energy to the IC. When the Vcc capacitor reaches the Vcc_on threshold 18V, the IC turns on. Then the startup cell is turned off and the Vcc is supplied by the auxiliary winding. Start up time is independent from the AC line input voltage and it can be calculated by the equation (1). Figure 4 shows the start up time of 85Vac line input. t STARTUP = VVCCon ⋅ CVcc I VCCch arg e3 (1) where, IVCCcharge3 : constant current from startup cell ( 0.7mA ), VVCCon : IC turns on threshold ( 18V ), CVCC : Vcc capacitor Refer to the datasheet for the symbol used in the equation. Channel 1; C1 : Drain to Source Voltage (VDS) Channel 2; C2 : Supply Voltage (VCC) Channel 3; C3 : FB voltage (VFB) Channel 4; C4 : BA Voltage (VBA) VDS 0.52s VCC Startup time = 0.52s VFB VBA Startup delay time @ Vin=85Vac & 40W load Figure 4 The startup delay time at AC line input voltage of 85Vac Precaution : For a typical application, start up should be VCC ramps up first, other pin (such as FB pin) voltage will follow VCC voltage to ramp up. It is recommended not to have any voltage on other pins (such as FB; BA and CS) before VCC ramps up. 6.1.1 Vcc capacitor The minimum value of the Vcc capacitor is determined by voltage drop during the soft start time. The formula is expressed in equation (2). CVCC = I VCC sup 2 ⋅ t ss 2 ⋅ VCChys 3 (2) where, IVCCsup2 : IC consumption current ( 4.2mA ), tss : soft start time ( 20ms ), VCChys : Vcc turn-on/off hysteresis voltage ( 7.5V ) Therefore, the minimum Vcc capacitance can be 7.47µF. In order to give more margins, 22µF is taken for the design. The startup time tSTARTUP is then 0.528s. The measured start up time is 0.52s (Figure 4). A 0.1uF filtering capacitor is always needed to add as near as possible to the Vcc pin to filter the high frequency noise. The filter capacitor C7 and the auxiliary series resistor R2 form a R-C filter which can effectively filter Application Note 9 2010-09-23 ICE3BRxx65JF the transformer switching noise from auxiliary winding going into the IC. Besides, the ferrite bead FB1 can also help to reduce the high frequency noise from going into the IC. 6.2 Soft Start When the IC is turned on after the Startup time, a digital soft start circuit is activated. A gradually increased soft start voltage is generated by the digital soft start circuit, which in turn releases the duty cycle gradually increase. The duty cycle increases to maximum (which is limited by the transformer design) at the end of the soft start period. When the soft start time ends, IC goes into normal mode and the duty cycle is controlled by the FB signal. The soft start time is set at 20ms for maximum load. The soft start time is load dependent; shorter soft start time with lighter load. Figure 5 shows the soft start behavior at 85Vac input. The primary peak current increases slowly to the maximum in the soft start period. 20ms VCS VCC VFB Channel 1; C1 : CS Voltage (VCS) Channel 2; C2 : Supply Voltage (VCC) Channel 3; C3 : FB voltage (VFB) Channel 4; C4 : BA Voltage (VBA) Soft start time = 20ms VBA 20ms built in SoftStart time @ Vin=85Vac & 40W load Figure 5 Soft start at AC line input voltage of 85Vac 6.3 Low standby power - Active Burst Mode The IC will enter Active Burst Mode function at light load condition which enables the system to achieve the lowest standby power requirement of less than 100mW. Active Burst Mode means the IC is always in the active state and can therefore immediately response to any changes on the FB signal, VFB. 6.3.1 Entering Active Burst Mode Because of the current mode control scheme, the feedback voltage VFB actually controls the power delivery to output. An important relationship between the VCS and the VFB is expressed in equation (3). V FB = VCS ⋅ AV + VOffset − Ramp (3) where, VFB:feedback voltage, VCS:current sense voltage, AV:PWM OP gain, VOffset-Ramp:voltage ramp offset When the output load reduces, the feedback voltage VFB drops. If the VFB stays below 1.22V for 20ms, the IC enters into the Active Burst Mode. The threshold power to enter burst mode is expressed in equation (4). PBURST _ enter = V − VOffset − Ramp 2 1 1 V 1 ⋅ LP ⋅ Ip 2 ⋅ f SW = ⋅ LP ⋅ ( CS ) 2 ⋅ f SW = ⋅ LP ⋅ ( FBC 5 ) ⋅ f SW 2 2 Rsense 2 Rsense ⋅ AV (4) where, Lp : transformer primary inductance, Rsense: current sense resistance, fsw: switching frequency, VFBC5: Feedback level to enter burst mode Application Note 10 2010-09-23 ICE3BRxx65JF Figure 6 shows the waveform with the load drops from nominal load to light load. After the 20ms blanking time IC goes into burst mode. VDS Channel 1; C1 : Drain-Source Voltage (VDS) Channel 2; C2 : Supply Voltage (VCC) Channel 3; C3 : FB voltage (VFB) Channel 4; C4 : BA Voltage (VBA) VCC Vcc 20ms Vbl VFB Entering Active Burst mode with preset time 20ms when load changes from full to light @ Vin=85Vac VBA Figure 6 6.3.2 Entering Burst Mode Working in Active Burst Mode In the active burst mode, the IC is constantly monitoring the output voltage by feedback pin, VFB, which controls burst duty cycle and burst frequency. The burst “ON” starts when VFB reaches 3.6V and it stops when VFB is dropped to 3.1V. During burst “ON”, the primary current limit is set to 26% of maximum peak current (VCS=0.26V) to reduce the conduction losses and to avoid audible noise. The FB voltage is changing like a saw-tooth between 3.1V and 3.6V. The corresponding secondary output ripple (peak to peak) is controlled to be small. It can be calculated by equation (5). Vout _ ripple _ pp = Ropto RFB ⋅ Gopto ⋅ GTL 431 ⋅ ∆VFB (5) where, Ropto : series resistor with opto-coupler at secondary side (e.g. R6 in Figure 3), RFB : IC internal pull up resistor connected to FB pin (RFB=15.4KΩ), Gopto : current transfer gain of opto-coupler, GTL431 : voltage transfer gain of the loop compensation network (e.g. R5, R8, R9, R10, C11, C12 in figure 3), ∆VFB : feedback voltage change (0.5V) Usually there is a noise coupling capacitor at the FB pin to filter the switching noise and spike (e.g. C8 in Figure 3). However, if this capacitor is too large (>10nF), it would affect the normal operation of the controller. This capacitor should be as small as possible (without the capacitor is the best). In the mean time, it is found that this filter capacitor will also affect the output ripple voltage during burst mode; larger capacitance will get larger ripple voltage and smaller capacitance get lower ripple voltage. Figure 7 is the output ripple waveform of the 40W demo board. The burst ripple voltage is about 41mV. Vo 41mV Channel 1; C1 : Output ripple Voltage (Vo) Output ripple voltage at light load @ Vin=85Vac Figure 7 Output ripple during Active Burst Mode at light load Application Note 11 2010-09-23 ICE3BRxx65JF 6.3.3 Leaving Active Burst Mode When the output load increases to be higher than the maximum burst power, Pburst_max, Vout will drop a little bit and VFB will rise up fast to exceed 4.5V. The system leaves burst mode immediately when VFB reaches 4.5V. Once system leaves burst mode, the current sense voltage limit, VCS_MAX, is released to 1V, the feedback voltage VFB swings back to the normal control level. The leaving burst power threshold is (i.e. maximum power to be handled during burst operation) is expressed in equation (6). Pburst _ max = 0.5 ⋅ LP ⋅ (0.26 ⋅ I p _ max ) 2 ⋅ f SW = 0.5 ⋅ LP ⋅ (0.26 ⋅ where, VCS _ max Rsense ) 2 ⋅ f SW = 0.0676 ⋅ Pin _ max (6) I p _ max : maximum primary peak current, VCS_max : current limit threshold at CS pin, Pin_max : maximum input power The calculated maximum power in burst mode is around 6.76% of Pin_max. However, the actual power can be higher as it would include propagation delay time. The leave burst mode timing diagram is shown in Figure 8. The maximum output drop during the transition can be estimated in equation (7). Vout _ drop _ max = Ropto 1.15 ⋅ Ropto 3.1 + 3.6 ⋅ (4.5 − )= 2 RFB ⋅ Gopto ⋅ GTL 431 RFB ⋅ Gopto ⋅ GTL 431 (7) 4.5V 3.6V V FB 3.1V Vout Vout_AV Vout_drop_max 1V V CS Figure 8 0.26V Timing diagram of leaving burst mode Figure 9 is the captured waveform when there is a load jump from light load to full load. The output ripple drop during the transition is about 200mV. Vo 200mV 8 VFB VCS Figure 9 Channel 1; C1 : CS Voltage (VCS) Channel 2; C2 : Output Voltage (Vo) Channel 3; C3 : FB voltage (VFB) Leaving Active Burst mode when load change from light to full @ Vin=85Vac Leaving burst mode waveform Application Note 12 2010-09-23 ICE3BRxx65JF 6.3.4 Minimum VCC supply voltage during burst mode It is particularly important that the Vcc voltage must stay above VVCCoff (i.e. 10.5V). Otherwise, the expected low standby power cannot be achieved. The IC will go into auto-restart mode instead of Active Burst Mode. A reference Vcc circuit is presented in Figure 3. This is for a low cost transformer design where the transformer coupling is not too good. Thus the circuit R2a and Z1 is added to clamp the Vcc voltage exceeding 25V in extreme case such as high load and the Vcc OVP protection is triggered. If the transformer coupling is good, this circuit is not needed. 6.4 6.4.1 Low EMI noise Frequency jittering The IC is running at a fixed frequency of 67 KHz with jittering frequency at +/-2.7 KHz in a switching modulation period of 4ms. This kind of frequency modulation can effectively help to obtain a low EMI noise level particularly for conducted EMI. The jittering frequency measured is 65.1 KHz ~ 69.5 KHz (refer to Figure 10). Channel 1; C1 : Drain to Source Voltage (VDS) Frequency changing from 65.17kHz ~ 69.56kHz, Jitter period is set at 4ms internally 65.17kHz 69.56kHz Figure 10 6.4.2 Frequency jittering at 40W load @ Vin=85Vac Switching frequency jittering ( Vds ) Soft gate drive The gate soft driving is to split the gate driving slope into 2 so that the MOSFET turns on speed is relatively slower comparing to a single slope drive (see Figure 11). In this way, the high ∆I/∆t noise is greatly reduced and the noise signal reflected in the EMI spectrum is also reduced. Figure 11 Soft gate drive waveform Application Note 13 2010-09-23 ICE3BRxx65JF 6.4.3 Other suggestions to solve EMI issue Some more suggestions to improve the EMI performance and is listed below. 1. Add capacitor (Cds) at the drain source pin: it can slow down the turn off speed of the MOSFET and the high ∆V/∆t noise will be reduced and so is the EMI noise. The drawback is more energy will be dissipated due to slower turn off speed of MOSFET. 2. Add snubber circuit to the output rectifier: Most of the radiated EMI noise comes out from the output of the system esp. for a system with output cable. Adding snubber circuit (R11 and C17) to the output rectifier is a more direct way to suppress those EMI noise (refer to Figure 3). 6.5 Tight control in maximum power - Propagation delay compensation The maximum power of the system is changed with the input voltage; higher voltage got higher maximum power. This is due to the propagation delay of the IC and the different rise time of the primary current under different input voltage. The propagation delay time is around 200ns. But if the primary current rise time is faster, the maximum power will increase. The power difference can be as high as >14% between high line and low line. In order to make the maximum power control become tight, a propagation delay compensation network is implemented so that the power difference is greatly reduced to best around 2%. Figure 12 shows the compensation scheme of the IC. The equation (8) explains the rate of change of the current sense voltage is directly proportional to the input voltage and current sense resistor. For a DCM operation, the operating range for the dVsense/dt is from 0.1 to 0.7. It can show in Figure 12 that higher dVsense/dt will give more compensation; i.e. lower value of Vsense. Vin Vin dVsense dIp dIp Vin = ⇒ Rsense ⋅ = Rsense ⋅ ⇒ = Rsense ⋅ Lp Lp dt dt dt Lp (8) where, Ip : primary peak current, Vin : input voltage, Lp : primary inductance of the transformer, Vsense : current sense voltage, Rsense : current sense resistor The measured maximum input power for the 40W demo boards at 85Vac and 265Vac shows ±0.99% of maximum input power. This function is limited to discontinuous conduction mode flyback converter only. without compensation with compensation V 1,3 1,25 VSense 1,2 1,15 1,1 1,05 1 0,95 0,9 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2 Figure 12 V µs dVSense dt Propagation delay compensation curve Application Note 14 2010-09-23 ICE3BRxx65JF 6.6 Protection Features The IC provides several protection features which lead to the Auto Restart Protection Mode. The following table shows the conditions of the system failure and the associate protection mode. Protection function Failure condition Vcc Over-voltage 1. Vcc > 25.5V or 2. Vcc > 20.7V & FB > 4.5V & during soft start period Auto Restart Over-temperature (controller junction) TJ > 130°C Auto Restart Over-load / Open loop VFB > 4.5V and VBA > 4.0V (Blanking time counted from charging VBA from 0.9V to 4.0V ) Auto Restart Vcc Under-voltage / short Opto-coupler Vcc < 10.5V Auto Restart Auto-restart enable VBA < 0.33V Auto Restart Table 1 6.6.1 Protection Mode Protection functions and failure conditions Auto Restart Protection Mode When the failure condition meets the auto restart protection mode, the IC will go into auto-restart. The switching pulse will stop. Then the Vcc voltage will drop. When the Vcc voltage drops to 10.5V, the startup cell will turn on again. The Vcc voltage is then charged up. When it hits 18V, the IC will turn on and the startup cell will turn off. It would then start the startup phase with soft start. After the startup phase the failure condition is checked to determine whether the fault persists. If the fault is removed, it will go to normal operation. Otherwise, the IC will repeat the auto restart protection and the switching pulse stop again. Figure 13 shows the switching waveform of the VCC and the feedback voltage VFB when the output is overloaded by shorting the outputs. The IC is turned on at VCC = 18V. After going through the startup phase, IC is off again due to the presence of the fault. VCC is discharged until 10.5V. Then, the Startup Cell is activated again to charge up capacitor at VCC that initiates another restart cycle. Channel 1; C1 : Drain-Source Voltage (VDS) Channel 2; C2 : Supply Voltage (VCC) Channel 3; C3 : Feedback Voltage ( VFB ) Channel 4; C4 : BA voltage ( VBA ) VDS Vcc VFB System enters auto restart mode when output voltage short circuit @ Vin=85Vac VBA Figure 13 6.6.2 Auto Restart Mode Blanking Time for over load protection The IC controller provides a blanking window before entering into the auto restart mode due to output overload/short circuit. The purpose is to ensure that the system will not enter protection mode unintentionally. There are 2 kinds of the blanking time; basic and the extendable. The basic one is a built-in feature which is set at 20ms. The extendable one is to extend the basic one with a user defined additional blanking time. The extendable blanking time can be achieved by adding a capacitor, CBK to the BA pin. When there is over load occurred ( VFB > 4.5V ), the CBK capacitor will be charged up by a constant current source, IBK ( 13uA ) from Application Note 15 2010-09-23 ICE3BRxx65JF 0.9V to 4.0V. Then the auto restart protection will be activated. The charging time from 0.9V to 4.0V to the CBK capacitor is the extended blanking time. The total blanking time is the addition of the basic and the extended blanking time. tblanking = Basic + Extended = 20ms + (4.0 − 0.9) * C BK = 20ms + 238461.5 * C BK I BK (9) The measured total blanking time showing in Figure 15 is 45ms using CBK=0.1µF. In case of output overload or short circuit, the transferred power during the blanking period is limited to the maximum power defined by the value of the sense resistor Rsense. The noise level in BA pin can be quite high particularly in some high power application. In order to avoid mistriggering of other protection features, it is recommended to add a minimum 270pF filter capacitor at BA pin to filter the noise for 40W design. The maximum capacitor added at BA is restricted to be less than 0.65uF. Otherwise, the IC cannot be startup properly. VDS Channel 1; C1 : Drain to Source Voltage (VDS) Channel 2; C2 : Supply Current (VCC) Channel 3; C3 : Feedback Voltage ( VFB ) Channel 4; C4 : BA voltage ( VBA ) Vcc VFB System enters auto-restart when VFB>4.5V, VBA >4V with built-in blanking time ≈ 20ms 20ms VBA Figure 14 Over load protection without extended blanking time; Cba=270pF @ Vin=85Vac and output power step from 2.23A to 4A load blanking window for output over load protection ( basic blanking time ) Channel 1; C1 : Drain to Source Voltage (VDS) Channel 2; C2 : Supply Current (VCC) Channel 3; C3 : Feedback Voltage (VFB) Channel 4; C4 : BA voltage (VBA) VDS Vcc Figure 15 6.6.3 VFB System enters auto-restart when VFB>4.5V, VBA >4V with (built-in+extendable) blanking time ≈45ms VBA Over load protection with extended blanking time; Cba=0.1µF @ Vin=85Vac; output power step from 2.23A to 4A load. blanking window for output overload protection ( extended blanking time=24ms with CBK=0.1uF ) User defined protection by external protection enable pin Although there are lots of pre-defined Auto Restart Protection is implemented in the IC, customer still can have some tailor-made protection for the application needs by pulling down the BA pin to lower 0.33V. When Application Note 16 2010-09-23 ICE3BRxx65JF BA pin lower than 0.33V, the gate drive switching will be stopped and IC will enter to auto restart mode until the external auto restart enable signal released. Figure 16 7 User defined Auto Restart Protection circuit Input power curve ® The purpose of the input power curve is to simplify the selection of the CoolSET device. The curve is a function of ambient temperature to the input power of the system in which the input filter loss, bridge rectifier loss and the MOSFET power loss are considered. The only information needed is the required output power, the input voltage range, the operating ambient temperature and the efficiency of the system. The required input power can then be calculated as equation (10). Pin = Po (10) η where Pin : input power, Po : output power, η : efficiency It then simply looks up the closed input power of the CoolSET at the required ambient temperature and expected heatsink size from the input power curve. The input power curves for the CoolSET-F3R (FullPak) family with different heatsink size (Rthsa=2.7K/W, 5.7K/W, 9K/W and 11K/W) are listed in Figure 17, 18, 19 and 20. The major assumption for the calculation is listed below. 1. Reflection voltage from secondary side to primary side is 100V. 2. The assumed maximum power for the device is when the junction temperature of the integrated ® CoolMOS reaches 125°C. (With some margins to reach the over temperature protection of the device : 130°C). The maximum Rdson of the device at 125°C is taken for calculation. 3. The heatsink Rthsa=2.7K/W , 5.7K/W, 9K/W and 11K/W and the thermal grease Rthcs=1.1K/W 4. Saturation current (Id_max @ 125°C) of the MOSFET is considered which is showed in below table. 5. The typical resistance of the EMI filter is listed in the below table. 6. The voltage drop for the bridge rectifier is assumed to be 1V. Rdson_125°C (Ω) Id_max @125°C (A) Rthjc (K/W) REMI_filter (Ω) VF_bridge (V) ICE3BR0665JF 1.79 11.64 3 2 * 0.085 2*1 ICE3BR1065JF 3.21 6.59 4.4 2 * 0.185 2*1 ICE3BR1465JF 4.53 4.51 4.8 2 * 0.56 2*1 ICE3BR2565JF 6.26 2.68 5.2 2 * 0.56 2*1 Application Note 17 2010-09-23 ICE3BRxx65JF 220 different heatsink size (R thsa) 180 2.7K/W 160 5.7K/W 140 9K/W 120 PI-001-ICE3BR0665JF_85Vac Input power (85~265Vac) [W] 200 11K/W 100 80 60 40 20 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Ambient Temperature [°C] ICE3BR0665JF : Vin=85Vac~265Vac 350 different heatsink size (R thsa) 280 2.7K/W 245 5.7K/W 210 PI-002-ICE3BR0665JF_230Vac Input power (230Vac) [W] 315 9K/W 175 11K/W 140 105 70 35 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Ambient Temperature [°C] ICE3BR0665JF : Vin=230Vac±15% Figure 17 Input power curve for ICE3BR0665JF Application Note 18 2010-09-23 ICE3BRxx65JF 150 different heatsink size (R thsa) 120 2.7K/W 5.7K/W 105 9K/W PI-003-ICE3BR1065JF_85Vac Input power (85~265Vac) [W] 135 90 11K/W 75 60 45 30 15 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Ambient Temperature [°C] ICE3BR1065JF : Vin=85Vac~265Vac 220 different heatsink size (R thsa) 180 2.7K/W 5.7K/W 160 9K/W 140 PI-004-ICE3BR1065JF_230Vac Input power (230Vac) [W] 200 11K/W 120 100 80 60 40 20 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Ambient Temperature [°C] ICE3BR1065JF : Vin=230Vac±15% Figure 18 Input power curve for ICE3BR1065JF Application Note 19 2010-09-23 ICE3BRxx65JF ICE3BR1465JF : Vin=85Vac~265Vac ICE3BR1465JF : Vin=230Vac±15% Figure 19 Input power curve for ICE3BR1465JF Application Note 20 2010-09-23 ICE3BRxx65JF 90 5.7K/W 9K/W 70 11K/W 60 PI-005-ICE3BR2565JF_85Vac Input power (85~265Vac) [W] different heatsink size (R thsa) 2.7K/W 80 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Ambient Temperature [°C] ICE3BR2565JF : Vin=85Vac~265Vac 110 different heatsink size (R thsa) 2.7K/W 5.7K/W 90 9K/W 80 11K/W 70 PI-006-ICE3BR2565JF_230Vac Input power (230Vac) [W] 100 60 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Ambient Temperature [°C] ICE3BR2565JF : Vin=230Vac±15% Figure 20 Input power curve for ICE3BR2565JF Application Note 21 2010-09-23 ICE3BRxx65JF 8 Layout Recommendation In order to get the optimized ruggedness of the IC to the transient surge events like ESD and lightning Surge test, the grounding of the PCB layout must be connected carefully. From the circuit diagram in Figure 3, it indicates that the grounding for the controller can be split into several groups; signal ground, Vcc ground, Current sense resistor ground and EMI return ground. All the split grounds should be “star” connected to the bulk capacitor ground directly. The split grounds are described as below. • Signal ground includes all small signal grounds connecting to the controller GND pin such as filter capacitor ground, C5, C7, C8 and opto-coupler ground. • Vcc ground includes the Vcc capacitor ground, C6 and the auxiliary winding ground, pin 2 of the power transformer. • Current Sense resistor ground includes current sense resistor R3 and R4. • EMI return ground includes Y capacitor, CY1. ® 9 Product Portfolio of CoolSET Device Package VDS -F3R(FullPak) new Jitter version Frequency / kHz Rdson /Ω1 Pin max. @ 85-265Vac 2 Pin max. @ 230Vac±15% 2 ICE3BR0665JF PG-TO220-6-347 650V 67 0.59 173W 259W ICE3BR1065JF PG-TO220-6-247 650V 67 1.00 120W 178W ICE3BR1465JF PG-TO220-6-247 650V 67 1.44 104W 150W ICE3BR2565JF PG-TO220-6-247 650V 67 2.56 81W 106W 10 Useful formula for the SMPS design Transformer calculation (DCM flyback) Vin_min = 90Vdc, Vin_max = 380Vdc, Input data Vds_max = 470V for 600V MOSFET, Dmax ≤ 50% Turn ratio N ratio = Maximum Duty ratio Dmax = Vds _ max − Vin _ max Vout + Vdiode (Vout + Vdiode ) ⋅ N ratio Vin _ min + (Vout + Vdiode ) ⋅ N ratio (Vin _ min ⋅ Dmax ) 2 Primary Inductance Lp Primary peak current I p _ max = ≤ 2 ⋅ Pin ⋅ f sw Vin _ min ⋅ Dmax L p ⋅ f sw 1 Typ @ 25°C 2 Calculated maximum input power rating at Ta=50°C, Tj=125°C and RthSA (external heatsink)=2.7K/W. Refer to the data sheet for input power curve of other Ta Application Note 22 2010-09-23 ICE3BRxx65JF I p _ max ⋅ L p Primary turns Np ≥ Secondary turns Ns = Auxiliary turns N aux = Bmax ⋅ Amin Np N ratio Vcc + Vdiode ⋅ Ns Vout + Vdiode ICE3BRxx65JF external component Design Vcsth I p _ max Current sense resistor Rsense ≤ Soft start time t ss = 20ms Vcc capacitor CVCC = Startup delay time t DELAY = Enter burst mode power PBURST _ enter = 0.5 × LP × ( Leave burst mode power Pburst _ max = 0.5 × LP × (0.26 × I p _ max ) 2 × f SW Output ripple during burst mode Vout _ ripple _ pp = Ropto × ∆VFB RFB × Gopto × GTL 431 Voltage drop when leave burst mode Vout _ drop _ max = 1.15 × Ropto RFB × Gopto × GTL 431 Total blanking time for over load protection tblanking = 20ms + 11 I VCC sup 2 × t ss VVCChys × 2 3 VVCCon × CVcc IVCCch arg e 2 − IVCCstart VFBC 5 − VOffset − Ramp 2 ) × f SW Rsense × AV (4.0 − 0.9) × C BK I BK References ® [1] Infineon Technologies, Datasheet “CoolSET -F3R ICE3BR2565JF Off-Line SMPS Current Mode ® Controller with Integrated 650V CoolMOS and Startup Cell ( Frequency Jitter Mode ) in FullPak” [2] Infineon Technologies, Datasheet “CoolSET -F3R ICE3BR1465JF Off-Line SMPS Current Mode ® Controller with Integrated 650V CoolMOS and Startup Cell ( Frequency Jitter Mode ) in FullPak” [3] Infineon Technologies, Datasheet “CoolSET -F3R ICE3BR1065JF Off-Line SMPS Current Mode ® Controller with Integrated 650V CoolMOS and Startup Cell ( Frequency Jitter Mode ) in FullPak” [4] Infineon Technologies, Datasheet “CoolSET -F3R ICE3BR0665JF Off-Line SMPS Current Mode ® Controller with Integrated 650V CoolMOS and Startup Cell ( Frequency Jitter Mode ) in FullPak” ® ® Application Note ® 23 2010-09-23 ICE3BRxx65JF [5] Eric Kok Siu Kam, Kyaw Zin Min, Infineon Technologies, Application Note “AN-EVALSF3R® ICE3BR0665JF, 100W 18.0V SMPS Evaluation Board with CoolSET -F3R ICE3BR0665JF” [6] Eric Kok Siu Kam, Kyaw Zin Min, Infineon Technologies, Application Note “AN-EVALSF3R® ICE3BR2565JF, 40W 18.0V SMPS Evaluation Board with CoolSET -F3R ICE3BR2565JF” [7] Harald Zoellinger, Rainer Kling, Infineon Technologies, Application Note “AN-SMPS-ICE2xXXX-1, ® CoolSET ICE2xXXXX for Off-Line Switching Mode Power supply (SMPS )” Application Note 24 2010-09-23