Ordering number : EN*A2344 STK534U342C-E Advance Information http://onsemi.com Inverter IPM for 3-phase Motor Drive Overview This “Inverter IPM” is highly integrated device containing all High Voltage (HV) control from HV-DC to 3-phase outputs in a single SIP module (Single-In line Package). Output stage uses IGBT/FRD technology and implements Under Voltage Protection (UVP). Internal Boost diodes are provided for high side gate boost drive. Function Single control power supply due to Internal bootstrap circuit for high side pre-driver circuit All control input and status output are at low voltage levels directly compatible with microcontrollers. Built-in cross conduction prevention. Externally accessible embedded thermistor for substrate temperature measurement Certification UL1557 (File number: E339285). Specifications Absolute Maximum Ratings at Tc = 25C Parameter Symbol Supply voltage VCC Collector-emitter voltage VCE Output current Io Remarks P to U-, V-, W-, surge<500V Ratings Unit *1 450 V P to U, V, W or U, V, W, to U-, V-, W- 600 V P,U-,V-,W-,U,V,W terminal current ±5 A P,U-,V-,W-,U,V,W terminal current, Tc=100C ±3 A ±10 A 20 V Output peak current Iop P,U-,V-,W-,U,V,W terminal current, P.W.=1ms Pre-driver voltage VD1,2,3,4 VB1 to U, VB2 to V, VB3 to W, VDD to VSS Input signal voltage VIN HIN1, 2, 3, LIN1, 2, 3 0.3 to VDD V FLTEN terminal voltage VFLTEN FLTEN terminal 0.3 to VDD V Maximum power dissipation Pd IGBT per 1 channel 27.7 W Junction temperature Tj IGBT, FRD, Pre-Driver IC 150 C Storage temperature Tstg 40 to +125 C Operating case temperature Tc Tightening torque Withstand voltage H-IC case A screw part Vis *3 50Hz sine wave AC 1 minute *4 *2 20 to +100 C 0.9 Nm 2000 VRMS Reference voltage is “VSS” terminal voltage unless otherwise specified. *1: Surge voltage developed by the switching operation due to the wiring inductance between P and U-(V-, W-) terminal. *2: Terminal voltage: VD1=VB1-U, VD2=VB2-V, VD3=VB3-W, VD4= VDD-VSS. *3: Flatness of the heat-sink should be 0.15mm and below. *4: Test conditions : AC2500V, 1 second. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. This document contains information on a new product. Specifications and information herein are subject to change without notice. ORDERING INFORMATION See detailed ordering and shipping information on page 15 of this data sheet. Semiconductor Components Industries, LLC, 2014 June, 2014 Ver.140616YK 61914HK No.A2344-1/15 STK534U342C-E Electrical Characteristics at Tc = 25C, VD1, VD2, VD3, VD4 = 15V Parameter Symbol Conditions Test circuit MIN TYP MAX Unit Power output section Collector-emitter cut-off current Bootstrap diode reverse current Collector to emitter saturation voltage Diode forward voltage Junction to case thermal resistance ICE IR(BD) VCE(SAT) VF VCE = 600V VR(BD) = 600V Io = 5A, Tj=25C Io = 3A, Tj=100C Io = -5A, Tj=25C Io = -3A, Tj=100C θj-c(T) IGBT θj-c(D) FWD Fig.1 Fig.2 Fig.3 - - - 100 μA - - 100 μA - 1.6 2.4 1.4 - 1.2 1.8 1.0 - - - 4.5 - - 6 - 0.08 0.4 - 1.6 4 V V C /W Control (Pre-driver) section Pre-driver power dissipation ID VD1,2,3 = 15V VD4 = 15V Fig.4 mA High level Input voltage Vin H HIN1,HIN2,HIN3, - 2.5 - - V Low level Input voltage Vin L LIN1,LIN2,LIN3 to VSS - - - 0.8 V Logic 1 input leakage current IIN+ VIN=+3.3V - - 100 143 μA Logic 0 input leakage current IIN- VIN=0V - - - 2 μA FLTEN terminal sink current IoSD FAULT:ON / VFLTEN=0.1V - - 2 - mA FLTEN clearance delay time FLTCLR - 1.0 2.0 3.0 ms From time fault condition clear VEN+ VEN rising - - - 2.5 V VEN- VEN falling - 0.8 - - V ITRIP threshold voltage VITRIP ITRIP(16) to VSS(29) - 0.44 0.49 0.54 V ITRIP to shutdown propagation delay tITRIP - 340 550 800 ns ITRIP blanking time tITRIPBL - 250 350 - ns - 10.5 11.1 11.7 V - 10.3 10.9 11.5 V - 0.14 0.2 - V FLTEN Threshold VCC and VBS supply undervoltage protection reset VCC and VBS supply undervoltage protection set VCC and VBS supply undervoltage hysteresis VCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH Reference voltage is “VSS” terminal voltage unless otherwise specified. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. No.A2344-2/15 STK534U342C-E Electrical Characteristics at Tc = 25C, VD1, VD2, VD3, VD4 = 15V, VCC=300V, L=3.9mH Parameter Symbol Conditions Test circuit MIN TYP MAX 0.3 0.5 1.2 - 1.5 2.0 Unit Switching Character Switching time t ON t OFF Turn-on switching loss Eon Turn-off switching loss Eoff Total switching loss Turn-on switching loss Turn-off switching loss Eoff Total switching loss Etot Diode reverse recovery energy Erec Diode reverse recovery time Reverse bias safe operating area Io = 5A Fig.5 Io=3A Fig.5 μs - 170 - μJ - 60 - μJ Etot - 230 - μJ Eon - 190 - μJ - 80 - μJ Io=3A, Tc=100C Fig.5 - 270 - μJ IF=3A, P=400V, L=0.5mH, - - 14 - μJ Trr Tc=100C - - 57 - ns RBSOA Io =10A, VCE = 450V - Short circuit safe operating area SCSOA VCE = 400V, Tc=100C - 4 - - μs Allowable offset voltage slew rate dv/dt - 50 - 50 V/ns Between U,V,W to U-,V-,W- Full square- Reference voltage is “VSS” terminal voltage unless otherwise specified. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. Notes 1. When the internal protection circuit operates, a Fault signal is turned ON (When the Fault terminal is low level, Fault signal is ON state : output form is open DRAIN) but the Fault signal does not latch.After protection operation ends,it returns automatically within about typ. 2ms and resumes operation beginning condition. So, after Fault signal detection, set all input signals to OFF (Low) at once. However, the operation of pre-drive power supply low voltage protection (UVLO:with hysteresis about 0.2V) is as follows. Upper side: The gate is turned off and will return to regular operation when recovering to the normal voltage, but the latch will continue till the input signal will turn ‘low’. Lower side: The gate is turned off and will automatically reset when recovering to normal voltage. It does not depend on input signal voltage. 2. When assembling the IPM on the heat sink with M3 type screw, tightening torque range is 0.6 Nm to 0.9 Nm. 3. When use the over-current protection with external resistor, please set resistance value so that current protection value becomes equal to or less than the double (2 times) of the rating output electric current (Io). No.A2344-3/15 STK534U342C-E Equivalent Block Diagram VB3(1) W,VS3(2) VB2(5) V,VS2(6) VB1(9) U,VS1(10) P(13) BD BD BD U.V. U.V. U.V. Boot-Resistor U-(17) V-(19) W-(21) Level Shifter Level Shifter Level Shifter HIN1(20) HIN2(22 HIN3(23) Logic Logic Logic LIN1(24) LIN2(25) LIN3(26) TH(27) Thermistor ITRIP(16) VDD(28) VSS(29) Shut down VDD-UnderVoltage FLTEN(18) No.A2344-4/15 STK534U342C-E Test Circuit (The tested phase : U+ shows the upper side of the U phase and U- shows the lower side of the U phase.) ICE / IR(BD) M N U+ 13 10 M N U(BD) 9 29 V+ 13 6 W+ 13 2 V(BD) 5 29 U10 17 V6 19 W2 21 W(BD) 1 29 Fig.1 VCE(SAT) (Test by pulse) M N m U+ 13 10 20 V+ 13 6 22 W+ 13 2 23 U10 17 24 V6 19 25 W2 21 26 Fig.2 VF (Test by pulse) M N U+ 13 10 V+ 13 6 W+ 13 2 U10 17 V6 19 W2 21 Fig.3 ID M N VD1 9 10 VD2 5 6 VD3 1 2 VD4 28 29 Fig.4 No.A2344-5/15 STK534U342C-E Switching time (The circuit is a representative example of the lower side U phase.) Input signal (0 to 5V) 90% Io 10% tON tOFF Fig.5 No.A2344-6/15 STK534U342C-E Input / Output Timing Chart VBS undervoltage protection reset signal ON HIN1,2,3 OFF LIN1,2,3 *2 VDD VDD undervoltage protection reset voltage *3 VBS undervoltage protection reset voltage VB1,2,3 VIT≥0.54V *4 ITRIP terminal Voltage VIT<0.44V FLTEN ON Upper U, V, W *1 OFF Lower U ,V, W *1 Automatically reset after protection (typ.2ms) Fig. 7 Notes 1. *1 shows the prevention of shoot-thru via control logic, however, more dead time must be added to account for switching delay externally. 2. *2 when VDD decreases all gate output signals will go low and cut off all 6 IGBT outputs. When VDD rises the operation will resume immediately. 3. *3 when the upper side voltage at VB1, VB2 and VB3 drops only the corresponding upper side output is turned off. The outputs return to normal operation immediately after the upper side gate voltage rises. 4. *4 when VITRIP exceeds threshold all IGBT’s are turned off and normal operation resumes 2ms (typ) after over current condition is removed. No.A2344-7/15 STK534U342C-E Logic level table P INPUT Ho HIN1,2,3 (20,22,23) IC Driver LIN1,2,3 (24,25,26) U,V,W (10,6,2) Lo OUTPUT HIN LIN Itrip Ho Lo U,V,W FLTEN H L L H L P OFF L H L L H U-,V-,W- OFF L L L L L High Impedance OFF H H L L L High Impedance OFF X X H L L High Impedance ON U-, V-, W- Fig. 8 Sample Application Circuit STK534U342C-E P : 13 VCC CI CS VB1 : 9 U,VS1 : 10 VB2 : 5 V,VS2 : 6 CB1 VD1 CB2 VD2 CB3 VD3 U- : 17 RSU RSV RSW V- : 19 W- : 21 VB3 : 1 W,VS3 : 2 Op-Amp, Controller U,VS1 : 10 HIN1 : 20 HIN2 : 22 HIN3 : 23 LIN1 : 24 LIN2 : 25 V,VS2 : 6 Control Circuit (5V) LIN3 : 26 TH : 27 FLTEN : 18 ITRIP : 16 W,VS3 : 2 RS, RP Controller RTH VDD : 28 CD4 VSS : 29 VD4=15V Fig.9 No.A2344-8/15 STK534U342C-E Recommended Operating Condition at Tc = 25C Item Symbol Conditions Min. Typ. Max. Unit 0 280 450 V VB1 to U,VB2 to V,VB3 to W 12.5 15 17.5 VDD to VSS 13.5 15 16.5 3.0 - 5.0 0 - 0.3 1 - 20 kHz Supply voltage VCC + to U-(V-,W-) Pre-driver VD1,2,3 supply voltage VD4 ON-state input voltage VIN (ON) HIN1,HIN2,HIN3, OFF-state input voltage VIN (OFF) LIN1,LIN2,LIN3 PWM frequency fPWM *1 Dead time DT Turn-off to turn-on (external) Allowable input pulse width PWIN ON and OFF Mounting torque ‘M3’ type screw V V 2.5 - - μs 1 - - μs 0.6 - 0.9 Nm *1 Pre-drive power supply (VD4=15±1.5V) must be have the capacity of Io=20mA (DC), 0.5A (Peak). Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. No.A2344-9/15 STK534U342C-E Usage Precaution 1. This IPM includes bootstrap diode and resistor. Therefore, by adding a capacitor (CB : about 1 to 47μF), a single power supply drive is enabled. In this case, an electric charge is charged to “CB” by making lower side IGBT turn on. And, please select the capacitance of “CB”(externally set) equal to or less than 47μF(±20%).If selecting the capacitance more than 47μF(±20%), connect a resistor(about 20Ω)in series between each 3-phase upper side power supply terminals(VB1,2,3) and each bootstrap capacitor. Also, the upper side power supply voltage sometimes declines by the way of controlling. Please confirm the voltage with an actual set. (When not using the bootstrap circuit, each upper side pre-drive power supply needs an external independent power supply.) 2. Because the jump voltage which is accompanied by the vibration in case of switching operation occurs by the influence of the floating inductance of the wiring of the outer power supply which is connected with of the “+” terminal and the “U-”(“V-”, “W-”) terminal, restrains and spares serge voltage being as the connection of the snubber circuit (Capacitor / CS /about 0.1uF to 10uF) for the voltage absorption with the neighborhood as possible between the “+” and the point of intersection of the “U-”, “V-” and “W-” terminal, and so on, with making a wiring length (among the terminals each from “CI”)short and making a wiring inductance small. 3. The “FLTEN” terminal (18pin) is open Drain (It is operating as “FLTEN” when becoming Low). This terminal serves as the shut down function of the built-in pre-driver. (When the terminal voltage is above 3V,normalcy works, and it is shut down when it is equal to or less than 0.8V.) Please make pulling up outside so that “FLTEN” terminal voltages become more than 3V. When the pull up voltage (VP) is at 5V, pull up resistor (RP) connects above 6.8kΩ, and in case of VP=15V, RP connects above 20kΩ. 4. Inside the IPM, thermistor is connected to between the “TH” terminal (27pin) and the “VSS” terminal (29pin). The thermistor can be used as the temperature monitor by pull up with the resistance (Rth). (This is for temperature monitors, and it is not a thing having the hyper temperature protection function by IPM oneself). This is for temperature monitors of substrate in the steady movement state. Therefore, please take care of the suddenly and partial fever. 5. The pull-down resistor (:33kΩ(typ)) is connected with the inside of the signal input terminal, but please connect the pull-down resistor(about 2.2 to 3.3kΩ) outside to decrease the influence of the noise by wiring etc. 6. The overcurrent protection feature operates only when it is possible to do a circuit control normally. For safety, recommend installation a fuse, and so on in the “VCC” line. 7. Because the IPM can be destroyed when the motor connection terminal (pins 2, 6, and 10) is opened while the motor is running, please be especially careful of the connection (soldering condition) of this terminal. 8. The “ITRIP” terminal (16pin) is the input terminal of the built-in comparator. It can stop movement by inputting the voltage more than Vref (0.44V to 0.54V). (At the time of movement, usually give me it for the voltage less than Vref). Please use it as various protections such as the overcurrent protection (feedback from external shunt resistance). In addition, the protection movement is not done a latch of. After the protection movement end, I become the movement return state after typ.2ms. Therefore, please do the protection movement detection of all input signals in OFF (LOW) promptly afterward. 9. When input pulse width is less than 1μs, an output may not react to the pulse. (Both ON signal and OFF signal) This data shows the example of the application circuit and does not guarantee a design as the mass production set. No.A2344-10/15 STK534U342C-E The characteristic of thermistor Symbol Condition Min Typ. Max Resistance Parameter R25 T = 25C 97 100 1034 kΩ Resistance R125 T = 125C 4.93 5.38 5.88 kΩ 4165 4250 B-Constant (25 to 50C) Temperature Range B 40 Unit 4335 k +125 C This data shows the example of the application circuit, does not guarantee a design as the mass production set. Fig.10 Variation of thermistor resistance with temperature Condition Pull-up resistor = 39k Pull-up voltage of TH = 5V Fig.11 Variation of temperature sense voltage with thermistor temperature No.A2344-11/15 STK534U342C-E The characteristic of PWM switching frequency Fig.12 Maximum sinusoidal phase current as function of switching frequency at Tc=100C, VCC=300V Switching waveform X:100ns/div Io: 5A/div Vce: 100V/div Fig. 13 IGBT Turn-on. Typical turn-on waveform at Tc=100C, VCC=400V, Io=5A X:100ns/div Vce: 100V/div Io: 5A/div Fig. 14 IGBT Turn-off. Typical turn-off waveform Tc=100C, VCC=400V, Io=5A No.A2344-12/15 STK534U342C-E CB capacitor value calculation for bootstrap circuit Calculate condition Item Upper side power supply. Total gate charge of output power IGBT at 15V. Upper side power supply low voltage protection. Upper side power dissipation. ON time required for CB voltage to fall from 15V to UVLO Symbol VBS Qg UVLO IDMAX TONMAX Value 15 45 12 400 - Unit V nC V μA s Capacitance calculation formula Tonmax is upper arm maximum on time equal the time when the CB voltage falls from 15V to the upper limit of Low voltage protection level. “ton-maximum" of upper side is the time that CB decreases 15V to the maximum low voltage protection of the upper side (12V). Thus, CB is calculated by the following formula. VBS * CB – Qg – IDMAX * TONMAX = UVLO * CB CB = (Qg + IDMAX * TONMAX) / (VBS – UVLO) The relationship between tonmax and CB becomes as follows. CB is recommended to be approximately 3 times the value calculated above. The recommended value of Cb is in the range of 1 to 47μF, however, the value needs to be verified prior to production. Fig.15 TONMAX vs CB characteristic No.A2344-13/15 STK534U342C-E Package Dimensions unit : mm SIP29 44x26.5 CASE 127CJ ISSUE O 44.0 41.0 1 ( 24.0) 26.5 2−R 1.8 S IP −05 33.3 20.05 2.5 3.6 missing pin : 3, 4, 7, 8, 11, 12, 14, 15 29 +0.20 0.6−0.05 1.27=35.56 0.5 3.2 5.0 5.5 28 4.3 1.27 ( 35.0) No.A2344-14/15 STK534U342C-E ORDERING INFORMATION Device STK534U342C-E Package SIP29 44x26.5 (Pb-Free) Shipping (Qty / Packing) 11 / Tube ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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