MC74LCX258 D

MC74LCX258
Low-Voltage CMOS Quad
2-Input Multiplexer
With 5 V−Tolerant Inputs and Outputs
(3−State, Inverting)
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The MC74LCX258 is a high performance, quad 2−input inverting
multiplexer with 3−state outputs operating from a 2.3 to 3.6 V supply.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A VI specification of 5.5 V allows
MC74LCX258 inputs to be safely driven from 5 V devices.
Four bits of data from two sources can be selected using the Select
input. The four outputs present the selected data in the inverted form.
The outputs may be switched to a high impedance state by placing
a logic HIGH on the Output Enable (OE) input. Current drive
capability is 24 mA at the outputs.
MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
16
1
1
16
Features
•
•
•
•
•
•
•
•
•
•
•
Designed for 2.3 to 3.6 V VCC Operation
5 V Tolerant − Interface Capability With 5 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
TTL Compatible
CMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in all Three Logic States (10 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance:
♦ Human Body Model >2000 V
♦ Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
© Semiconductor Components Industries, LLC, 2012
October, 2012 − Rev. 8
1
LCX258G
AWLYWW
16
1
LCX
258
ALYWG
G
TSSOP−16
DT SUFFIX
CASE 948F
1
A
WL, L
Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Publication Order Number:
MC74LCX258/D
MC74LCX258
VCC
OE
A3
B3
Y3
A2
B2
Y2
16
15
14
13
12
11
10
9
1
S
2
A0
3
B0
4
5
Y0
A1
6
B1
PIN NAMES
7
8
Y1 GND
Pins
Function
An
Source 0 Data Inputs
Bn
Source B Data Inputs
OE
Enable Input
S
Select Input
Yn
Outputs
Figure 1. Pinout: 16−Lead Plastic Package
(Top View)
TRUTH TABLE
Inputs
Outputs
Output Enable
Select
Y0−Y3
H
X
Z
L
L
A0−A3
L
H
B0−B3
X = Don’t Care
A0−A3, B0−B3 = The levels of the respective Data−Word Inputs
PIN DESCRIPTIONS
INPUTS
OUTPUTS
A0−A3 (Pins 2, 5, 11, 14)
Y0−Y3 (Pins 4, 7, 9, 12)
Nibble A inputs. The data present on these pins is
transferred to the outputs when the Select input is at a low
level and the Output Enable input is at a low level. The data
is presented to the outputs in inverted form for the LCX258.
Data outputs. The selected input nibble is presented at
these outputs when the Output Enable input is at a low level.
The data present on these pins is in its inverted form for the
LCX258. For the Output Enable input at a high level, the
outputs are at a high level for the LCX258.
B0−B3 (Pins 3, 6, 10, 13)
Nibble B inputs. The data present on these pins is
transferred to the outputs when the Select input is at a high
level and the Output Enable input is at a low level. The data
is presented to the outputs in inverted form for the LCX258.
Select (Pin 1)
Nibble select. This input determines the data word to be
transferred to the outputs. A low level on this input selects
the A inputs and a high level selects the B inputs.
CONTROL INPUTS
Output Enable (Pin 15)
Output Enable input. A low level on this input allows the
selected data to be presented at the outputs. A high level on
this input sets all of the outputs to 3−state off.
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2
MC74LCX258
A0
B0
A1
Nibble
Inputs
B1
A2
B2
A3
B3
Select
Output Enable
2
4
3
Y0
5
7
6
Y1
Data
Outputs
11
9
10
Y2
14
12
13
1
15
Figure 2. Expanded Logic Diagram
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3
Y3
MC74LCX258
MAXIMUM RATINGS
Symbol
VCC
Parameter
Value
DC Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
Condition
Units
−0.5 to +7.0
V
−0.5 ≤ VI ≤ +7.0
V
−0.5 ≤ VO ≤ VCC + 0.5
Note 1
V
−50
VI < GND
mA
−50
VO < GND
mA
+50
VO > VCC
mA
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current Per Ground Pin
±100
mA
TSTG
Storage Temperature Range
MSL
Moisture Sensitivity
−65 to +150
°C
Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Output in HIGH or LOW State. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Supply Voltage
Operating
Data Retention Only
Min
Typ
Max
2.0
1.5
2.3 to 3.3
3.6
3.6
VI
Input Voltage
0
5.5
0
VCC
VO
Output Voltage (HIGH or LOW State)
IOH
HIGH Level Output Current
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
−24
−12
−8
IOL
LOW Level Output Current
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
+24
+12
+8
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V,
VCC = 3.0 V
Units
V
V
V
mA
mA
−40
+85
°C
0
10
ns/V
ORDERING INFORMATION
Package
Shipping†
MC74LCX258DR2G
SOIC−16
(Pb−Free)
2500 / Tape & Reel
MC74LCX258DTG
TSSOP−16
(Pb−Free)
96 Units / Rail
MC74LCX258DTR2G
TSSOP−16
(Pb−Free)
2500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC74LCX258
DC ELECTRICAL CHARACTERISTICS
TA = −40°C to +85°C
Symbol
Characteristic
Condition
Min
1.7
2.0
2.0
Max
Units
VIH
Minimum HIGH Level Input Voltage
(Note 2)
2.3 V ≤ VCC ≤ 2.7 V
2.7 V ≤ VCC ≤ 3.0 V
3.0 V ≤ VCC ≤ 3.6 V
V
VIL
Maximum LOW Level Input Voltage
(Note 2)
2.3 V ≤ VCC ≤ 2.7 V
2.7 V ≤ VCC ≤ 3.0 V
3.0 V ≤ VCC ≤ 3.6 V
VOH
Minimum HIGH Level Output Voltage
2.3 V ≤ VCC ≤ 3.6 V; IOH = −100 mA
VCC = 2.3 V; IOH = −8 mA
VCC = 2.7 V; IOH = −12 mA
VCC = 3.0 V; IOH = −18 mA
VCC = 3.0 V; IOH = −24 mA
VOL
Maximum LOW Level Output Voltage
2.3 V ≤ VCC ≤ 3.6 V; IOH = 100 mA
VCC = 2.3 V; IOH = 8 mA
VCC = 2.7 V; IOH = 12 mA
VCC = 3.0 V; IOH = 16 mA
VCC = 3.0 V; IOH = 24 mA
0.2
0.7
0.4
0.4
0.55
V
IOZ
3−State Output Current
VCC = 3.6 V, VIN = VIH or VIL,
VOUT = 0 to 5.5 V
±5
mA
IOFF
Power Off Leakage Current
VCC = 0, VIN = 5.5 V or VOUT = 5.5 V
10
mA
0.7
0.8
0.8
VCC − 0.2
1.7
2.2
2.4
2.2
V
V
IIN
Input Leakage Current
VCC = 3.6 V, VIN = 5.5 V or GND
±5
mA
ICC
Quiescent Supply Current
VCC = 3.6 V, VIN = 5.5 V or GND
10
mA
500
mA
Increase in ICC per Input
2.3 V ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V
DICC
2. These values of VI are used to test DC electrical characteristics only.
AC ELECTRICAL CHARACTERISTICS
Limits
TA = −405C to +855C
Symbol
Parameter
VCC = 3.0 V to 3.6 V
VCC = 2.7 V
CL = 50 pF
CL = 50 pF
VCC = 2.3 V to 2.7 V
CL = 30 pF
Min
Max
Min
Max
Min
Max
Units
tPLH
tPHL
Propagation Delay
A to B to Y
1.0
1.0
6.5
6.5
1.0
1.0
7.5
7.5
1.0
1.0
8.5
8.5
ns
tPLH
tPHL
Propagation Delay
S to Y
1.0
1.0
7.0
7.0
1.0
1.0
8.0
8.0
1.0
1.0
9.0
9.0
ns
tPZL
tPZH
Propagation Delay
OE to Y
1.0
1.0
7.0
7.0
1.0
1.0
8.0
8.0
1.0
1.0
9.0
9.0
ns
tPLZ
tPHZ
Propagation Delay
OE to Y
1.0
1.0
6.0
6.0
1.0
1.0
7.0
7.0
1.0
1.0
8.0
8.0
ns
tOSHL
tOSLH
Output−to−Output Skew
1.0
1.0
ns
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol
VOLP
Characteristic
Dynamic LOW Peak Voltage (Note 3)
Condition
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
Min
Typ
0.8
Max
Units
V
VOLV
Dynamic LOW Valley Voltage (Note 3)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
0.8
V
3. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Typical
Units
Input Capacitance
VCC = 3.3 V, VI = 0 V or VCC
7
pF
COUT
Output Capacitance
VCC = 3.3 V, VI = 0 V or VCC
8
pF
CPD
Power Dissipation Capacitance
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
25
pF
CIN
Parameter
Condition
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5
MC74LCX258
2.7 V
1.5 V
A, B, S
1.5V
0V
tPHL
tPLH
VOH
Yn
1.5 V
1.5 V
VOL
WAVEFORM 1 − NONINVERTING PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
2.7 V
1.5 V
1.5 V
S
0V
tPHL
tPLH
VOH
Yn
1.5 V
1.5 V
VOL
WAVEFORM 2 − INVERTING PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
2.7 V
1.5 V
1.5 V
OE
0V
tPZH
tPHZ
VCC
VOH − 0.3 V
1.5 V
Yn
≈ 0V
tPZL
Yn
tPLZ
≈ 3.0 V
1.5 V
VOL + 0.3 V
GND
WAVEFORM 3 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 3. AC Waveforms
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6
MC74LCX258
VCC
PULSE
GENERATOR
R1
DUT
RT
CL
Test
Switch
tPLH, tPHL
Open
tPZL, tPLZ
6V
Open Collector/Drain tPLH and tPHL
6V
tPZH, tPHZ
GND
RL
CL = 50 pF or equivalent (Includes jig and probe capacitance)
RL = R1 = 500 W or equivalent
RT = ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
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7
6V
OPEN
GND
MC74LCX258
PACKAGE DIMENSIONS
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
−A−
16
9
1
8
−B−
P
8 PL
0.25 (0.010)
B
M
S
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
S
SOLDERING FOOTPRINT
8X
6.40
16X
1
1.12
16
16X
0.58
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
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8
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
MC74LCX258
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
CASE 948F−01
ISSUE B
16X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
S
V
S
K
S
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
2X
L/2
16
9
J1
B
−U−
L
SECTION N−N
J
PIN 1
IDENT.
N
8
1
0.25 (0.010)
M
0.15 (0.006) T U
S
A
−V−
N
F
DETAIL E
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
MILLIMETERS
INCHES
DIM MIN
MAX
MIN
MAX
A
4.90
5.10 0.193 0.200
B
4.30
4.50 0.169 0.177
C
−−−
1.20
−−− 0.047
D
0.05
0.15 0.002 0.006
F
0.50
0.75 0.020 0.030
G
0.65 BSC
0.026 BSC
H
0.18
0.28 0.007
0.011
−W−
J
0.09
0.20 0.004 0.008
J1
0.09
0.16 0.004 0.006
K
0.19
0.30 0.007 0.012
K1
0.19
0.25 0.007 0.010
L
6.40 BSC
0.252 BSC
M
0_
8_
0_
8_
SOLDERING FOOTPRINT
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
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9
MC74LCX258
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limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
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MC74LCX258/D