HS-1120RH August 1996 Radiation Hardened, Ultra High Speed Current Feedback Amplifier with Offset Adjust Features Description • Electrically Screened to SMD 5962F9675601VPA The HS-1120RH is a radiation hardened, high speed, wideband, fast settling current feedback amplifier. These devices are QML approved and are processed and screened in full compliance with MIL-PRF-38535. Built with Intersil’ proprietary, complementary bipolar UHF-1 (DI bonded wafer) process, it is the fastest monolithic amplifier available from any semiconductor manufacturer. • MIL-PRF-38535 Class V Compliant • Low Distortion (HD3, 30MHz) . . . . . . . . . . -84dBc (Typ) • Wide -3dB Bandwidth . . . . . . . . . . . . . . . 850MHz (Typ) • Very High Slew Rate . . . . . . . . . . . . . . . 2300V/µs (Typ) The HS-1120RH’s wide bandwidth, fast settling characteristic, and low output impedance, make this amplifier ideal for driving fast A/D converters. Additionally, it offers offset voltage nulling capabilities as described in the “Offset Adjustment” section of this datasheet. • Fast Settling (0.1%) . . . . . . . . . . . . . . . . . . . . 11ns (Typ) • Excellent Gain Flatness (to 50MHz) . . . . . 0.05dB (Typ) • High Output Current . . . . . . . . . . . . . . . . . . 65mA (Typ) • Fast Overdrive Recovery. . . . . . . . . . . . . . . <10ns (Typ) Component and composite video systems will also benefit from this amplifier’s performance, as indicated by the excellent gain flatness, and 0.03%/0.05 Degree Differential Gain/Phase specifications (RL = 75Ω). • Total Gamma Dose. . . . . . . . . . . . . . . . . . 300K RAD (Si) • Latch Up . . . . . . . . . . . . . . . . . . . None (DI Technology) Applications Detailed electrical specifications are contained in SMD 5962F9675601VPA, available on the Intersil Website or AnswerFAX systems (document #967560) • Video Switching and Routing • Pulse and Video Amplifiers • Flash A/D Driver A Cross Reference Table is available on the Intersil Website for conversion of Intersil Part Numbers to SMDs. The address is (http://www.intersil.com/datasheets/smd/smd_xref. html). SMD numbers must be used to order Radiation Hardened Products. • Imaging Systems Ordering Information • Wideband Amplifiers • RF/IF Signal Processing TEMP. RANGE (oC) PACKAGE 5962F9675601VPA -55 to 125 8 Ld CERDIP GDIP1-T8 HFA1100IJ (Sample) -40 to 85 8 Ld CERDIP F8.3A PART NUMBER HFA11XXEVAL PKG. NO. Evaluation Board Pinout HS-1120RH MIL-STD-1835, GDIP1-T8 (CERDIP) TOP VIEW BAL 1 -IN 2 +IN 3 V- 4 + 8 NC 7 V+ 6 OUT 5 BAL CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 1 File Number 4101.1 HS-1120RH Application Information Driving Capacitive Loads Optimum Feedback Resistor Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier’s phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. The enclosed plots of inverting and non-inverting frequency response illustrate the performance of the HS-1120RH in various gains. Although the bandwidth dependency on closed loop gain isn’t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier’s unique relationship between bandwidth and RF . All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is inversely proportional to RF . The HS-1120RH design is optimized for a 510Ω RF at a gain of +1. Decreasing RF in a unity gain application decreases stability, resulting in excessive peaking and overshoot. At higher gains the amplifier is more stable, so RF can be decreased in a tradeoff of stability for bandwidth. Figure 1 details starting points for the selection of this resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 850MHz. By decreasing RS as CLincreases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. Even so, bandwidth does decrease as you move to the right along the curve. For example, at AV = +1, RS = 50Ω, CL = 30pF, the overall bandwidth is limited to 300MHz, and bandwidth drops to 100MHz at AV = +1, RS = 5Ω, CL = 340pF. The table below lists recommended RF values for various gains, and the expected bandwidth. GAIN (ACL) RF (Ω) BANDWIDTH (MHz) -1 430 580 +1 510 850 +2 360 670 +5 150 520 +10 180 240 +19 270 125 50 45 AV = +1 40 RS (Ω) 35 30 25 20 15 10 PC Board Layout 5 A = +2 V 0 The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! 0 40 80 120 160 200 240 280 320 360 400 LOAD CAPACITANCE (pF) FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases. Evaluation Board The performance of the HS-1120RH may be evaluated using the HFA11XXEVAL Evaluation Board. Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. The layout and schematic of the board are shown in Figure 2. To order evaluation boards, please contact your local sales office. Care must also be taken to minimize the capacitance to ground seen by the amplifier’s inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. To this end, it is recommended that the ground plane be removed under traces connected to -IN, and connections to -IN should be kept as short as possible. Offset Adjustment The output offset voltage of the HS-1120RH may be nulled via connections to the BAL pins. Unlike a voltage feedback amplifier, offset adjustment is accomplished by varying the sign and/or magnitude of the inverting input bias current (-IBIAS). With voltage feedback amplifiers, bias currents are matched and bias current induced offset errors are nulled by matching the impedances seen at the positive and negative inputs. Bias An example of a good high frequency layout is the Evaluation Board shown in Figure 2. 2 HS-1120RH currents are uncorrelated on current feedback amplifiers, so this technique is inappropriate. source impedance. For example, the excess adjust current of 50µA [IBNADJ (Min) - IBSN (Max)] allows for the nulling of an additional 26mV of output offset error (with RF = 510Ω) at room temperature. The amount of adjustment is a function of RF , so adjust range increases with increased RF . If allowed by other considerations, such as bandwidth and noise, RF can be increased to provide more adjustment range. -IBIAS flows through RF causing an output offset error. Likewise, any change in -IBIAS forces a corresponding change in output voltage, providing the capability for output offset adjustment. By nulling -IBIAS to zero, the offset error due to this current is eliminated. In addition, an adjustment limit greater than the -IBIAS limit allows the user to null the contributions from other error sources, such as VIO, or +IN 500 The recommended offset adjustment circuit is shown in Figure 3. 500 VH R1 50Ω IN 10µF 1 8 2 7 3 6 4 5 10µF 0.1µF +5V 50Ω OUT GND 0.1µF VL GND -5V FIGURE 2A. SCHEMATIC VH 1 +IN VL OUT V+ VGND FIGURE 2B. TOP LAYOUT FIGURE 2C. BOTTOM LAYOUT FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT 510 2 VIN - 6 HS-1120RH 3 + 5 1 4 10K VOUT V- FIGURE 3. OFFSET VOLTAGE ADJUSTMENT CIRCUIT 3 HS-1120RH Typical Performance Characteristics Device Characterized at: VSUPPLY = ±5V, RF = 360Ω, AV = +2V/V, RL = 100Ω, Unless Otherwise Specified PARAMETERS CONDITIONS TEMPERATURE TYPICAL UNITS +25oC 2 mV Full 10 µV/oC 46 dB VIO PSRR ∆VCM = ±2V ∆VS = ±1.25V +25oC +25oC 50 dB +Input Current (Note 1) VCM = 0V +25oC 25 µA Average +Input Current Drift Versus Temperature Full 40 nA/oC -Input Current (Note 1) VCM = 0V +25oC 12 µA Average -Input Current Drift Versus Temperature Full 40 nA/oC -Input Current Adjust Range VCM = 0V +25oC ±200 µA ∆VCM = ±2V +25oC 50 kΩ -Input Resistance +25oC 16 Ω Input Capacitance +25oC 2.2 pF Input Noise Voltage (Note 1) f = 100kHz +25oC 4 nV/√Hz +Input Noise Current (Note 1) f = 100kHz +25oC 18 pA/√Hz -Input Noise Current (Note 1) f = 100kHz +25oC 21 pA/√Hz Input Common Mode Range Full ±3.0 V Open Loop Transimpedance AV = -1 +25oC 500 kΩ Output Voltage AV = -1, RL = 100Ω +25oC ±3.3 V AV = -1, RL = 100Ω Full ±3.0 V AV = -1, RL = 50Ω +25oC to +125oC ±65 mA AV = -1, RL = 50Ω -55oC to 0oC ±50 mA +25oC 0.1 Ω Input Offset Voltage (Note 1) VCM = 0V Average Offset Voltage Drift Versus Temperature VIO CMRR +Input Resistance Output Current (Note 1) DC Closed Loop Output Resistance Quiescent Supply Current (Note 1) RL = Open Full 24 mA -3dB Bandwidth (Note 1) AV = -1, RF = 430Ω, VOUT = 200mVP-P +25oC 580 MHz AV = +1, RF = 510Ω, VOUT = 200mVP-P +25oC 850 MHz AV = +2, RF = 360Ω, VOUT = 200mVP-P +25oC 670 MHz AV = +1, RF = 510Ω, VOUT = 5VP-P +25oC 1500 V/µs Slew Rate AV = +2, VOUT = 5VP-P +25oC 2300 V/µs Full Power Bandwidth VOUT = 5VP-P +25oC 220 MHz Gain Flatness (Note 1) To 30MHz, RF = 510Ω +25oC ±0.014 dB To 50MHz, RF = 510Ω +25oC ±0.05 dB To 100MHz, RF = 510Ω +25oC ±0.14 dB Linear Phase Deviation (Note 1) To 100MHz, RF = 510Ω +25oC ±0.6 Degrees 2nd Harmonic Distortion (Note 1) 30MHz, VOUT = 2VP-P +25oC -55 dBc 50MHz, VOUT = 2VP-P +25oC -49 dBc 100MHz, VOUT = 2VP-P +25oC -44 dBc 30MHz, VOUT = 2VP-P +25oC -84 dBc 50MHz, VOUT = 2VP-P +25oC -70 dBc -57 dBc 30 dBm 3rd Harmonic Distortion (Note 1) 100MHz, VOUT = 2VP-P +25oC 3rd Order Intercept (Note 1) 100MHz, RF = 510Ω +25oC 1dB Compression 100MHz, RF = 510Ω +25oC 20 dBm Reverse Isolation (S12) 40MHz, RF = 510Ω +25oC -70 dB 100MHz, RF = 510Ω +25oC -60 dB 600MHz, RF = 510Ω +25oC -32 dB 4 HS-1120RH Typical Performance Characteristics (Continued) Device Characterized at: VSUPPLY = ±5V, RF = 360Ω, AV = +2V/V, RL = 100Ω, Unless Otherwise Specified (Continued) PARAMETERS TEMPERATURE TYPICAL UNITS VOUT = 0.5VP-P CONDITIONS +25oC 500 ps VOUT = 2VP-P +25oC 800 ps VOUT = 0.5VP-P, Input tR/tF = 550ps +25oC 11 % To 0.1%, VOUT = 2V to 0V, RF = 510Ω +25oC 11 ns To 0.05%, VOUT = 2V to 0V, RF = 510Ω +25oC 19 ns To 0.02%, VOUT = 2V to 0V, RF = 510Ω +25oC 34 ns AV = +2, RL = 75Ω, NTSC +25oC 0.03 % Differential Phase AV = +2, RL = 75Ω, NTSC +25oC 0.05 Degrees Overdrive Recovery Time RF = 510Ω, VIN = 5VP-P +25oC 7.5 ns Rise and Fall Time Overshoot (Note 1) Settling Time (Note 1) Differential Gain NOTE: 1. See Typical Performance Curve for more information. VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25oC, Unless Otherwise Specified 120 1.2 90 0.9 OUTPUT VOLTAGE (V) 60 30 0 -30 -60 0.6 0.3 0 -0.3 -0.6 -90 -0.9 -120 -1.2 5ns/DIV. 5ns/DIV. GAIN (dB) NORMALIZED FIGURE 5. LARGE SIGNAL PULSE RESPONSE (AV = +2) GAIN 0 -3 AV = +1 -6 AV = +2 AV = +6 -9 AV = +11 -12 PHASE 0 AV = +1 -90 AV = +2 -180 AV = +6 -270 AV = +11 0.3 1 10 100 FREQUENCY (MHz) -360 PHASE (DEGREES) GAIN (dB) NORMALIZED FIGURE 4. SMALL SIGNAL PULSE RESPONSE (AV = +2) GAIN 0 AV = -1 -3 AV = -5 -6 AV = -10 -9 AV = -20 -12 PHASE 180 AV = -1 90 AV = -5 0 AV = -10 AV = -20 1K 0.3 FIGURE 6. NON-INVERTING FREQUENCY RESPONSE (VOUT = 200mVP-P) 1 10 100 FREQUENCY (MHz) FIGURE 7. INVERTING FREQUENCY RESPONSE (VOUT = 200mVP-P) 5 -90 -180 1K PHASE (DEGREES) OUTPUT VOLTAGE (mV) Typical Performance Curves HS-1120RH VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25oC, Unless Otherwise Specified (Continued) GAIN (dB) NORMALIZED RL = 1kΩ +3 GAIN 0 RL = 100Ω RL = 50Ω -3 -6 PHASE RL = 50Ω RL = 100Ω 0 -90 RL = 1kΩ -180 RL = 100Ω RL = 1kΩ 0.3 1 10 -270 -360 100 PHASE (DEGREES) GAIN (dB) +6 RL = 1kΩ +3 GAIN 0 -3 PHASE 0.3 1K GAIN (dB) NORMALIZED GAIN (dB) 0 0.160VP-P 0.500VP-P 0.920VP-P 1.63VP-P -30 10 FREQUENCY (MHz) 100 1 10 -360 100 1K +20 +10 0 0.32VP-P -10 1.00VP-P -20 1.84VP-P -30 0.3 1K FIGURE 10. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES (AV = +1) 3.26VP-P 1 10 100 FREQUENCY (MHz) 1K FIGURE 11. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES (AV = +2) +20 +10 950 0 -10 BANDWIDTH (MHz) GAIN (dB) NORMALIZED -270 FIGURE 9. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS (AV = +2, VOUT = 200mVP-P) +10 1 -180 FREQUENCY (MHz) +20 0.3 -90 RL = 1kΩ RL = 100Ω RL = 1kΩ FIGURE 8. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS (AV = +1, VOUT = 200mVP-P) -20 0 RL = 50Ω RL = 100Ω FREQUENCY (MHz) -10 RL = 100Ω RL = 50Ω -6 PHASE (DEGREES) Typical Performance Curves 0.96 VP-P -20 TO -30 3.89 VP-P 900 850 800 750 700 0.3 1 10 100 FREQUENCY (MHz) -50 1K FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES (AV = +6) -25 0 +25 +50 +75 TEMPERATURE (oC) +100 +125 FIGURE 13. -3dB BANDWIDTH vs TEMPERATURE (AV = +1) 6 HS-1120RH Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25oC, Unless Otherwise Specified (Continued) +2.0 DEVIATION (DEGREES) +1.5 GAIN (dB) 0 -0.05 -0.10 -0.15 -0.20 +1.0 +0.5 0 -0.5 -1.0 -1.5 -2.0 1 10 FREQUENCY (MHz) 0 100 15 30 45 60 75 90 105 120 135 150 FREQUENCY (MHz) FIGURE 14. GAIN FLATNESS (AV = +2) FIGURE 15. DEVIATION FROM LINEAR PHASE (AV = +2) 40 35 INTERCEPT POINT (dBm) SETTLING ERROR (%) 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 30 25 20 15 10 5 0 -4 1 6 11 16 21 26 TIME (ns) 31 36 41 46 0 -30 -30 -35 -40 -40 -45 50MHz -55 -60 400 -50 100MHz -50 200 300 FREQUENCY (MHz) FIGURE 17. 3rd ORDER INTERMODULATION INTERCEPT (2-TONE) DISTORTION (dBc) DISTORTION (dBc) FIGURE 16. SETTLING RESPONSE (AV = +2, VOUT = 2V) 100 100MHz -60 -70 50MHz -80 -90 30MHz 30MHz -100 -65 -110 -70 -5 -3 -1 1 3 5 7 9 OUTPUT POWER (dBm) 11 13 -5 15 -3 -1 1 3 5 7 9 11 13 OUTPUT POWER (dBm) FIGURE 18. 2nd HARMONIC DISTORTION vs POUT FIGURE 19. 3rd HARMONIC DISTORTION vs POUT 7 15 HS-1120RH VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25oC, Unless Otherwise Specified (Continued) 35 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 RF = 360Ω VOUT = 2VP-P 30 VOUT = 1VP-P 25 OVERSHOOT (%) VOUT = 0.5VP-P VOUT = 2VP-P 15 RF = 510Ω VOUT = 2VP-P 10 RF =510Ω VOUT = 1VP-P 5 RF = 510Ω VOUT = 0.5VP-P 0 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000 INPUT RISE TIME (ps) FIGURE 20. OVERSHOOT vs INPUT RISE TIME (AV = +1) FIGURE 21. OVERSHOOT vs INPUT RISE TIME (AV = +2) 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 25 24 SUPPLY CURRENT (mA) OVERSHOOT (%) INPUT RISE TIME (ps) 23 22 21 20 19 18 360 400 440 480 520 560 600 FEEDBACK RESISTOR (Ω) 640 -60 680 INPUT OFFSET VOLTAGE (mV) 6 7 8 9 TOTAL SUPPLY VOLTAGE (V+ - V-, V) -20 0 +20 +40 +60 +80 +100 +120 FIGURE 23. SUPPLY CURRENT vs TEMPERATURE 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 5 -40 TEMPERATURE (oC) FIGURE 22. OVERSHOOT vs FEEDBACK RESISTOR (AV = +2, tR = 200ps, VOUT = 2VP-P) SUPPLY CURRENT (mA) RF = 360Ω VOUT = 1VP-P RF = 360Ω VOUT = 0.5VP-P 20 10 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 +IBIAS VIO -IBIAS -60 -40 -20 FIGURE 24. SUPPLY CURRENT vs SUPPLY VOLTAGE 45 42 39 36 33 30 27 24 21 18 15 12 9 6 3 0 BIAS CURRENTS (µA) OVERSHOOT (%) Typical Performance Curves 0 +20 +40 +60 +80 +100 +120 TEMPERATURE (oC) FIGURE 25. VIO AND BIAS CURRENTS vs TEMPERATURE 8 HS-1120RH Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25oC, Unless Otherwise Specified (Continued) 3.7 30 3.6 3.4 3.3 3.2 | - VOUT | 3.1 3 2.9 2.8 2.7 25 250 225 20 200 175 15 150 125 10 100 75 5 ENI eni INIiniINI+ ini+ 2.6 2.5 -60 -40 -20 0 +20 +40 +60 0 100 +80 +100 +120 1K TEMPERATURE (oC) 10K 100K FREQUENCY (Hz) FIGURE 26. OUTPUT VOLTAGE vs TEMPERATURE (AV = -1, RL = 50Ω) FIGURE 27. INPUT NOISE vs FREQUENCY Test Circuit V+ + I CC 10 0.1 510 VIN K1 NC K2 = POSITION 1: VX VIO = 100 0.1 510 0.1 100 7 2 + VX 0.1 0.1 470pF - x100 2 K2 1 K2 = POSITION 2: VX -IBIAS = 50K - 510 1K 6 VOUT DUT 3 + 510 1 4 100 5 100 50 50 K5 200pF VZ +IBIAS = 100K 100K (0.01%) - VZ + + 10 NC NC 0.1 K3 0.1 I EE 0.1 HA-5177 V- NOTES: All resistors = ±1% (Ω), unless otherwise noted All capacitors = ±10% (µF), unless otherwise noted Chip Components Recommended 9 K4 0.1 50 25 0 NOISE CURRENT (pA/√Hz) NOISE VOLTAGE (nV/√Hz) OUTPUT VOLTAGE (V) 275 +VOUT 3.5 300 HS-1120RH Test Circuits and Waveforms SIMPLIFIED TEST CIRCUIT FOR LARGE AND SMALL SIGNAL PULSE RESPONSE V+ V+ VIN VOUT + - RS 50Ω 50Ω RF VIN 2 50Ω VOUT + - RS 50Ω RF 50Ω 360Ω RG 360Ω 510Ω V- V- NOTES: VS = ±5V, AV = +2 RS = 50Ω RL= 100Ω For Small and Large Signals NOTES: VS = ±5V, AV = +1 RS = 50Ω RL = 100Ω For Small and Large Signals AV = +1 TEST CIRCUIT AV = +2 TEST CIRCUIT VOUT VOUT +2.5V 90% +2.5V 90% +SR +250mV -SR 10% -2.5V 10% 90% -2.5V TF , -OS 10% -250mV HS-1120RH CERDIP R3 R3 1 2 3 D4 4 V- -250mV Irradiation Circuit HS-1120RH CERDIP R1 10% SMALL SIGNAL WAVEFORM Burn-In Circuit R2 +250mV 90% TR , +OS LARGE SIGNAL WAVEFORM D2 2 50Ω 8 + D3 2 V+ 7 6 C1 1 R2 R1 3 D1 4 V- 5 C2 C2 NOTES: R1 = R2 = 1kΩ, ±5% (Per Socket) R3 = 10kΩ, ±5% (Per Socket) C1 = C2 = 0.01µF (Per Socket) or 0.1µF (Per Row) Minimum D1 = D2 = 1N4002 or Equivalent (Per Board) D3 = D4 = 1N4002 or Equivalent (Per Socket) V+ = +5.5V ±0.5V V- = -5.5V ±0.5V NOTES: R1 = R2 = 1kΩ, ±5% R3 = 10kΩ, ±5% C1 = C2 = 0.1µF V+ = +5.5V ±0.5V V- = -5.5V ±0.5V 10 8 + V+ 7 6 5 C1 HS-1120RH Die Characteristics DIE DIMENSIONS: 63 mils x 44 mils x 19 mils ±1 mil 1600µm x 1130µm x 483µm ±25.4µm GLASSIVATION: Type: Nitride Thickness: 4kÅ ±0.5kÅ METALLIZATION: Type: Metal 1: AICu(2%)/TiW Thickness: Metal 1: 8kÅ ±0.4kÅ WORST CASE CURRENT DENSITY: 1.6 x 105 A/cm2 TRANSISTOR COUNT: 52 Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kÅ ±0.8kÅ SUBSTRATE POTENTIAL (Powered Up): Floating Metallization Mask Layout HS-1120RH +IN -IN V- BAL VL VH BAL V+ OUT All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 11