HS-1840ARH-T Data Sheet July 1999 Radiation Hardened 16 Channel CMOS Analog Multiplexer with High-Z Analog Input Protection Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD Total Dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability. The HS-1840ARH-T is a Radiation Hardened, monolithic 16 channel multiplexer constructed with the Intersil Rad-Hard Silicon Gate, Dielectric Isolation process. It is designed to provide a high input impedance to the analog source if device power fails (open), or the analog signal voltage inadvertently exceeds the supply by up to ±35V, regardless of whether the device is powered on or off. Selection of one of sixteen channels is controlled by a 4-bit binary address plus an Enable-Inhibit input, which conveniently controls the ON/OFF operation of several multiplexers in a system. All inputs have electrostatic discharge protection. File Number Features • QML Class T, Per MIL-PRF-38535 • Radiation Performance - Gamma Dose (γ) 1 x 105 RAD(Si) - No Latch-Up, Dielectrically Isolated Device Islands • Improved rDS(ON) Linearity • Improved Access Time 1.5µs (Max) Over Temp and Rad • High Analog Input Impedance 500MΩ During Power Loss (Open) • ±35V Input Over Voltage Protection (Power On or Off) • Excellent in Hi-Rel Redundant Systems • Break-Before-Make Switching Pinouts HS1-1840ARH-T (SBDIP), CDIP2-T28 TOP VIEW Specifications +VS 1 28 OUT NC 2 27 -VS NC 3 26 IN 8 Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. IN 16 4 25 IN 7 IN 15 5 24 IN 6 IN 14 6 23 IN 5 Detailed Electrical Specifications for the HS-1840ARH-T are contained in SMD 5962-95630. A “hot-link” is provided from our website for downloading. www.intersil.com/spacedefense/newsafclasst.asp IN 13 7 22 IN 4 IN 12 8 21 IN 3 IN 11 9 20 IN 2 IN 10 10 19 IN 1 Intersil’s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website. www.intersil.com/quality/manuals.asp Ordering Information ORDERING NUMBER PART NUMBER TEMP. RANGE (oC) 4589.1 IN 9 11 18 ENABLE GND 12 17 ADDR A0 (+5VS) VREF 13 16 ADDR A1 ADDR A3 14 15 ADDR A2 HS9-1840ARH-T (FLATPACK) CDFP3-F28 TOP VIEW +VS 1 28 OUT NC 2 27 -VS NC 3 26 IN 8 IN 16 4 25 IN 7 IN 15 5 24 IN 6 IN 14 6 23 IN 5 IN 13 7 22 IN 4 IN 12 8 21 IN 3 NOTE: Minimum order quantity for -T is 150 units through IN 11 9 20 IN 2 distribution, or 450 units direct. IN 10 10 19 IN 1 IN 9 11 18 ENABLE GND 12 17 ADDR A0 (+5VS) VREF 13 16 ADDR A1 ADDR A3 14 15 ADDR A2 5962R9563002TXC HS1-1840ARH-T -55 to 125 HS1-1840ARH/Proto HS1-1840ARH/Proto -55 to 125 5962R9563002TYC HS9-1840ARH-T -55 to 125 HS9-1840ARH/Proto HS9-1840ARH/Proto 1 -55 to 125 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation. HS-1840ARH-T Functional Diagram IN 1 A0 1 P A1 DIGITAL ADDRESS A2 OUT A3 16 P EN IN 16 ADDRESS INPUT BUFFER AND LEVEL SHIFTER DECODERS MULTIPLEX SWITCHES TRUTH TABLE A3 A2 A1 A0 EN “ON” CHANNEL X X X X H None L L L L L 1 L L L H L 2 L L H L L 3 L L H H L 4 L H L L L 5 L H L H L 6 L H H L L 7 L H H H L 8 H L L L L 9 H L L H L 10 H L H L L 11 H L H H L 12 H H L L L 13 H H L H L 14 H H H L L 15 H H H H L 16 2 HS-1840ARH-T Die Characteristics DIE DIMENSIONS: PASSIVATION: (2820µm x 4080µm x 483µm ±25.4µm) 111 x 161 x 19mils ±1mil Type: Nitride (Si3N4) over Silox (SiO2) Nitride Thickness: 4.0kÅ ±0.5kÅ Silox Thickness: 12.0kÅ ±1.3kÅ METALLIZATION: WORST CASE CURRENT DENSITY: Type: Al Si Cu Thickness: 16.0kÅ ±2kÅ < 2.0e5 A/cm2 SUBSTRATE POTENTIAL: TRANSISTOR COUNT: Unbiased (DI) 407 BACKSIDE FINISH: PROCESS: Silicon Radiation Hardened Silicon Gate, Dielectric Isolation Metallization Mask Layout IN1 IN2 IN3 IN4 IN5 IN6 IN7 HS-1840ARH-T IN8 ENABLE A0 -V A1 OUT A2 A3 +V VREF IN16 IN9 IN10 IN11 IN12 IN13 IN14 IN15 GND All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 3