HS-508ARH-T Data Sheet July 1999 Radiation Hardened 8 Channel CMOS Analog Multiplexer with Overvoltage Protection Intersil‘s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. This QML Class T device is processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability. File Number 4605.1 Features • QML Class T, Per MIL-PRF-38535 • Radiation Performance - Gamma Dose (γ) 1 x 105 RAD(Si) - No Latch-Up, Dielectrically Isolated Device Islands - SEP LET > 110MeV/mg/cm2 • Analog/Digital Overvoltage Protection • Fail Safe with Power Loss (No Latchup) The HS-508ARH-T is a dielectrically isolated, radiation hardened, CMOS analog multiplexer incorporating an important feature; it withstands analog input voltages much greater than the supplies. This is essential in any system where the analog inputs originate outside the equipment. They can withstand a continuous input up to 10V greater than either supply, which eliminates the possibility of damage when supplies are off, but input signals are present. Equally important, it can withstand brief input transient spikes of several hundred volts; which otherwise would require complex external protection networks. Necessarily, ON resistance is somewhat higher than similar unprotected devices, but very low leakage current combine to produce low errors. Reference Application Notes 520 and 521, available from the Semiconductor Products Division of Intersil, for further information on the HS-508ARH-T multiplexer in general. • Break-Before-Make Switching • DTL/TTL and CMOS Compatible • Analog Signal Range ±15V • Fast Access Time • Supply Current at 1MHz Address Toggle (Typ) 4mA • Standby Power (Typ.) 7.5mW Pinouts HS1-508ARH-T (SBDIP), CDIP2-T16 TOP VIEW Specifications Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the HS-508ARH-T are contained in SMD 5962-96742. A “hot-link” is provided from our website for downloading. www.intersil.com/spacedefense/newsafclasst.asp Intersil‘s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website. www.intersil.com/quality/manuals.asp Ordering Information ORDERING NUMBER PART NUMBER TEMP. RANGE (oC) 5962R9674201TEC HS1-508ARH-T -55 to 125 5962R9674201TXC HS9-508ARH-T -55 to 125 AO 1 16 A1 EN 2 15 A2 V- 3 14 GND IN 1 4 13 V+ IN 2 5 12 IN 5 IN 3 6 11 IN 6 IN 4 7 10 IN 7 OUT 8 9 IN 8 HS9-508ARH-T (FLATPACK), CDFP4-F16 TOP VIEW A0 1 16 A1 EN 2 15 A2 V- 3 14 GND IN1 4 13 V+ IN2 5 12 IN5 IN3 6 11 IN6 IN4 7 10 IN7 OUT 8 9 IN8 NOTE: Minimum order quantity for -T is 150 units through distribution, or 450 units direct. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation. HS-508ARH-T Functional Diagram P A0 DIGITAL ADDRESS N IN 1 1 A1 OUT A2 8 EN N P ADDRESS INPUT BUFFER AND LEVEL SHIFTER DECODERS IN 8 MULTIPLEX SWITCHES TRUTH TABLE A2 A1 A0 EN ‘‘ON’’ CHANNEL X X X L NONE L L L H 1 L L H H 2 L H L H 3 L H H H 4 H L L H 5 H L H H 6 H H L H 7 H H H H 8 2 HS-508ARH-T Die Characteristics DIE DIMENSIONS: PASSIVATION: (2108µm x 2743µm x 279µm ±25.4µm) Type: Silox (SiO2) 83 x 108 x 11mils ±1mil Thickness: 8.0kÅ ±1.0kÅ METALLIZATION: WORST CASE CURRENT DENSITY: 6.68e4 A/cm2 Type: Al Si Thickness: 12.5kÅ ±2kÅ TRANSISTOR COUNT: SUBSTRATE POTENTIAL: 253 Unbiased (DI) PROCESS: BACKSIDE FINISH: CMOS-DI Silicon Metallization Mask Layout V- IN1 IN2 HS-508ARH-T IN3 IN4 EN OUT A0 A1 IN8 IN7 A2 GND V+ IN5 IN6 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 3