HFA1130 September 1998 850MHz, Output Limiting, Low Distortion Current Feedback Operational Amplifier File Number 3369.2 Features • User Programmable Output Voltage Limits The HFA1130 is a high speed wideband current feedback amplifier featuring programmable output limits. Built with Intersil’s proprietary complementary bipolar UHF-1 process, it is the fastest monolithic amplifier available from any semiconductor manufacturer. • Low Distortion (30MHz, HD2). . . . . . . . . . . . . . . . . -56dBc • -3dB Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . 850MHz • Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 2300V/µs • Fast Settling Time (0.1%) . . . . . . . . . . . . . . . . . . . . . 11ns This amplifier is the ideal choice for high frequency applications requiring output limiting, especially those needing ultra fast overdrive recovery times. The output limiting function allows the designer to set the maximum positive and negative output levels, thereby protecting later stages from damage or input saturation. The sub-nanosecond overdrive recovery time quickly returns the amplifier to linear operation, following an overdrive condition. • Excellent Gain Flatness - (100MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.14dB - (50MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.04dB - (30MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.01dB The HFA1130 offers significant performance improvements over the CLC500/501/502. Applications A variety of packages and temperature grades are available. See the ordering information below for details. For /883 product refer to the HFA1130/883 datasheet. • Video Switching and Routing • High Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 60mA • Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . . . . . <1ns • Residue Amplifier • Pulse and Video Amplifiers • Wideband Amplifiers Ordering Information PART NUMBER (BRAND) TEMP. RANGE (oC) • RF/IF Signal Processing PACKAGE • Flash A/D Driver PKG. NO. HFA1130IP -40 to 85 8 Ld PDIP E8.3 • Medical Imaging Systems HFA1130IB (H1130I) -40 to 85 8 Ld SOIC M8.15 • Related Literature - AN9420, Current Feedback Theory - AN9202, HFA11XX Evaluation Fixture HFA11XXEVAL DIP Evaluation Board for High-Speed Op Amps Pinout The Op Amps With Fastest Edges HFA1130 (PDIP, SOIC) TOP VIEW INPUT 220MHz SIGNAL OUTPUT (AV = 2) HFA1130 OP AMP 0ns NC 1 -IN 2 +IN 3 V- 4 8 VH - 7 V+ + 6 OUT 5 VL 25ns 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 HFA1130 TA = 25oC Absolute Maximum Ratings Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 130 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . -65oC to TA to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V Output Current (50% Duty Cycle) . . . . . . . . . . . . . . . . . . . . . . 60mA Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. VSUPPLY = ±5V, AV = +1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified Electrical Specifications (NOTE 2) TEST LEVEL TEMP. (oC) MIN TYP MAX UNITS A 25 - 2 6 mV A Full - - 10 mV C Full - 10 - µV/oC A 25 40 46 - dB A Full 38 - - dB A 25 45 50 - dB A Full 42 - - dB A 25 - 25 40 µA A Full - - 65 µA C Full - 40 - nA/oC A 25 - 20 40 µA/V A Full - - 50 µA/V A 25 - 12 50 µA A Full - - 60 µA C Full - 40 - nA/oC A 25 - 1 7 µA/V A Full - - 10 µA/V A 25 - 6 15 µA/V A Full - - 27 µA/V Non-Inverting Input Resistance A 25 25 50 - kΩ Inverting Input Resistance C 25 - 20 30 Ω Input Capacitance (Either Input) B 25 - 2 - pF Input Common Mode Range C Full ±2.5 ±3.0 - V TEST CONDITIONS PARAMETER INPUT CHARACTERISTICS Input Offset Voltage (Note 3) Input Offset Voltage Drift ∆VCM = ±2V VIO CMRR ∆VS = ±1.25V VIO PSRR Non-Inverting Input Bias Current (Note 3) +IN = 0V +IBIAS Drift ∆VCM = ±2V +IBIAS CMS Inverting Input Bias Current (Note 3) -IN = 0V -IBIAS Drift ∆VCM = ±2V -IBIAS CMS ∆VS = ±1.25V -IBIAS PSS Input Noise Voltage (Note 3) 100kHz B 25 - 4 - nV/√Hz +Input Noise Current (Note 3) 100kHz B 25 - 18 - pA/√Hz -Input Noise Current (Note 3) 100kHz B 25 - 21 - pA/√Hz 25 - 300 - kΩ TRANSFER CHARACTERISTICS AV = +2, Unless Otherwise Specified Open Loop Transimpedance (Note 3) 2 B HFA1130 VSUPPLY = ±5V, AV = +1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified (Continued) Electrical Specifications TEST CONDITIONS PARAMETER (NOTE 2) TEST LEVEL TEMP. (oC) MIN TYP MAX UNITS -3dB Bandwidth (Note 3) VOUT = 0.2VP-P, AV = +1 B 25 530 850 - MHz -3dB Bandwidth VOUT = 0.2VP-P, AV = +2, RF = 360Ω B 25 - 670 - MHz Full Power Bandwidth 4VP-P, AV = -1 B Full - 300 - MHz Gain Flatness (Note 3) To 100MHz B 25 - ±0.14 - dB Gain Flatness To 50MHz B 25 - ±0.04 - dB Gain Flatness To 30MHz B 25 - ±0.01 - dB Linear Phase Deviation (Note 3) DC to 100MHz B 25 - 0.6 - Degrees Differential Gain NTSC, RL = 75Ω B 25 - 0.03 - % Differential Phase NTSC, RL = 75Ω B 25 - 0.05 - Degrees A Full 1 - - V/V A 25 ±3.0 ±3.3 - V A Full ±2.5 ±3.0 - V A 25, 85 50 60 - mA A -40 35 50 - mA B 25 - 0.07 - Ω Minimum Stable Gain OUTPUT CHARACTERISTICS AV = +2, Unless Otherwise Specified Output Voltage (Note 3) AV = -1 Output Current RL = 50Ω, AV = -1 DC Closed Loop Output Impedance (Note 3) 2nd Harmonic Distortion (Note 3) 30MHz, VOUT = 2VP-P B 25 - -56 - dBc 3rd Harmonic Distortion (Note 3) 30MHz, VOUT = 2VP-P B 25 - -80 - dBc 3rd Order Intercept (Note 3) 100MHz B 25 20 30 - dBm 1dB Compression 100MHz B 25 15 20 - dBm TRANSIENT RESPONSE AV = +2, Unless Otherwise Specified Rise Time VOUT = 2.0V Step B 25 - 900 - ps Overshoot (Note 3) VOUT = 2.0V Step B 25 - 10 - % Slew Rate AV = +1, VOUT = 5VP-P B 25 - 1400 - V/µs AV = +2, VOUT = 5VP-P B 25 1850 2300 - V/µs 0.1% Settling Time (Note 3) VOUT = 2V to 0V B 25 - 11 - ns 0.2% Settling Time (Note 3) VOUT = 2V to 0V B 25 - 7 - ns Supply Voltage Range B Full ±4.5 - ±5.5 V Supply Current (Note 3) A 25 - 21 26 mA A Full - - 33 mA POWER SUPPLY CHARACTERISTICS LIMITING CHARACTERISTICS AV = +2, VH = +1V, VL = -1V, Unless Otherwise Specified Clamp Accuracy VIN = ±2V, AV = -1 A 25 - 60 ±125 mV Clamped Overshoot VIN = ±1V, Input tR/tF = 2ns B 25 - 4 - % Overdrive Recovery Time VIN = ±1V B 25 - 0.75 1.5 ns 3 HFA1130 VSUPPLY = ±5V, AV = +1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified (Continued) Electrical Specifications (NOTE 2) TEST LEVEL TEMP. (oC) MIN TYP MAX UNITS Negative Clamp Range B 25 - -5.0 to +2.0 - V Positive Clamp Range B 25 - -2.0 to +5.0 - V Clamp Input Bias Current A 25 - 50 200 µA B 25 - 500 - MHz TEST CONDITIONS PARAMETER Clamp Input Bandwidth VH or VL = 100mVP-P NOTES: 2. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only. 3. See Typical Performance Curves for more information. Application Information Optimum Feedback Resistor (RF) The enclosed plots of inverting and non-inverting frequency response detail the performance of the HFA1100/1120 in various gains. Although the bandwidth dependency on ACL isn’t as severe as that of a voltage feedback amplifier, there is an appreciable decrease in bandwidth at higher gains. This decrease can be minimized by taking advantage of the current feedback amplifier’s unique relationship between bandwidth and RF. All current feedback amplifiers require a feedback resistor, even for unity gain applications, and the RF, in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is inversely proportional to RF. The HFA1100, 1120 designs are optimized for a 510Ω RF, at a gain of +1. Decreasing RF in a unity gain application decreases stability, resulting in excessive peaking and overshoot (Note: Capacitive feedback causes the same problems due to the feedback impedance decrease at higher frequencies). At higher gains the amplifier is more stable, so RF can be decreased in a trade-off of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth. ACL +1 RF (Ω) 510 output voltage at VH or VL (± the clamp accuracy), respectively. The low input bias currents of the clamp pins allow them to be driven by simple resistive divider circuits, or active elements such as amplifiers or DACs. Clamp Circuitry Figure 1 shows a simplified schematic of the HFA1130 input stage, and the high clamp (VH) circuitry. As with all current feedback amplifiers, there is a unity gain buffer (QX1 - QX2) between the positive and negative inputs. This buffer forces -IN to track +IN, and sets up a slewing current of (V-IN - VOUT)/RF. This current is mirrored onto the high impedance node (Z) by QX3-QX4, where it is converted to a voltage and fed to the output via another unity gain buffer. If no clamping is utilized, the high impedance node may swing within the limits defined by QP4 and QN4. Note that when the output reaches it’s quiescent value, the current flowing through -IN is reduced to only that small current (-IBIAS) required to keep the output at the final voltage. V+ QP3 -1 430 580 +2 360 670 +5 150 520 +10 180 240 +19 270 125 Clamp Operation 50K (30K FOR VL ) QN2 QP1 BW (MHz) 850 QP4 +IN ICLAMP R1 Z +1 VV+ VH QN1 QN6 QN5 QP2 200Ω QP6 QN3 QN4 QP5 V- General The HFA1130 features user programmable output clamps to limit output voltage excursions. Clamping action is obtained by applying voltages to the VH and VL terminals (pins 8 and 5) of the amplifier. VH sets the upper output limit, while VL sets the lower clamp level. If the amplifier tries to drive the output above VH, or below VL, the clamp circuitry limits the 4 -IN RF (EXTERNAL) VOUT FIGURE 1. HFA1130 SIMPLIFIED VH CLAMP CIRCUITRY Tracing the path from VH to Z illustrates the effect of the clamp voltage on the high impedance node. VH decreases by 2VBE (QN6 and QP6) to set up the base voltage on QP5. QP5 begins to conduct whenever the high impedance node HFA1130 reaches a voltage equal to QP5’s base + 2VBE (QP5 and QN5). Thus, QP5 clamps node Z whenever Z reaches VH. R1 provides a pull-up network to ensure functionality with the clamp inputs floating. A similar description applies to the symmetrical low clamp circuitry controlled by VL. When the output is clamped, the negative input continues to source a slewing current (ICLAMP) in an attempt to force the output to the quiescent voltage defined by the input. QP5 must sink this current while clamping, because the -IN current is always mirrored onto the high impedance node. The clamping current is calculated as (V-IN - VOUT)/RF. As an example, a unity gain circuit with VIN = 2V, VH = 1V, and RF = 510Ω would have ICLAMP = (2-1)/510Ω = 1.96mA. Note that ICC will increase by ICLAMP when the output is clamp limited. Clamp Accuracy The clamped output voltage will not be exactly equal to the voltage applied to VH or VL. Offset errors, mostly due to VBE mismatches, necessitate a clamp accuracy parameter which is found in the device specifications. Clamp accuracy is a function of the clamping conditions. Referring again to Figure 1, it can be seen that one component of clamp accuracy is the VBE mismatch between the QX6 transistors, and the QX5 transistors. If the transistors always ran at the same current level there would be no VBE mismatch, and no contribution to the inaccuracy. The QX6 transistors are biased at a constant current, but as described earlier, the current through QX5 is equivalent to ICLAMP. VBE increases as ICLAMP increases, causing the clamped output voltage to increase as well. ICLAMP is a function of the overdrive level (V-IN -VOUTCLAMPED) and RF,so clamp accuracy degrades as the overdrive increases, or as RF decreases. As an example, the specified accuracy of ±60mV for a 2X overdrive with RF = 510Ω degrades to ±220mV for RF = 240Ω at the same overdrive, or to ±250mV for a 3X overdrive with RF = 510Ω. Consideration must also be given to the fact that the clamp voltages have an effect on amplifier linearity. The “Nonlinearity Near Clamp Voltage” curve in the data sheet illustrates the impact of several clamp levels on linearity. Clamp Range Unlike some competitor devices, both VH and VL have usable ranges that cross 0V. While VH must be more positive than VL, both may be positive or negative, within the range restrictions indicated in the specifications. For example, the HFA1130 could be limited to ECL output levels by setting VH = -0.8V and VL = -1.8V. VH and VL may be connected to the same voltage (GND for instance) but the result won’t be in a DC output voltage from an AC input signal. A 150 - 200mV AC signal will still be present at the output. Recovery from Overdrive The output voltage remains at the clamp level as long as the overdrive condition remains. When the input voltage drops below the overdrive level (VCLAMP /AVCL) the amplifier will 5 return to linear operation. A time delay, known as the Overdrive Recovery Time, is required for this resumption of linear operation. The plots of “Unclamped Performance” and “Clamped Performance” highlight the HFA1130’s subnanosecond recovery time. The difference between the unclamped and clamped propagation delays is the overdrive recovery time. The appropriate propagation delays are 4.0ns for the unclamped pulse, and 4.8ns for the clamped (2X overdrive) pulse yielding an overdrive recovery time of 800ps. The measurement uses the 90% point of the output transition to ensure that linear operation has resumed. Note: The propagation delay illustrated is dominated by the fixturing. The delta shown is accurate, but the true HFA1130 propagation delay is 500ps. Use of Die in Hybrid Applications This amplifier is designed with compensation to negate the package parasitics that typically lead to instabilities. As a result, the use of die in hybrid applications results in overcompensated performance due to lower parasitic capacitances. Reducing RF below the recommended values for packaged units will solve the problem. For AV = +2 the recommended starting point is 300Ω, while unity gain applications should try 400Ω. PC Board Layout The frequency performance of this amplifier depends a great deal on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value chip (0.1µF) capacitor works well in most cases. Terminated microstrip signal lines are recommended at the input and output of the device. Output capacitance, such as that resulting from an improperly terminated transmission line will degrade the frequency response of the amplifier and may cause oscillations. In most cases, the oscillation can be avoided by placing a resistor in series with the output. Care must also be taken to minimize the capacitance to ground seen by the amplifier’s inverting input. The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. To this end, it is recommended that the ground plane be removed under traces connected to pin 2, and connections to pin 2 should be kept as short as possible. An example of a good high frequency layout is the Evaluation Board shown below. HFA1130 Evaluation Board TOP LAYOUT An evaluation board is available for the HFA1130, (Part Number HFA11XXEVAL). Please contact your local sales office for information. VH 1 The layout and schematic of the board are shown here: +IN 500Ω 500Ω OUT V+ VL VGND VH 50Ω 1 8 2 7 0.1µF 10µF +5V 50Ω IN 10µF 3 6 4 5 0.1µF BOTTOM LAYOUT OUT VL GND GND -5V FIGURE 2. BOARD SCHEMATIC Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified AV = +2 1.2 90 0.9 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (mV) AV = +2 120 60 30 0 -30 -60 0.6 0.3 0 -0.3 -0.6 -90 -0.9 -120 -1.2 TIME (5ns/DIV.) FIGURE 3. SMALL SIGNAL PULSE RESPONSE 6 TIME (5ns/DIV.) FIGURE 4. LARGE SIGNAL PULSE RESPONSE HFA1130 Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) IN 0V TO 0.5V IN 0V TO 1V OUT 0V TO 1V OUT 0V TO 1V AV = +2, VH = 1V, VL = -1V, 2X OVERDRIVE AV = +2, VH = 2V, VL = -2V TIME (10ns/DIV.) TIME (10ns/DIV.) GAIN AV = +1 -6 AV = +2 AV = +6 -9 AV = +11 -12 PHASE 0 -90 AV = +1 -180 AV = +2 AV = +6 -270 AV = +11 0.3 1 10 100 FREQUENCY (MHz) -360 1K RL = 50Ω -6 RL = 50Ω RL = 100Ω PHASE 0 -90 RL = 1kΩ -180 RL = 100Ω -270 RL = 1kΩ 0.3 1 10 100 FREQUENCY (MHz) -360 1K FIGURE 9. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS 7 AV = -20 -12 PHASE 180 AV = -1 90 AV = -5 0 AV = -10 -90 AV = -20 NORMALIZED GAIN (dB) RL = 100Ω PHASE (DEGREES) GAIN (dB) GAIN -3 AV = -10 -9 1 10 100 FREQUENCY (MHz) -180 1K FIGURE 8. INVERTING FREQUENCY RESPONSE RL = 1kΩ 0 AV = -5 0.3 AV = +1, VOUT = 200mVP-P 3 AV = -1 -6 FIGURE 7. NON-INVERTING FREQUENCY RESPONSE 6 GAIN -3 AV = +2, VOUT = 200mVP-P RL = 1kΩ 3 0 GAIN -3 RL = 100Ω RL = 50Ω -6 PHASE 0 RL = 50Ω RL = 100Ω -90 RL = 1kΩ -180 RL = 100Ω RL = 1kΩ 0.3 1 10 100 -270 -360 1K FREQUENCY (MHz) FIGURE 10. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS PHASE (DEGREES) -3 VOUT = 200mVP-P 0 PHASE (DEGREES) VOUT = 200mVP-P 0 NORMALIZED GAIN (dB) FIGURE 6. CLAMPED PERFORMANCE PHASE (DEGREES) NORMALIZED GAIN (dB) FIGURE 5. UNCLAMPED PERFORMANCE HFA1130 Typical Performance Curves AV = +1 20 NORMALIZED GAIN (dB) VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) 0.160VP-P GAIN (dB) 10 0 -10 0.500VP-P 0.920VP-P -20 1.63VP-P -30 0.3 1 10 100 AV = +2 20 0.32VP-P 10 0 1.00VP-P 1.84VP-P -10 -20 3.26VP-P -30 0.3 1K 1 10 FREQUENCY (MHz) 1K FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES AV = +6 AV = +1 10 950 0 BANDWIDTH (MHz) NORMALIZED GAIN (dB) FIGURE 11. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES 20 100 FREQUENCY (MHz) 0.96VP-P TO 3.89VP-P -10 -20 -30 900 850 800 750 700 0.3 1 10 FREQUENCY (MHz) 100 -50 1K -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES FIGURE 14. -3dB BANDWIDTH vs TEMPERATURE AV = +2 AV = +2 +2.0 DEVIATION (DEGREES) +1.5 GAIN (dB) 0 -0.05 -0.10 -0.15 -0.20 +1.0 +0.5 0 -0.5 -1.0 -1.5 -2.0 1 10 FREQUENCY (MHz) FIGURE 15. GAIN FLATNESS 8 100 0 15 30 45 60 75 90 105 120 135 FREQUENCY (MHz) FIGURE 16. DEVIATION FROM LINEAR PHASE 150 HFA1130 Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) AV = +2, VOUT = 2V AV = -1 250 GAIN 2.5 180 135 PHASE 0.25 90 45 0 0.01 0.1 1 10 FREQUENCY (MHz) 100 SETTLING ERROR (%) 25 PHASE (DEGREES) GAIN (kΩ) 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 500 -4 1 FIGURE 17. OPEN LOOP TRANSIMPEDANCE 6 11 16 21 26 TIME (ns) 31 36 41 46 FIGURE 18. SETTLING RESPONSE 40 2-TONE 35 INTERCEPT POINT (dBm) OUTPUT RESISTANCE (Ω) 1000 100 10 1 30 25 20 15 10 5 0.1 0 0.3 1 10 100 FREQUENCY (MHz) 1000 0 FIGURE 19. CLOSED LOOP OUTPUT RESISTANCE -30 -35 -40 400 -50 -40 100MHz DISTORTION (dBc) DISTORTION (dBc) 200 300 FREQUENCY (MHz) FIGURE 20. 3rd ORDER INTERMODULATION INTERCEPT -30 -45 50MHz -50 -55 -60 100MHz -60 -70 50MHz -80 -90 30MHz 30MHz -100 -65 -70 100 -110 -5 -3 -1 1 3 5 7 9 11 13 OUTPUT POWER (dBm) FIGURE 21. 2nd HARMONIC DISTORTION vs POUT 9 15 -5 -3 -1 1 3 5 7 9 11 13 OUTPUT POWER (dBm) FIGURE 22. 3rd HARMONIC DISTORTION vs POUT 15 HFA1130 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) 35 AV = +1 VOUT = 1VP-P VOUT = 0.5VP-P VOUT = 2VP-P 25 RF = 360Ω VOUT = 0.5VP-P 20 10 RF = 510Ω VOUT = 2VP-P RF = 510Ω VOUT = 1VP-P 5 RF = 510Ω VOUT = 0.5VP-P 0 100 200 300 400 500 600 700 INPUT RISE TIME (ps) 800 900 1000 100 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 200 300 400 500 600 700 INPUT RISE TIME (ps) 800 900 1000 FIGURE 24. OVERSHOOT vs INPUT RISE TIME 25 AV = +2, tR = 200ps, VOUT = 2VP-P 24 SUPPLY CURRENT (mA) 23 22 21 20 19 18 360 400 440 480 520 560 600 FEEDBACK RESISTOR (Ω) 640 680 -60 FIGURE 25. OVERSHOOT vs FEEDBACK RESISTOR INPUT OFFSET VOLTAGE (mV) 6 7 8 9 TOTAL SUPPLY VOLTAGE (V+ - V-, V) FIGURE 27. SUPPLY CURRENT vs SUPPLY VOLTAGE 10 -20 0 20 40 60 TEMPERATURE (oC) 80 100 120 FIGURE 26. SUPPLY CURRENT vs TEMPERATURE 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 5 -40 10 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 +IBIAS VIO -IBIAS -60 -40 -20 0 20 40 60 80 TEMPERATURE (oC) 45 42 39 36 33 30 27 24 21 18 15 12 9 6 3 0 BIAS CURRENTS (µA) OVERSHOOT (%) RF = 360Ω VOUT = 1VP-P 15 FIGURE 23. OVERSHOOT vs INPUT RISE TIME SUPPLY CURRENT (mA) AV = +2 RF = 360Ω VOUT = 2VP-P 30 OVERSHOOT (%) OVERSHOOT (%) Typical Performance Curves 100 120 FIGURE 28. VIO AND BIAS CURRENTS vs TEMPERATURE HFA1130 Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) 3.7 NOISE VOLTAGE (nV/√Hz) 3.4 3.3 3.2 | - VOUT | 3.1 3.0 2.9 2.8 2.7 (AV = -1, RL = 50Ω) 250 25 225 200 20 175 150 15 125 100 10 75 5 ENI INIINI+ 2.6 2.5 -60 -40 -20 0 20 40 60 80 100 0 100 120 1K TEMPERATURE (oC) 10K FREQUENCY (Hz) FIGURE 29. OUTPUT VOLTAGE vs TEMPERATURE FIGURE 30. INPUT NOISE vs FREQUENCY 20 15 VOUT - (AV VIN) (mV) VL = -3V VL = -2V VL = -1V 10 5 0 -5 VH = 1V -10 VH = 2V VH = 3V -15 AV = -1, RL = 100Ω -20 -3 -2 -1 0 1 2 AV VIN (V) FIGURE 31. NON-LINEARITY NEAR CLAMP VOLTAGE 11 100K 3 50 25 0 NOISE CURRENT (pA/√Hz) 275 +VOUT 3.5 OUTPUT VOLTAGE (V) 300 30 3.6 HFA1130 Die Characteristics DIE DIMENSIONS: 63 mils x 44 mils x 19 mils 1600µm x 1130µm PASSIVATION: Type: Nitride Thickness: 4kÅ ±0.5kÅ METALLIZATION: Type: Metal 1: AlCu(2%)/TiW Thickness: Metal 1: 8kÅ ±0.4kÅ TRANSISTOR COUNT: 52 SUBSTRATE POTENTIAL (Powered Up): Type: Metal 2: ALCu(2%) Thickness: Metal 2: 16kÅ ±0.8kÅ Floating (Recommend Connection to V-) Metallization Mask Layout HFA1130 +IN -IN V- BAL VL VH BAL V+ OUT All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 12