RFP12P08, RFP12P10 Data Sheet 12A, 80V and 100V, 0.300 Ohm, P-Channel Power MOSFETs The RFP12P08, and RFP12P10 are P-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. June 1999 File Number 1495.2 Features • 12A, 80V and 100V • rDS(ON) = 0.300Ω • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance Formerly developmental type TA17511. • Majority Carrier Device Ordering Information • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” PART NUMBER PACKAGE BRAND RFP12P08 TO-220AB RFP12P08 RFP12P10 TO-220AB RFP12P10 Symbol D NOTE: When ordering, include the entire part number. G S Packaging TO-220AB DRAIN (TAB) 4-161 SOURCE DRAIN GATE CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999. RFP12P08, RFP12P10 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFP12P08 RFP12P10 UNITS -80 -100 V -80 -100 V RMS Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 12 12 A Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 30 30 A Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 ±20 V Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 75 75 W Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 0.6 W/oC Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 -55 to 150 oC Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300 260 300 260 oC oC Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20KΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER MIN TYP MAX UNITS RFP12P08 -80 - - V RFP12P10 -100 - - V VGS = VDS, ID = 250µA -2 - -4 V VDS = Rated BVDSS, VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - 25 µA IGSS VGS = ±20V, VDS = 0 - - ±100 nA Drain to Source On Voltage (Note 2) VDS(ON) ID = 12A, VGS = -10V - - -3.6 V Drain to Source On Resistance (Note 2) rDS(ON) ID = 12A, VGS = -10V, (Figures 6, 7) - - 0.300 Ω ID ≈ 12A, VDD = 50V, RG = 50Ω, RL = 4.1Ω, VGS = -10V (Figure 10) - 18 60 ns - 90 175 ns td(OFF) - 144 275 ns tf - 94 175 ns - - 1500 pF - - 700 pF - - 300 pF - - 1.67 oC/W MIN TYP MAX UNITS ISD = -12A - - 1.4 V ISD = -12A, dISD/dt = 100A/µs - 200 - ns Drain to Source Breakdown Voltage Gate Threshold Voltage SYMBOL BVDSS VGS(TH) Zero Gate Voltage Drain Current Gate to Source Leakage Current Turn-On Delay Time IDSS td(ON) Rise Time tr Turn-Off Delay Time Fall Time Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Thermal Resistance, Junction to Case RθJC TEST CONDITIONS ID = 250µA, VGS = 0 VGS = 0V, VDS = -25V, f = 1MHz (Figure 9) RFP12P08, RFP12P10 Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time SYMBOL VSD trr TEST CONDITIONS NOTES: 2. Pulse Test: Pulse Width = ≤ 300µs Max, Duty Cycle ≤ 2% 3. Repetitive rating: pulse width limited by maximum junction temperature. 4-162 RFP12P08, RFP12P10 Typical Performance Curves 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 0.2 0 0 50 100 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 150 25 50 75 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 100 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 40 ID MAX CONTINUOUS 10 DC 1 RFP12P08 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC 30 150 VGS = -9V VGS = -8V VGS = -7V 20 VGS = -6V 10 VGS = -5V VGS = -4V VGS = -3V 0 1 10 100 VDS, DRAIN TO SOURCE (V) 0 1000 -2 -4 -6 -8 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 3. FORWARD BIAS SAFE OPERATING AREA -10 FIGURE 4. SATURATION CHARACTERISTICS 0.4 20 VDS = -10V PULSE DURATION = 80µs 16 DUTY CYCLE = 0.5% MAX -40oC VGS = -10V PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 25oC DRAIN TO SOURCE ON RESISTANCE (Ω) IDS(ON), DRAIN TO SOURCE CURRENT (A) VGS = -10V VGS = -20V RFP12P10 0.1 125 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE TC = 25oC TJ = MAX RATED OPERATION IN THIS AREA LIMITED BY rDS(ON) 100 TC, CASE TEMPERATURE (oC) 125oC 12 8 4 125oC 0.3 25oC 0.2 -40oC 0.1 125oC -40oC 0 0 -2 -3 -5 -4 -6 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 5. TRANSFER CHARACTERISTICS 4-163 -7 -8 0 0 2 4 8 12 6 10 14 ID, DRAIN CURRENT (A) 16 18 FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 20 RFP12P08, RFP12P10 Typical Performance Curves (Continued) 1.3 ID = 12A, VGS = -10V PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX ID = 250µA VDS = VGS 1.2 NORMALIZED GATE THRESHOLD VOLTAGE 1.5 1.0 0.5 1.1 1.0 0.9 0.8 0.7 0 -50 50 0 100 0.6 -50 150 0 TJ, JUNCTION TEMPERATURE (oC) FIGURE 7. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 150 100 FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 2400 100 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 2000 C, CAPACITANCE (PF) 50 TJ, JUNCTION TEMPERATURE (oC) 1600 CISS 1200 800 COSS 400 CRSS VDD = BVDSS 75 50 10 20 30 40 VDD = BVDSS GATE SOURCE VOLTAGE RL = 8.3 IG(REF) = 0.92mA VGS = -10V 8 6 0.75BVDSS 0.75BVDSS 0.50BVDSS 0.50BVDSS 0.25BVDSS 0.25BVDSS 25 4 2 DRAIN SOURCE VOLTAGE 0 0 10 0 50 20 VDS, DRAIN TO SOURCE VOLTAGE (V) IG(REF) IG(ACT) t, TIME (µs) 80 0 IG(REF) IG(ACT) NOTE: Refer to Intersil Application Notes AN7254 and AN7260 FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuits and Waveforms tON tOFF td(OFF) td(ON) tr 0 RL DUT VGS RG VDD + tf 10% 10% VDS VGS 0 90% 90% 10% 50% 50% PULSE WIDTH 90% FIGURE 11. SWITCHING TIME TEST CIRCUIT 4-164 FIGURE 12. RESISTIVE SWITCHING WAVEFORMS VGS, GATE TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE ON RESISTANCE 2.0 RFP12P08, RFP12P10 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. 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