RFP2N12L Data Sheet April 1999 2A, 120V, 1.750 Ohm, Logic Level, N-Channel Power MOSFET File Number Features • 2A, 120V The RFP2N12L is an N-Channel enhancement mode silicon gate power field effect transistor specifically designed for use with logic level (5V) driving sources in applications such as programmable controllers, automotive switching, and solenoid drivers. This performance is accomplished through a special gate oxide design which provides full rated conduction at gate biases in the 3V - 5V range, thereby facilitating true on-off power control directly from logic circuit supply voltages. • rDS(ON) = 1.750Ω • Design Optimized for 5V Gate Drives • Can be Driven Directly from QMOS, NMOS, TTL Circuits • Compatible with Automotive Drive Requirements • SOA is Power Dissipation Limited • Nanosecond Switching Speeds Formerly developmental type TA09528. • Linear Transfer Characteristics Ordering Information • High Input Impedance PART NUMBER RFP2N12L PACKAGE TO-220AB 2874.2 • Majority Carrier Device BRAND • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” RFP2N12L NOTE: When ordering, include the entire part number. Symbol D G S Packaging JEDEL TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) 6-252 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 RFP2N12L Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFP2N12L UNITS Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS 120 V Drain to Gate Voltage RGS = 20KΩ (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 120 V Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±10 V Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 2 A Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 5 A Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 25 W Derate Above TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 W/ oC Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS 120 - - V Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0 Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 8) 1 - 2 V VDS = Rated BVDSS, VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - 25 µA VGS = ±10V, VDS = 0V - - ±100 nA ID = 2A, VGS = 5V - - 3.5 V ID = 2A, VGS = 5V (Figure 6, 7) - - 1.750 Ω ID ≈ 2A, VDD = 75V, RG = 6.25Ω, RL = 75Ω, VGS = 5V (Figures 10, 11, 12) - 10 25 ns - 10 45 ns td(OFF) - 24 45 ns tf - 20 25 ns - - 200 pF - - 80 pF Zero-Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On Voltage (Note 2) Drain to Source On Resistance (Note 2) Turn-On Delay Time IDSS IGSS VDS(ON) rDS(ON) td(ON) Rise Time tr Turn-Off Delay Time Fall Time Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS - - 35 pF Thermal Resistance Junction to Case RθJC - - 5 oC/W MIN TYP MAX UNITS ISD = 2A - - 1.4 V ISD = 2A, dlSD/dt = 50A/µs - 150 - ns VGS = 0V, VDS = 25V, f = 1MHz (Figure 9) Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time SYMBOL VSD trr TEST CONDITIONS NOTES: 2. Pulsed: pulse duration = 300µs max, duty cycle = 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. 6-253 RFP2N12L Unless Otherwise Specified 1.2 2.5 1.0 2.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER Typical Performance Curves 0.8 0.6 0.4 1.5 1.0 0.5 0.2 0 25 0 0 25 50 75 100 TC, CASE TEMPERATURE (oC) 125 150 4 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VGS = 10V TC = 25oC PULSE DURATION = 80µs TJ = MAX RATED TC = 25oC OPERATION IN THIS AREA LIMITED BY rDS(ON) 75 100 125 TC, CASE TEMPERATURE (oC) 150 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 10 50 1 0.10 VGS = 5V VGS = 4V 3 2 VGS = 3V 1 VGS = 2V 0.01 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 1000 1 6 VDS = 15V PULSE DURATION = 80µs 5 9 10 FIGURE 4. SATURATION CHARACTERISTICS -40oC rDS(ON), DRAIN TO SOURCE ON RESISTANCE (Ω) IDS(ON), DRAIN TO SOURCE CURRENT (A) FIGURE 3. FORWARD BIAS SAFE OPERATING AREA 2 3 4 5 6 7 8 VDS, DRAIN TO SOURCE VOLTAGE (V) 25oC 4 3 125oC 2 125oC 1 VGS = 5V PULSE DURATION = 80µs 4 125oC 3 25oC 2 -40oC 1 -40oC 0 1 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 5. TRANSFER CHARACTERISTICS 6-254 5 0.5 0 1 2 ID, DRAIN CURRENT (A) 3 FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN CURRENT 4 RFP2N12L Unless Otherwise Specified (Continued) 1.5 ID = 250µA VGS = 5V 2.0 NORMALIZED GATE THRESHOLD VOLTAGE 1.5 1.0 1.0 0.5 0.5 -50 0 50 100 150 TJ, JUNCTION TEMPERATURE (oC) 50 200 FIGURE 7. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 0 50 100 TJ, JUNCTION TEMPERATURE (oC) 150 FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 10 150 VDS, DRAIN TO SOURCE VOLTAGE (V) 240 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 200 C, CAPACITANCE (pF) VGS = VDS ID = 250µA 112.5 160 120 CISS 80 COSS 40 CRSS 10 20 30 40 VDS, DRAIN TO SOURCE VOLTAGE (V) 8 GATE SOURCE VOLTAGE 75 VDD = BVDSS 6 VDD = BVDSS 4 0.75BVDSS 0.50BVDSS 0.25BVDSS DRAIN SOURCE VOLTAGE 37.5 0 0 RL = 75Ω IG(REF) = 0.095mA VGS = 10V 50 2 VGS, GATE TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE ON RESISTANCE Typical Performance Curves 0 I 20 G(REF) IG(ACT) t, TIME (µs) I 80 G(REF) IG(ACT) NOTE: Refer to Intersil Applications Notes AN7254 and AN7260 FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuits and Waveforms tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 11. SWITCHING TIME TEST CIRCUIT 6-255 10% 50% 50% PULSE WIDTH FIGURE 12. RESISTIVE SWITCHING WAVEFORMS RFP2N12L All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. 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