RFP2N08L, RFP2N10L Data Sheet July 1999 2A, 80V and 100V, 1.050 Ohm, Logic Level, N-Channel Power MOSFETs The RFP2N08L and RFP2N10L are N-Channel enhancement mode silicon gate power field effect transistors specifically designed for use with logic level (5V) driving sources in applications such as programmable controllers, automotive switching, and solenoid drivers. This performance is accomplished through a special gate oxide design which provides full rated conductance at gate biases in the 3V to 5V range, thereby facilitating true on-off power control directly from logic circuit supply voltages. File Number 2872.2 Features • 2A, 80V and 100V • rDS(ON) = 1.050Ω • Design Optimized for 5V Gate Drives • Can be Driven Directly from QMOS, NMOS, TTL Circuits • Compatible with Automotive Drive Requirements • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics Formerly developmental type TA0924. • High Input Impedance Ordering Information PART NUMBER PACKAGE • Majority Carrier Device BRAND RFP2N08L TO-220AB RFP2N08L RFP2N10L TO-220AB RFP2N10L • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol NOTE: When ordering, include the entire part number. D G S Packaging JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) 6-248 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 RFP2N08L, RFP2N10L Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFP2N08L RFP2N10L UNITS Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 80 100 V Drain to Gate Voltage (RGS = 1MΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 80 100 V Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 2 2 A Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 5 5 A Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±10 ±10 V Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD 25 25 W Derate above 25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 0.2 W/oC Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 -55 to 150 oC Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300 260 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER MIN TYP MAX UNITS RFP2N08L 80 - - V RFP2N10L 100 - - V Drain to Source Breakdown Voltage Gate to Threshold Voltage SYMBOL BVDSS TEST CONDITIONS VGS = 0V, ID = 250µA VGS(TH) VGS = VDS, ID = 250µA 1.0 - 2.0 V Gate to Source Leakage IGSS VGS = ±10V, VDS = 0V - - ±100 nA Zero to Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 1.0 µA - - 25 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC Drain to Source On Voltage (Note 2) VDS(ON) ID = 2A, VGS = 5V - - 2.1 V Drain to Source On Resistance (Note 2) rDS(ON) ID = 2A, VGS = 5V, (Figures 6, 7) - - 1.050 Ω td(ON) ID = 2A, VDD = 50V, RG = 6.25Ω, RL = 25Ω, VGS = 5V (Figures 10, 11, 12) - 10 25 ns - 15 45 ns td(OFF) - 25 45 ns tf - 20 25 ns - - 200 pF - - 80 pF - - 35 pF Turn-On Delay Time Rise Time tr Turn-Off Delay Time Fall Time Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Thermal Resistance Junction to Case VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 9) - - 5 oC/W MIN TYP MAX UNITS ISD = 2A - - 1.4 V ISD = 2A, dISD/dt = 50A/µs - 100 - ns RθJC Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Reverse Recovery Time SYMBOL VSD trr TEST CONDITIONS NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. 6-249 RFP2N08L, RFP2N10L Typical Performance Curves Unless Otherwise Specified 2.5 POWER DISSIPATION MULTIPLIER 1.2 1.0 ID, DRAIN CURRENT (A) 2.0 0.8 0.6 0.4 1.5 1.0 0.5 0.2 0 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150 25 FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 10 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 150 8 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC 7 1 OPERATION IN THIS AREA LIMITED BY rDS(ON) 0.1 RFP2N10L VGS = 10V 6 VGS = 5.0V 5 4 VGS = 4.0V 3 2 VGS = 3.0V 1 VGS = 2.0V 0.01 1 102 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 103 3 5 7 2 4 6 8 VDS, DRAIN TO SOURCE VOLTAGE (V) 2 6 TC = 125V TC = 25V 5 TC = -40V 4 3 2 TC = 125V 1 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 5V TC = 125V ON RESISTANCE (Ω) 7 rDS(ON), DRAIN TO SOURCE PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS = 15V 9 FIGURE 4. SATURATION CHARACTERISTICS 8 0 1 0 FIGURE 3. FORWARD BIAS SAFE OPERATING AREA IDS(ON), DRAIN TO SOURCE CURRENT (A) 75 100 125 TC, CASE TEMPERATURE (oC) FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE TJ = MAX RATED, TC = 25oC RFP2N08L 50 1.5 1 TC = 25V TC = -40V 0.5 TC = -40V 0 1 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 5. TRANSFER CHARACTERISTICS 6-250 6 0 1 2 5 6 7 3 4 ID, DRAIN CURRENT (A) 8 9 10 FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN CURRENT RFP2N08L, RFP2N10L Unless Otherwise Specified (Continued) 2.0 ID = 2A, VGS = 5V PULSE DURATION = 80ms DUTY CYCLE = 0.5% MAX 2.0 NORMALIZED GATE TO THRESHOLD VOLTAGE 1.5 1.0 ID = 250µA VDS = VGS 1.5 1.0 0.5 0.5 -50 0 50 150 100 0 -50 200 0 TJ, JUNCTION TEMPERATURE (oC) 240 VGS = 0V, f = 0.1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD C, CAPACITANCE (pF) 160 120 CISS 80 COSS 40 0 10 20 30 50 40 200 150 10 100 RL = 50Ω, VGS = 5V IG(REF) = 0.094mA PLATEAU VOLTAGES IN DESCENDING ORDER: VDD = BVDSS VDD = 0.75 BVDSS VDD = 0.50 BVDSS VDD = 0.25 BVDSS 75 50 8 6 4 GATE SOURCE VOLTAGE 25 2 DRAIN SOURCE VOLTAGE 0 CRSS 0 100 FIGURE 8. NORMALIZED GATE TO THRESHOLD vs JUNCTION TEMPERATURE VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 7. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 200 50 TJ, JUNCTION TEMPERATURE (oC) 60 0 I G ( REF ) 20 ------------------------I G ( ACT ) 70 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS , GATE TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE ON RESISTANCE Typical Performance Curves t, TIME (ms) I G ( REF ) 80 ------------------------I G ( ACT ) NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuit and Waveforms tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 11. SWITCHING TIME TEST CIRCUIT 6-251 10% 50% 50% PULSE WIDTH FIGURE 12. RESISTIVE SWITCHING WAVEFORMS RFP2N08L, RFP2N10L All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. 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