RFL2N06L Data Sheet October 1999 2A, 60V, 0.950 Ohm, Logic Level, N-Channel Power MOSFET File Number Features • 2A, 50V and 60V The RFL2N06L N-channel enhancement mode silicon gate power field effect transistor is designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. • rDS(ON) = 0.950Ω • Design Optimized for 5V Gate Drives • Can be Driven from QMOS, NMOS, TTL Circuits • Compatible with Automotive Drive Requirements • SOA is Power Dissipation Limited Formerly developmental type TA9520. • Nanosecond Switching Speeds Ordering Information • Linear Transfer Characteristics PART NUMBER RFL2N06L PACKAGE TO-205AF 1560.3 • High Input Impedance BRAND • Majority Carrier Device RFL2N06L Symbol NOTE: When ordering, use the entire part number. D G S Packaging JEDEC TO-205AF DRAIN (CASE) SOURCE GATE 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 RFL2N06L Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFL2N06L UNITS Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 50 V Drain to Gate Voltage (RGS = 20KΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 60 V Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 2 A Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 10 A Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±10 V Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 8.33 W 0.0667 W/oC Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC Above TC = 25oC, Derate Linearly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. TC = 25oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V 60 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA, (Figure 8) 1 - 2 V VDS = Rated BVDSS, VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - 25 µA VGS = ±10V, VDS = 0V - - ±100 nA - - 1.9 V - 0.950 Ω - 10 20 ns - 65 130 ns td(OFF) - 20 40 ns tf - 30 60 ns - - 225 pF Zero Gate Voltage Drain Current IDSS Gate to Source Leakage Current IGSS Drain to Source On Voltage (Note 2) VDS(ON) ID = 2A, VGS = 5V Drain to Source On Resistance (Note 2) rDS(ON) ID =2A, VGS = 5V, (Figures 6, 7) Turn-On Delay Time td(ON) Rise Time ID = 2A, VDD = 30V, RG = 6.25Ω, RL = 30Ω VGS = 5V, (Figures 10, 11, 12) tr Turn-Off Delay Time Fall Time Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1MHz, (Figure 9) Output Capacitance COSS - - 100 pF Reverse Transfer Capacitance CRSS - - 40 pF Thermal Resistance Junction to Case RθJC - - 15 oC/W MIN TYP MAX UNITS ISD = 2A - - 1.4 V ISD = 2A, dISD/dt = 100A/µs - 150 - ns Source to Drain Diode Specifications PARAMETER SYMBOL Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time VSD trr TEST CONDITIONS NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. 2 RFL2N06L Unless Otherwise Specified 1.2 2.5 1.0 2.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER Typical Performance Curves 0.8 0.6 0.4 1.5 1.0 0.5 0.2 0 0 25 50 75 100 125 0 25 150 50 75 100 125 TC, CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC) FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE TJ = MAX RATED TC = 25oC OPERATION IN THIS AREA LIMITED BY rDS(ON) PULSE DURATION = 80µs TC = 25oC 12 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 1 0.10 VGS = 10V VGS = 7.5V 10 8 6 VGS = 5V 4 4.5V 4V 3.5V 3V 2.5V 2V 7 2 0.01 1 0 100 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 1000 1 2 3 4 5 6 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. SATURATION CHARACTERISTICS 1.6 8 VGS = 5V 1.4 PULSE DURATION = 80µs VDS = 10V PULSE DURATION = 80µs DUTY CYCLE ≤ 2% 7 rDS(ON), DRAIN TO SOURCE ON RESISTANCE(Ω) IDS(ON), DRAIN TO SOURCE CURRENT (A) FIGURE 3. FORWARD BIAS SAFE OPERATING AREA 6 TC = 25oC 5 TC = -40oC 4 TC = 125oC 3 2 TC = 125oC 1 0 150 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 5. TRANSFER CHARACTERISTICS 3 TC = 125oC 1.0 0.8 TC = 25oC 0.6 TC = -40oC 0.4 0.2 TC = -40oC 1 1.2 6 0 0 2 4 6 ID, DRAIN CURRENT (A) 8 10 FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN CURRENT RFL2N06L Typical Performance Curves 2 VGS = 5V, ID = 2A NORMALIZED GATE 1.5 THRESHOLD VOLTAGE 1 0.5 0 -50 0 50 100 1.5 1 0.5 0 -50 200 150 VGS = VDS, ID = 250µA 0 TJ, JUNCTION TEMPERATURE (oC) FIGURE 7. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 200 150 10 60 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 300 VDS, DRAIN TO SOURCE VOLTAGE (V) C, CAPACITANCE (pF) 100 FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 400 200 CISS 100 COSS CRSS 0 50 TJ, JUNCTION TEMPERATURE (oC) RL = 4Ω IG(REF) = 0.5mA VGS = 5V 45 8 GATE SOURCE VOLTAGE VDD = BVDSS VDD = BVDSS 30 6 4 0.75BVDSS 0.50BVDSS 0.25BVDSS 15 2 DRAIN SOURCE VOLTAGE 0 0 0 10 20 30 40 VGS, GATE TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE ON RESISTANCE 2 Unless Otherwise Specified (Continued) 50 20 VDS, DRAIN TO SOURCE VOLTAGE (V) IG(REF) IG(ACT) t, TIME (µs) 80 IG(REF) IG(ACT) NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuits and Waveforms tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 11. SWITCHING TIME TEST CIRCUIT 4 10% 50% 50% PULSE WIDTH FIGURE 12. RESISTIVE SWITCHING WAVEFORMS RFL2N06L All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. 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