Plastic Packages for Integrated Circuits Package Outline Drawing W4x5.20K 20 BALL WAFER LEVEL CHIP SCALE PACKAGE (WLCSP) Rev 0, 8/14 1.200 X Y 1.82±0.030 0.400 E 20x 0.265±0.035 2.15±0.030 D C 1.600 B 0.275 A (4X) 0.10 1 2 4 3 0.310 TOP VIEW 0.200 PIN 1 (A1 CORNER) BOTTOM VIEW Z 0.05 Z PACKAGE OUTLINE SEATING PLANE 3 0.240 0.290 0.400 0.265±0.035 0.10 0.05 ZXY Z 0.200±0.030 RECOMMENDED LAND PATTERN 0.500±0.050 SIDE VIEW NOTES: 1. Dimensions and tolerance per ASME Y 14.5M - 1994. 2. Dimension is measured at the maximum bump diameter parallel to primary datum Z . 3. Primary datum Z and seating plane are defined by the spherical crowns of the bump. 4. Bump position designation per JESD 95-1, SPP-010. 5. There shall be a minimum clearance of 0.10mm between the edge of the bump and the body edge. 1