Plastic Packages for Integrated Circuits Package Outline Drawing W5x8.40 40 BALL WAFER LEVEL CHIP SCALE PACKAGE (WLCSP 0.4mm PITCH) Rev 0, 10/13 X 2.010 ± 0.030 1.600 Y H 40x 0.265 ±0.035 G F E 3.270 ± 0.030 2.800 D C 0.235 B A (4X) 1 2 0.10 PIN 1 (A1 CORNER) TOP VIEW 0.205 BOTTOM VIEW PACKAGE OUTLINE 0.240 3 4 5 0.400 0.05 Z Z SEATING PLANE 3 0.290 0.400 0.265 ±0.035 40x 0.10 0.05 ZXY Z 0.200±0.030 TYPICAL RECOMMENDED LAND PATTERN 0.500±0.050 SIDE VIEW NOTES: 1. Dimensions and tolerance per ASME Y14.5M - 1994. 2. Dimension is measured at the maximum bump diameter parallel to primary datum Z . 3. Primary datum Z and seating plane are defined by the spherical crowns of the bump. 4. Bump position designation per JESD 95-1, SPP-010. 5. There shall be a minimum clearance of 0.10mm between the edge of the bump and the body edge. 1