VS-VSKL300/08PbF Datasheet

VS-VSKL300/08PbF
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Vishay Semiconductors
INT-A-PAK Power Module Thyristor/Diode, 300 A
FEATURES
• Electrically isolated base plate
• 3000 VRMS isolating voltage
• Industrial standard package
• Simplified mechanical designs, rapid assembly
• High surge capability
• Large creepage distances
• UL approved file E78996
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
INT-A-PAK
APPLICATIONS
• Battery chargers
PRODUCT SUMMARY
IT(AV)
300 A
Type
Modules - Thyristor, Standard
Package
INT-A-PAK
Circuit
SCR/diode doubler circuit,
negative control
• Welders
• Power converters
• Alternators
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
CHARACTERISTICS
VALUES
UNITS
800
V
53 °C
300
A
50 Hz
6500
60 Hz
6900
50 Hz
214
60 Hz
195
VDRM/VRRM
IT(AV)
ITSM
I2t
I2t
TJ
Range
A
kA2s
2140
kA2s
-40 to 140
°C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VS-VSKL300/08PbF
VRRM/VDRM, MAXIMUM REPETITIVE
PEAK REVERSE VOLTAGE
V
VRSM/VDSM, MAXIMUM NON-REPETITIVE
PEAK REVERSE VOLTAGE
V
IRRM/IDRM
AT 125 °C
mA
800
900
50
Revision: 11-Apr-14
Document Number: 94557
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VS-VSKL300/08PbF
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ON-STATE CONDUCTION
PARAMETER
SYMBOL
Maximum average on-state current
at case temperature
Maximum RMS on-state current
Maximum peak, one-cycle 
on-state, non-repetitive 
surge current
IT(AV)
IT(RMS)
ITSM
TEST CONDITIONS
180° conduction half sine wave
116
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum
I2t
for fusing
I2t
°C
6600
t = 10 ms
I2t
A
53
t = 10 ms
t = 8.3 ms
No voltage
reapplied
100 % VRRM 
reapplied
No voltage
reapplied
6900
A
5500
Sine half wave,
initial TJ =
TJ maximum
5800
214
195
151
100 % VRRM 
reapplied
kA2s
138
t = 0.1 ms to 10 ms, no voltage reapplied
2140
Low level value of threshold voltage
VT(TO)1
(16.7 % x  x IT(AV) < I <  x IT(AV)), TJ maximum
0.796
High level value of threshold voltage
VT(TO)2
(I >  x IT(AV)), TJ maximum
0.868
Low level value on-state
slope resistance
rt1
(16.7 % x  x IT(AV) < I <  x IT(AV)), TJ maximum
0.972
High level value on-state
slope resistance
rt2
(I >  x IT(AV)), TJ maximum
0.88
Maximum on-state voltage drop
UNITS
300
As AC switch
t = 8.3 ms
Maximum I2t for fusing
VALUES
kA2s
V
m
VTM
VFM
TJ = 25 °C, 500 A Ipk
SCR
1.35
DIODE
1.20
V
SWITCHING
PARAMETER
SYMBOL
TEST CONDITIONS
Typical delay time
td
Gate current 1 A, dIg/dt = 1 A/μs
Vd = 0.67 % VDRM, TJ = 25 °C
Typical turn-off time
tq
ITM = 300 A, TJ = TJ maximum, dI/dt = 20 A/μs, VR = 50 V
dV/dt = 20 V/μs, Gate 0 V 100 , tp = 500 μs
VALUES
1.0
100
UNITS
μs
BLOCKING
PARAMETER
SYMBOL
VALUES
UNITS
TJ = TJ maximum linear to 67 % rated VDRM
500
V/μs
IDRM,
IRRM
TJ = TJ maximum, rated VDRM/VRRM applied
50
mA
VINS
50 Hz, circuit to base, all terminal shorted, t = 1 s
3000
V
Maximum critical rate of rise of
off-state voltage
dV/dt
Maximum peak reverse and off-state
leakage current
RMS insulation voltage
TEST CONDITIONS
Revision: 11-Apr-14
Document Number: 94557
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TRIGGERING
PARAMETER
SYMBOL
Maximum peak gate power
PGM
Maximum average gate power
PG(AV)
Maximum peak positive gate current
IGM
Maximum required DC gate voltage to trigger
VGT
Maximum required DC gate current to trigger
IGT
Maximum holding current
IH
Maximum peak positive gate voltage
+VGM
Maximum peak negative gate voltage
-VGM
DC gate voltage not to trigger
VGD
DC gate current not to trigger
IGD
Maximum non-repetitive rate of rise of
turned-on current
dI/dt
TEST CONDITIONS
VALUES
UNITS
TJ = TJ maximum, tp  5 ms
10.0
TJ = TJ maximum, f = 50 Hz, d% = 50
2.0
TJ = TJ maximum, tp  5 ms
3.0
A
3
V
TJ = 25 °C
Anode supply: 12 V resistive load
200
mA
600
20
TJ = TJ maximum, tp  5 ms
V
5.0
TJ = TJ maximum
Maximum gate current/voltage not to trigger is
the maximum value which will not trigger any
unit with rated VDRM anode to cathode applied
W
0.30
V
10
mA
1000
A/μs
VALUES
UNITS
Gate drive 20 V, 20 , tr  1 μs
TJ = TJ maximum, anode voltage  80 % VDRM
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
Maximum junction operating
temperature range
TEST CONDITIONS
TJ
-40 to 140
Maximum storage temperature range
TStg
-40 to 150
Maximum thermal resistance,
junction to case per junction
RthJC
DC operation
0.19
Maximum thermal resistance,
case to heatsink per module
RthCS
Mounting surface smooth, flat and greased
0.035
A mounting compound is recommended and
the torque should be rechecked after a
period of 3 hours to allow for the spread of
the compound. Lubricated threads.
4 to 6
Nm
500
g
17.8
oz.
Mounting torque ± 10 %
°C
K/W
IAP to heatsink
busbar to IAP
Approximate weight
Case style
INT-A-PAK
R CONDUCTION PER JUNCTION
VSKL300
RECTANGULAR CONDUCTION
AT TJ MAXIMUM
SINUSOIDAL CONDUCTION
AT TJ MAXIMUM
DEVICES
UNITS
180°
120°
90°
60°
30°
180°
120°
90°
60°
30°
0.019
0.022
0.028
0.041
0.068
0.013
0.023
0.031
0.043
0.069
K/W
Note
• Table shows the increment of thermal resistance RthJC when devices operate at different conduction angles than DC
Revision: 11-Apr-14
Document Number: 94557
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKL300/08PbF
Maximum Average On-state Power Loss (W)
150
Conduction Angle
100
30°
60°
50
90°
120°
180°
0
0
Maximum Allowable Case Temperature (°C)
Vishay Semiconductors
500
DC
400
RMS Limit
300
Conduction Period
200
180°
120°
90°
60°
30°
100
0
0
100
200
300
400
500
Average On-state Current (A)
Average On-state Current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 4 - On-State Power Loss Characteristics
150
100
Conduction Angle
30°
60°
50
DC
90°
120°
180°
0
0
100
200
300
400
400
RMS Limit
Conduction Angle
200
180°
120°
90°
60°
30°
100
0
0
50
5000
4500
4000
3500
3000
2500
1
100 150 200 250 300 350
10
100
Fig. 5 - Maximum Non-Repetitive Surge Current
Peak Half Sine Wave On-state Current (A)
500
Maximum Non-repetitive Surge Current
Versus Pulse Train Duration
Initial Tj = 140°C
No Voltage Reapplied
Rated Vrrm reapplied
5500
Number of Equal Amplitude Half Cycle Current Pulsed (N)
Fig. 2 - Current Ratings Characteristics
300
6000
500
Average On-state Current (A)
Maximum Average On-state Power Loss (W)
600
50 100 150 200 250 300 350
Peak Half Sine Wave On-state Current (A)
Maximum Allowable Case Temperature (°C)
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6500
6000
5500
5000
Maximum Non-repetitive Surge Current
Versus Pulse Train Duration
Initial Tj = 140°C
No Voltage Reapplied
Rated Vrrm reapplied
4500
4000
3500
3000
2500
2000
0.01
0.1
1
10
Average On-state Current (A)
Pulse Train Durations (s)
Fig. 3 - On-State Power Loss Characteristics
Fig. 6 - Maximum Non-Repetitive Surge Current
Revision: 11-Apr-14
Document Number: 94557
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For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKL300/08PbF
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Vishay Semiconductors
10000
Instantaneous On-state Current (A)
Instantaneous On-state Current (A)
10000
Tj = 140°C
1000
100
10
Tj = 25°C
1000
100
10
Tj = 140°C
Tj = 25°C
1
1
0.5
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Instantaneous On-state Voltage (V)
Fig. 7 - On-State Voltage Drop Characteristics (SCR)
Transient Thermal Impedance Z thJC (K/W)
1.0
1.5
2.0
2.5
3.0
Instantaneous On-state Voltage (V)
Fig. 8 - On-State Voltage Drop Characteristics (Diode)
1
0.1
0.01
0.001
Single Pulse
(Thermal Resistance)
0.0001
1E-04
1E-03
1E-02
1E-01
1E+00
1E+01
1E+02
Square Wave Pulse Duration (s)
Fig. 9 - Thermal Impedance ZthJC Characteristics
ORDERING INFORMATION TABLE
Device code
VS-VS KL
1
2
300
08
PbF
3
4
5
1
-
Vishay Semiconductors product
2
-
Circuit configuration
3
-
Current rating (300 = 300 A)
4
-
Voltage rating (08 = 800 V)
5
-
PbF = Lead (Pb)-free
Revision: 11-Apr-14
Document Number: 94557
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For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKL300/08PbF
www.vishay.com
Vishay Semiconductors
CIRCUIT CONFIGURATION
CIRCUIT DESCRIPTION
CIRCUIT
CONFIGURATION CODE
CIRCUIT DRAWING
1
~
2
+
~
SCR/diode doubler circuit, negative control
+
L
3
K2
G2
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95010
Revision: 11-Apr-14
Document Number: 94557
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For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
Vishay Semiconductors
INT-A-PAK Diode
DIMENSIONS in millimeters (inches)
A
8 (0.32)
A
B
C
E
D
(See table)
94 (3.70)
80 (3.15)
7
(0.27)
3 screws M6 x 1
1
3
34
(1.34)
2
1
2
Document Number: 95010
Revision: 29-Sep-08
2 holes Ø 6.5
A
B
C
D
E
23 (0.91)
30 (1.18)
36 (1.42)
-
-
For technical questions, contact: [email protected]
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Document Number: 91000